acphyreg.h revision 72132
15331Sache/*- 25331Sache * Copyright (c) 2001 Semen Ustimenko (semenu@FreeBSD.org) 35331Sache * All rights reserved. 45331Sache * 55331Sache * Redistribution and use in source and binary forms, with or without 65331Sache * modification, are permitted provided that the following conditions 75331Sache * are met: 85331Sache * 1. Redistributions of source code must retain the above copyright 95331Sache * notice, this list of conditions and the following disclaimer. 105331Sache * 2. Redistributions in binary form must reproduce the above copyright 115331Sache * notice, this list of conditions and the following disclaimer in the 125331Sache * documentation and/or other materials provided with the distribution. 135331Sache * 145331Sache * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 155331Sache * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 165331Sache * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 175331Sache * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 185331Sache * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 195331Sache * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 205331Sache * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 215331Sache * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 225331Sache * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 235331Sache * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 245331Sache * SUCH DAMAGE. 255331Sache * 265331Sache * $FreeBSD: head/sys/dev/mii/acphyreg.h 72132 2001-02-07 19:57:40Z semenu $ 275331Sache */ 285331Sache 295331Sache#ifndef _DEV_MII_ACPHYREG_H_ 305331Sache#define _DEV_MII_ACPHYREG_H_ 315331Sache 325331Sache/* 3350476Speter * Register definitions for the Altima Communications AC101 345331Sache */ 35198788Sbrueffer 365331Sache#define MII_ACPHY_POL 0x10 /* Polarity int level */ 3779538Sru 385331Sache/* High byte is interrupt mask register */ 395331Sache#define MII_ACPHY_INT 0x11 /* Interrupt control/status */ 405331Sache#define AC_INT_ACOMP 0x0001 /* Autoneg complete */ 415331Sache#define AC_INT_REM_FLT 0x0002 /* Remote fault */ 425331Sache#define AC_INT_LINK_DOWN 0x0004 /* Link not OK */ 435331Sache#define AC_INT_LP_ACK 0x0008 /* FLP ack recved */ 445331Sache#define AC_INT_PD_FLT 0x0010 /* Parallel detect fault */ 4564618Sgshapiro#define AC_INT_PAGE_RECV 0x0020 /* New page recved */ 465331Sache#define AC_INT_RX_ER 0x0040 /* RX_ER transitions high */ 47108221Sru#define AC_INT_JAB 0x0080 /* Jabber detected */ 485331Sache 495331Sache#define MII_ACPHY_DIAG 0x12 /* Diagnostic */ 505331Sache#define AC_DIAG_RX_LOCK 0x0100 5170466Sru#define AC_DIAG_RX_PASS 0x0200 525331Sache#define AC_DIAG_SPEED 0x0400 /* Aneg speed result */ 535331Sache#define AC_DIAG_DUPLEX 0x0800 /* Aneg duplex result */ 54131530Sru 555331Sache#define MII_ACPHY_PWRLOOP 0x13 /* Power/Loopback */ 565331Sache#define MII_ACPHY_CBLMEAS 0x14 /* Cable meas. */ 575331Sache 585331Sache#define MII_ACPHY_MCTL 0x15 /* Mode control */ 595331Sache#define AC_MCTL_FX_SEL 0x0001 /* FX mode */ 605331Sache#define AC_MCTL_BYP_PCS 0x0001 /* Bypass PCS */ 615331Sache#define AC_MCTL_SCRMBL 0x0004 /* Data scrambling */ 625331Sache#define AC_MCTL_REM_LOOP 0x0008 /* Remote loopback */ 635331Sache#define AC_MCTL_DIS_WDT 0x0010 /* Disable watchdog timer */ 645331Sache#define AC_MCTL_DIS_REC 0x0020 /* Disable recv error counter */ 655331Sache#define AC_MCTL_REC_FULL 0x0040 /* Recv error counter full */ 665331Sache#define AC_MCTL_FRC_FEF 0x0080 /* Force Far End Fault Insert. */ 6770466Sru#define AC_MCTL_DIS_FEF 0x0100 /* Disable FEF Insertion */ 685331Sache#define AC_MCTL_LED_SEL 0x0200 /* Compat LED config */ 695331Sache#define AC_MCTL_ALED_SEL 0x0400 /* ActLED RX&TX - RX only */ 705331Sache#define AC_MCTL_10BT_SEL 0x0800 /* Enable 7-wire interface */ 715331Sache#define AC_MCTL_DIS_JAB 0x1000 /* Disable jabber */ 725331Sache#define AC_MCTL_FRC_LINK 0x2000 /* Force TX link up */ 735331Sache#define AC_MCTL_DIS_NLP 0x4000 /* Disable NLP check */ 745331Sache 755331Sache#define MII_ACPHY_REC 0x18 /* Recv error counter */ 765331Sache 775331Sache#endif /* _DEV_MII_ACPHYREG_H_ */ 785331Sache