if_malo.c revision 178354
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3 * Copyright (c) 2007 Marvell Semiconductor, Inc. 4 * Copyright (c) 2007 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32#include <sys/cdefs.h> 33#ifdef __FreeBSD__ 34__FBSDID("$FreeBSD: head/sys/dev/malo/if_malo.c 178354 2008-04-20 20:35:46Z sam $"); 35#endif 36 37#include "opt_malo.h" 38 39#include <sys/param.h> 40#include <sys/endian.h> 41#include <sys/kernel.h> 42#include <sys/socket.h> 43#include <sys/sockio.h> 44#include <sys/sysctl.h> 45#include <sys/taskqueue.h> 46 47#include <machine/bus.h> 48#include <sys/bus.h> 49 50#include <net/if.h> 51#include <net/if_dl.h> 52#include <net/if_media.h> 53#include <net/if_types.h> 54#include <net/ethernet.h> 55 56#include <net80211/ieee80211_var.h> 57#include <net80211/ieee80211_regdomain.h> 58 59#include <net/bpf.h> 60 61#include <dev/malo/if_malo.h> 62 63SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64 "Marvell 88w8335 driver parameters"); 65 66static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68 0, "tx buffers to send at once"); 69TUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72 0, "rx buffers allocated"); 73TUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76 0, "max rx buffers to process per interrupt"); 77TUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80 0, "tx buffers allocated"); 81TUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82 83#ifdef MALO_DEBUG 84static int malo_debug = 0; 85SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86 0, "control debugging printfs"); 87TUNABLE_INT("hw.malo.debug", &malo_debug); 88enum { 89 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93 MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94 MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98 MALO_DEBUG_NODE = 0x00000800, /* node management */ 99 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100 MALO_DEBUG_FW = 0x00008000, /* firmware */ 101 MALO_DEBUG_ANY = 0xffffffff 102}; 103#define IS_BEACON(wh) \ 104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105 IEEE80211_FC0_SUBTYPE_MASK)) == \ 106 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107#define IFF_DUMPPKTS_RECV(sc, wh) \ 108 (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111 (IFF_DEBUG|IFF_LINK2)) 112#define IFF_DUMPPKTS_XMIT(sc) \ 113 ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115 (IFF_DEBUG | IFF_LINK2)) 116#define DPRINTF(sc, m, fmt, ...) do { \ 117 if (sc->malo_debug & (m)) \ 118 printf(fmt, __VA_ARGS__); \ 119} while (0) 120#else 121#define DPRINTF(sc, m, fmt, ...) do { \ 122 (void) sc; \ 123} while (0) 124#endif 125 126MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127 128static struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129 const char name[IFNAMSIZ], int unit, int opmode, int flags, 130 const uint8_t bssid[IEEE80211_ADDR_LEN], 131 const uint8_t mac[IEEE80211_ADDR_LEN]); 132static void malo_vap_delete(struct ieee80211vap *); 133static int malo_dma_setup(struct malo_softc *); 134static int malo_setup_hwdma(struct malo_softc *); 135static void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137static void malo_start(struct ifnet *); 138static void malo_watchdog(struct ifnet *); 139static int malo_ioctl(struct ifnet *, u_long, caddr_t); 140static void malo_updateslot(struct ifnet *); 141static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142static void malo_scan_start(struct ieee80211com *); 143static void malo_scan_end(struct ieee80211com *); 144static void malo_set_channel(struct ieee80211com *); 145static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146 const struct ieee80211_bpf_params *); 147static void malo_bpfattach(struct malo_softc *); 148static void malo_sysctlattach(struct malo_softc *); 149static void malo_announce(struct malo_softc *); 150static void malo_dma_cleanup(struct malo_softc *); 151static void malo_stop_locked(struct ifnet *, int); 152static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 153static int malo_mode_init(struct malo_softc *); 154static void malo_tx_proc(void *, int); 155static void malo_rx_proc(void *, int); 156static void malo_init(void *); 157 158/* 159 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 160 * operations are done in the "hal" except getting H/W MAC address at 161 * malo_attach and there should be no reference to them here. 162 */ 163static uint32_t 164malo_bar0_read4(struct malo_softc *sc, bus_size_t off) 165{ 166 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 167} 168 169static void 170malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 171{ 172 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n", 173 __func__, off, val); 174 175 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 176} 177 178static uint8_t 179malo_bar1_read1(struct malo_softc *sc, bus_size_t off) 180{ 181 return bus_space_read_1(sc->malo_io1t, sc->malo_io1h, off); 182} 183 184int 185malo_attach(uint16_t devid, struct malo_softc *sc) 186{ 187 int error; 188 struct ieee80211com *ic; 189 struct ifnet *ifp; 190 struct malo_hal *mh; 191 uint8_t bands; 192 193 ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 194 if (ifp == NULL) { 195 device_printf(sc->malo_dev, "can not if_alloc()\n"); 196 return ENOSPC; 197 } 198 ic = ifp->if_l2com; 199 200 MALO_LOCK_INIT(sc); 201 202 /* set these up early for if_printf use */ 203 if_initname(ifp, device_get_name(sc->malo_dev), 204 device_get_unit(sc->malo_dev)); 205 206 /* 207 * NB: get mac address from hardware directly here before we set DMAs 208 * for HAL because we don't want to disturb operations of HAL at BAR 1. 209 */ 210 for (i = 0; i < IEEE80211_ADDR_LEN; i++) { 211 /* XXX remove a magic number but we don't have documents. */ 212 ic->ic_myaddr[i] = malo_bar1_read1(sc, 0xa528 + i); 213 DELAY(1000); 214 } 215 216 mh = malo_hal_attach(sc->malo_dev, devid, 217 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 218 if (mh == NULL) { 219 if_printf(ifp, "unable to attach HAL\n"); 220 error = EIO; 221 goto bad; 222 } 223 sc->malo_mh = mh; 224 225 /* 226 * Load firmware so we can get setup. We arbitrarily pick station 227 * firmware; we'll re-load firmware as needed so setting up 228 * the wrong mode isn't a big deal. 229 */ 230 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 231 if (error != 0) { 232 if_printf(ifp, "unable to setup firmware\n"); 233 goto bad1; 234 } 235 /* XXX gethwspecs() extracts correct informations? not maybe! */ 236 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 237 if (error != 0) { 238 if_printf(ifp, "unable to fetch h/w specs\n"); 239 goto bad1; 240 } 241 242 DPRINTF(sc, MALO_DEBUG_FW, 243 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 244 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 245 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 246 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 247 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 248 sc->malo_hwspecs.hwversion, 249 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 250 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 251 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 252 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 253 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 254 sc->malo_hwspecs.ul_fw_awakecookie, 255 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 256 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 257 258 /* NB: firmware looks that it does not export regdomain info API. */ 259 bands = 0; 260 setbit(&bands, IEEE80211_MODE_11B); 261 setbit(&bands, IEEE80211_MODE_11G); 262 ieee80211_init_channels(ic, NULL, &bands); 263 264 sc->malo_txantenna = 0x2; /* h/w default */ 265 sc->malo_rxantenna = 0xffff; /* h/w default */ 266 267 /* 268 * Allocate tx + rx descriptors and populate the lists. 269 * We immediately push the information to the firmware 270 * as otherwise it gets upset. 271 */ 272 error = malo_dma_setup(sc); 273 if (error != 0) { 274 if_printf(ifp, "failed to setup descriptors: %d\n", error); 275 goto bad1; 276 } 277 error = malo_setup_hwdma(sc); /* push to firmware */ 278 if (error != 0) /* NB: malo_setupdma prints msg */ 279 goto bad1; 280 281 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 282 taskqueue_thread_enqueue, &sc->malo_tq); 283 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 284 "%s taskq", ifp->if_xname); 285 286 TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 287 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 288 289 ifp->if_softc = sc; 290 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 291 ifp->if_start = malo_start; 292 ifp->if_watchdog = malo_watchdog; 293 ifp->if_ioctl = malo_ioctl; 294 ifp->if_init = malo_init; 295 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 296 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 297 IFQ_SET_READY(&ifp->if_snd); 298 299 ic->ic_ifp = ifp; 300 /* XXX not right but it's not used anywhere important */ 301 ic->ic_phytype = IEEE80211_T_OFDM; 302 ic->ic_opmode = IEEE80211_M_STA; 303 ic->ic_caps = 304 IEEE80211_C_BGSCAN /* capable of bg scanning */ 305 | IEEE80211_C_MONITOR /* monitor mode */ 306 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 307 | IEEE80211_C_SHSLOT /* short slot time supported */ 308 | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 309 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 310 ; 311 312 /* 313 * Transmit requires space in the packet for a special format transmit 314 * record and optional padding between this record and the payload. 315 * Ask the net80211 layer to arrange this when encapsulating 316 * packets so we can add it efficiently. 317 */ 318 ic->ic_headroom = sizeof(struct malo_txrec) - 319 sizeof(struct ieee80211_frame); 320 321 /* get mac address from hardware */ 322 IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->malo_hwspecs.macaddr); 323 324 /* call MI attach routine. */ 325 ieee80211_ifattach(ic); 326 /* override default methods */ 327 ic->ic_vap_create = malo_vap_create; 328 ic->ic_vap_delete = malo_vap_delete; 329 ic->ic_raw_xmit = malo_raw_xmit; 330 ic->ic_updateslot = malo_updateslot; 331 332 ic->ic_scan_start = malo_scan_start; 333 ic->ic_scan_end = malo_scan_end; 334 ic->ic_set_channel = malo_set_channel; 335 336 sc->malo_invalid = 0; /* ready to go, enable int handling */ 337 338 malo_bpfattach(sc); 339 340 /* 341 * Setup dynamic sysctl's. 342 */ 343 malo_sysctlattach(sc); 344 345 if (bootverbose) 346 ieee80211_announce(ic); 347 malo_announce(sc); 348 349 return 0; 350bad1: 351 malo_hal_detach(mh); 352bad: 353 if_free(ifp); 354 sc->malo_invalid = 1; 355 356 return error; 357} 358 359static struct ieee80211vap * 360malo_vap_create(struct ieee80211com *ic, 361 const char name[IFNAMSIZ], int unit, int opmode, int flags, 362 const uint8_t bssid[IEEE80211_ADDR_LEN], 363 const uint8_t mac[IEEE80211_ADDR_LEN]) 364{ 365 struct ifnet *ifp = ic->ic_ifp; 366 struct malo_vap *mvp; 367 struct ieee80211vap *vap; 368 369 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 370 if_printf(ifp, "multiple vaps not supported\n"); 371 return NULL; 372 } 373 switch (opmode) { 374 case IEEE80211_M_STA: 375 if (opmode == IEEE80211_M_STA) 376 flags |= IEEE80211_CLONE_NOBEACONS; 377 /* fall thru... */ 378 case IEEE80211_M_MONITOR: 379 break; 380 default: 381 if_printf(ifp, "%s mode not supported\n", 382 ieee80211_opmode_name[opmode]); 383 return NULL; /* unsupported */ 384 } 385 mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 386 M_80211_VAP, M_NOWAIT | M_ZERO); 387 if (mvp == NULL) { 388 if_printf(ifp, "cannot allocate vap state block\n"); 389 return NULL; 390 } 391 vap = &mvp->malo_vap; 392 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 393 394 /* override state transition machine */ 395 mvp->malo_newstate = vap->iv_newstate; 396 vap->iv_newstate = malo_newstate; 397 398 /* complete setup */ 399 ieee80211_vap_attach(vap, 400 ieee80211_media_change, ieee80211_media_status); 401 ic->ic_opmode = opmode; 402 return vap; 403} 404 405static void 406malo_vap_delete(struct ieee80211vap *vap) 407{ 408 struct malo_vap *mvp = MALO_VAP(vap); 409 410 ieee80211_vap_detach(vap); 411 free(mvp, M_80211_VAP); 412} 413 414int 415malo_intr(void *arg) 416{ 417 struct malo_softc *sc = arg; 418 struct malo_hal *mh = sc->malo_mh; 419 uint32_t status; 420 421 if (sc->malo_invalid) { 422 /* 423 * The hardware is not ready/present, don't touch anything. 424 * Note this can happen early on if the IRQ is shared. 425 */ 426 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 427 return (FILTER_STRAY); 428 } 429 430 /* 431 * Figure out the reason(s) for the interrupt. 432 */ 433 malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 434 if (status == 0) /* must be a shared irq */ 435 return (FILTER_STRAY); 436 437 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 438 __func__, status, sc->malo_imask); 439 440 if (status & MALO_A2HRIC_BIT_RX_RDY) 441 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 442 if (status & MALO_A2HRIC_BIT_TX_DONE) 443 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 444 if (status & MALO_A2HRIC_BIT_OPC_DONE) 445 malo_hal_cmddone(mh); 446 if (status & MALO_A2HRIC_BIT_MAC_EVENT) 447 ; 448 if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 449 ; 450 if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 451 /* TKIP ICV error */ 452 sc->malo_stats.mst_rx_badtkipicv++; 453 } 454#ifdef MALO_DEBUG 455 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 456 DPRINTF(sc, MALO_DEBUG_INTR, 457 "%s: can't handle interrupt status 0x%x\n", 458 __func__, status); 459#endif 460 return (FILTER_HANDLED); 461} 462 463static void 464malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 465{ 466 bus_addr_t *paddr = (bus_addr_t*) arg; 467 468 KASSERT(error == 0, ("error %u on bus_dma callback", error)); 469 470 *paddr = segs->ds_addr; 471} 472 473static int 474malo_desc_setup(struct malo_softc *sc, const char *name, 475 struct malo_descdma *dd, 476 int nbuf, size_t bufsize, int ndesc, size_t descsize) 477{ 478 int error; 479 struct ifnet *ifp = sc->malo_ifp; 480 uint8_t *ds; 481 482 DPRINTF(sc, MALO_DEBUG_RESET, 483 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 484 __func__, name, nbuf, (uintmax_t) bufsize, 485 ndesc, (uintmax_t) descsize); 486 487 dd->dd_name = name; 488 dd->dd_desc_len = nbuf * ndesc * descsize; 489 490 /* 491 * Setup DMA descriptor area. 492 */ 493 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 494 PAGE_SIZE, 0, /* alignment, bounds */ 495 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 496 BUS_SPACE_MAXADDR, /* highaddr */ 497 NULL, NULL, /* filter, filterarg */ 498 dd->dd_desc_len, /* maxsize */ 499 1, /* nsegments */ 500 dd->dd_desc_len, /* maxsegsize */ 501 BUS_DMA_ALLOCNOW, /* flags */ 502 NULL, /* lockfunc */ 503 NULL, /* lockarg */ 504 &dd->dd_dmat); 505 if (error != 0) { 506 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 507 return error; 508 } 509 510 /* allocate descriptors */ 511 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 512 if (error != 0) { 513 if_printf(ifp, "unable to create dmamap for %s descriptors, " 514 "error %u\n", dd->dd_name, error); 515 goto fail0; 516 } 517 518 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 519 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 520 if (error != 0) { 521 if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 522 "error %u\n", nbuf * ndesc, dd->dd_name, error); 523 goto fail1; 524 } 525 526 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 527 dd->dd_desc, dd->dd_desc_len, 528 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 529 if (error != 0) { 530 if_printf(ifp, "unable to map %s descriptors, error %u\n", 531 dd->dd_name, error); 532 goto fail2; 533 } 534 535 ds = dd->dd_desc; 536 memset(ds, 0, dd->dd_desc_len); 537 DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 538 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 539 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 540 541 return 0; 542fail2: 543 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 544fail1: 545 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 546fail0: 547 bus_dma_tag_destroy(dd->dd_dmat); 548 memset(dd, 0, sizeof(*dd)); 549 return error; 550} 551 552#define DS2PHYS(_dd, _ds) \ 553 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 554 555static int 556malo_rxdma_setup(struct malo_softc *sc) 557{ 558 struct ifnet *ifp = sc->malo_ifp; 559 int error, bsize, i; 560 struct malo_rxbuf *bf; 561 struct malo_rxdesc *ds; 562 563 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 564 malo_rxbuf, sizeof(struct malo_rxbuf), 565 1, sizeof(struct malo_rxdesc)); 566 if (error != 0) 567 return error; 568 569 /* 570 * Allocate rx buffers and set them up. 571 */ 572 bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 573 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 574 if (bf == NULL) { 575 if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 576 return error; 577 } 578 sc->malo_rxdma.dd_bufptr = bf; 579 580 STAILQ_INIT(&sc->malo_rxbuf); 581 ds = sc->malo_rxdma.dd_desc; 582 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 583 bf->bf_desc = ds; 584 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 585 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 586 &bf->bf_dmamap); 587 if (error != 0) { 588 if_printf(ifp, "%s: unable to dmamap for rx buffer, " 589 "error %d\n", __func__, error); 590 return error; 591 } 592 /* NB: tail is intentional to preserve descriptor order */ 593 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 594 } 595 return 0; 596} 597 598static int 599malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 600{ 601 struct ifnet *ifp = sc->malo_ifp; 602 int error, bsize, i; 603 struct malo_txbuf *bf; 604 struct malo_txdesc *ds; 605 606 error = malo_desc_setup(sc, "tx", &txq->dma, 607 malo_txbuf, sizeof(struct malo_txbuf), 608 MALO_TXDESC, sizeof(struct malo_txdesc)); 609 if (error != 0) 610 return error; 611 612 /* allocate and setup tx buffers */ 613 bsize = malo_txbuf * sizeof(struct malo_txbuf); 614 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 615 if (bf == NULL) { 616 if_printf(ifp, "malloc of %u tx buffers failed\n", 617 malo_txbuf); 618 return ENOMEM; 619 } 620 txq->dma.dd_bufptr = bf; 621 622 STAILQ_INIT(&txq->free); 623 txq->nfree = 0; 624 ds = txq->dma.dd_desc; 625 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 626 bf->bf_desc = ds; 627 bf->bf_daddr = DS2PHYS(&txq->dma, ds); 628 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 629 &bf->bf_dmamap); 630 if (error != 0) { 631 if_printf(ifp, "unable to create dmamap for tx " 632 "buffer %u, error %u\n", i, error); 633 return error; 634 } 635 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 636 txq->nfree++; 637 } 638 639 return 0; 640} 641 642static void 643malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 644{ 645 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 646 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 647 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 648 bus_dma_tag_destroy(dd->dd_dmat); 649 650 memset(dd, 0, sizeof(*dd)); 651} 652 653static void 654malo_rxdma_cleanup(struct malo_softc *sc) 655{ 656 struct malo_rxbuf *bf; 657 658 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 659 if (bf->bf_m != NULL) { 660 m_freem(bf->bf_m); 661 bf->bf_m = NULL; 662 } 663 if (bf->bf_dmamap != NULL) { 664 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 665 bf->bf_dmamap = NULL; 666 } 667 } 668 STAILQ_INIT(&sc->malo_rxbuf); 669 if (sc->malo_rxdma.dd_bufptr != NULL) { 670 free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 671 sc->malo_rxdma.dd_bufptr = NULL; 672 } 673 if (sc->malo_rxdma.dd_desc_len != 0) 674 malo_desc_cleanup(sc, &sc->malo_rxdma); 675} 676 677static void 678malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 679{ 680 struct malo_txbuf *bf; 681 struct ieee80211_node *ni; 682 683 STAILQ_FOREACH(bf, &txq->free, bf_list) { 684 if (bf->bf_m != NULL) { 685 m_freem(bf->bf_m); 686 bf->bf_m = NULL; 687 } 688 ni = bf->bf_node; 689 bf->bf_node = NULL; 690 if (ni != NULL) { 691 /* 692 * Reclaim node reference. 693 */ 694 ieee80211_free_node(ni); 695 } 696 if (bf->bf_dmamap != NULL) { 697 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 698 bf->bf_dmamap = NULL; 699 } 700 } 701 STAILQ_INIT(&txq->free); 702 txq->nfree = 0; 703 if (txq->dma.dd_bufptr != NULL) { 704 free(txq->dma.dd_bufptr, M_MALODEV); 705 txq->dma.dd_bufptr = NULL; 706 } 707 if (txq->dma.dd_desc_len != 0) 708 malo_desc_cleanup(sc, &txq->dma); 709} 710 711static void 712malo_dma_cleanup(struct malo_softc *sc) 713{ 714 int i; 715 716 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 717 malo_txdma_cleanup(sc, &sc->malo_txq[i]); 718 719 malo_rxdma_cleanup(sc); 720} 721 722static int 723malo_dma_setup(struct malo_softc *sc) 724{ 725 int error, i; 726 727 /* rxdma initializing. */ 728 error = malo_rxdma_setup(sc); 729 if (error != 0) 730 return error; 731 732 /* NB: we just have 1 tx queue now. */ 733 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 734 error = malo_txdma_setup(sc, &sc->malo_txq[i]); 735 if (error != 0) { 736 malo_dma_cleanup(sc); 737 738 return error; 739 } 740 741 malo_txq_init(sc, &sc->malo_txq[i], i); 742 } 743 744 return 0; 745} 746 747static void 748malo_hal_set_rxtxdma(struct malo_softc *sc) 749{ 750 int i; 751 752 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 753 sc->malo_hwdma.rxdesc_read); 754 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 755 sc->malo_hwdma.rxdesc_read); 756 757 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 758 malo_bar0_write4(sc, 759 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 760 } 761} 762 763/* 764 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 765 * for compatibility with older firmware. For current firmware we send 766 * this information with a cmd block via malo_hal_sethwdma. 767 */ 768static int 769malo_setup_hwdma(struct malo_softc *sc) 770{ 771 int i; 772 struct malo_txq *txq; 773 774 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 775 776 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 777 txq = &sc->malo_txq[i]; 778 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 779 } 780 sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 781 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 782 783 malo_hal_set_rxtxdma(sc); 784 785 return 0; 786} 787 788static void 789malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 790{ 791 struct malo_txbuf *bf, *bn; 792 struct malo_txdesc *ds; 793 794 MALO_TXQ_LOCK_INIT(sc, txq); 795 txq->qnum = qnum; 796 txq->txpri = 0; /* XXX */ 797 798 STAILQ_FOREACH(bf, &txq->free, bf_list) { 799 bf->bf_txq = txq; 800 801 ds = bf->bf_desc; 802 bn = STAILQ_NEXT(bf, bf_list); 803 if (bn == NULL) 804 bn = STAILQ_FIRST(&txq->free); 805 ds->physnext = htole32(bn->bf_daddr); 806 } 807 STAILQ_INIT(&txq->active); 808} 809 810/* 811 * Reclaim resources for a setup queue. 812 */ 813static void 814malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 815{ 816 /* XXX hal work? */ 817 MALO_TXQ_LOCK_DESTROY(txq); 818} 819 820/* 821 * Allocate a tx buffer for sending a frame. 822 */ 823static struct malo_txbuf * 824malo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 825{ 826 struct malo_txbuf *bf; 827 828 MALO_TXQ_LOCK(txq); 829 bf = STAILQ_FIRST(&txq->free); 830 if (bf != NULL) { 831 STAILQ_REMOVE_HEAD(&txq->free, bf_list); 832 txq->nfree--; 833 } 834 MALO_TXQ_UNLOCK(txq); 835 if (bf == NULL) { 836 DPRINTF(sc, MALO_DEBUG_XMIT, 837 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 838 sc->malo_stats.mst_tx_qstop++; 839 } 840 return bf; 841} 842 843static int 844malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 845{ 846 struct mbuf *m; 847 int error; 848 849 /* 850 * Load the DMA map so any coalescing is done. This also calculates 851 * the number of descriptors we need. 852 */ 853 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 854 bf->bf_segs, &bf->bf_nseg, 855 BUS_DMA_NOWAIT); 856 if (error == EFBIG) { 857 /* XXX packet requires too many descriptors */ 858 bf->bf_nseg = MALO_TXDESC + 1; 859 } else if (error != 0) { 860 sc->malo_stats.mst_tx_busdma++; 861 m_freem(m0); 862 return error; 863 } 864 /* 865 * Discard null packets and check for packets that require too many 866 * TX descriptors. We try to convert the latter to a cluster. 867 */ 868 if (error == EFBIG) { /* too many desc's, linearize */ 869 sc->malo_stats.mst_tx_linear++; 870 m = m_defrag(m0, M_DONTWAIT); 871 if (m == NULL) { 872 m_freem(m0); 873 sc->malo_stats.mst_tx_nombuf++; 874 return ENOMEM; 875 } 876 m0 = m; 877 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 878 bf->bf_segs, &bf->bf_nseg, 879 BUS_DMA_NOWAIT); 880 if (error != 0) { 881 sc->malo_stats.mst_tx_busdma++; 882 m_freem(m0); 883 return error; 884 } 885 KASSERT(bf->bf_nseg <= MALO_TXDESC, 886 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 887 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 888 sc->malo_stats.mst_tx_nodata++; 889 m_freem(m0); 890 return EIO; 891 } 892 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 893 __func__, m0, m0->m_pkthdr.len); 894 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 895 bf->bf_m = m0; 896 897 return 0; 898} 899 900#ifdef MALO_DEBUG 901static void 902malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 903{ 904 const struct malo_rxdesc *ds = bf->bf_desc; 905 uint32_t status = le32toh(ds->status); 906 907 printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 908 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 909 " RATE:%02x QOS:%04x\n", 910 ix, ds, (const struct malo_desc *)bf->bf_daddr, 911 le32toh(ds->physnext), le32toh(ds->physbuffdata), 912 ds->rxcontrol, 913 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 914 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 915 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 916 ds->rate, le16toh(ds->qosctrl)); 917} 918 919static void 920malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 921{ 922 const struct malo_txdesc *ds = bf->bf_desc; 923 uint32_t status = le32toh(ds->status); 924 925 printf("Q%u[%3u]", qnum, ix); 926 printf(" (DS.V:%p DS.P:%p)\n", 927 ds, (const struct malo_txdesc *)bf->bf_daddr); 928 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 929 le32toh(ds->physnext), 930 le32toh(ds->pktptr), le16toh(ds->pktlen), status, 931 status & MALO_TXD_STATUS_USED ? 932 "" : (status & 3) != 0 ? " *" : " !"); 933 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 934 ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 935 le32toh(ds->sap_pktinfo), le16toh(ds->format)); 936#if 0 937 { 938 const uint8_t *cp = (const uint8_t *) ds; 939 int i; 940 for (i = 0; i < sizeof(struct malo_txdesc); i++) { 941 printf("%02x ", cp[i]); 942 if (((i+1) % 16) == 0) 943 printf("\n"); 944 } 945 printf("\n"); 946 } 947#endif 948} 949#endif /* MALO_DEBUG */ 950 951static __inline void 952malo_updatetxrate(struct ieee80211_node *ni, int rix) 953{ 954#define N(x) (sizeof(x)/sizeof(x[0])) 955 static const int ieeerates[] = 956 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 957 if (rix < N(ieeerates)) 958 ni->ni_txrate = ieeerates[rix]; 959#undef N 960} 961 962static int 963malo_fix2rate(int fix_rate) 964{ 965#define N(x) (sizeof(x)/sizeof(x[0])) 966 static const int rates[] = 967 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 968 return (fix_rate < N(rates) ? rates[fix_rate] : 0); 969#undef N 970} 971 972/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 973#define MS(v,x) (((v) & x) >> x##_S) 974#define SM(v,x) (((v) << x##_S) & x) 975 976/* 977 * Process completed xmit descriptors from the specified queue. 978 */ 979static int 980malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 981{ 982 struct malo_txbuf *bf; 983 struct malo_txdesc *ds; 984 struct ieee80211_node *ni; 985 int nreaped; 986 uint32_t status; 987 988 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 989 __func__, txq->qnum); 990 for (nreaped = 0;; nreaped++) { 991 MALO_TXQ_LOCK(txq); 992 bf = STAILQ_FIRST(&txq->active); 993 if (bf == NULL) { 994 MALO_TXQ_UNLOCK(txq); 995 break; 996 } 997 ds = bf->bf_desc; 998 MALO_TXDESC_SYNC(txq, ds, 999 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1000 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 1001 MALO_TXQ_UNLOCK(txq); 1002 break; 1003 } 1004 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1005 MALO_TXQ_UNLOCK(txq); 1006 1007#ifdef MALO_DEBUG 1008 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 1009 malo_printtxbuf(bf, txq->qnum, nreaped); 1010#endif 1011 ni = bf->bf_node; 1012 if (ni != NULL) { 1013 status = le32toh(ds->status); 1014 if (status & MALO_TXD_STATUS_OK) { 1015 uint16_t format = le16toh(ds->format); 1016 uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1017 1018 sc->malo_stats.mst_ant_tx[txant]++; 1019 if (status & MALO_TXD_STATUS_OK_RETRY) 1020 sc->malo_stats.mst_tx_retries++; 1021 if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1022 sc->malo_stats.mst_tx_mretries++; 1023 malo_updatetxrate(ni, ds->datarate); 1024 sc->malo_stats.mst_tx_rate = ds->datarate; 1025 } else { 1026 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1027 sc->malo_stats.mst_tx_linkerror++; 1028 if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1029 sc->malo_stats.mst_tx_xretries++; 1030 if (status & MALO_TXD_STATUS_FAILED_AGING) 1031 sc->malo_stats.mst_tx_aging++; 1032 } 1033 /* 1034 * Do any tx complete callback. Note this must 1035 * be done before releasing the node reference. 1036 * XXX no way to figure out if frame was ACK'd 1037 */ 1038 if (bf->bf_m->m_flags & M_TXCB) { 1039 /* XXX strip fw len in case header inspected */ 1040 m_adj(bf->bf_m, sizeof(uint16_t)); 1041 ieee80211_process_callback(ni, bf->bf_m, 1042 (status & MALO_TXD_STATUS_OK) == 0); 1043 } 1044 /* 1045 * Reclaim reference to node. 1046 * 1047 * NB: the node may be reclaimed here if, for example 1048 * this is a DEAUTH message that was sent and the 1049 * node was timed out due to inactivity. 1050 */ 1051 ieee80211_free_node(ni); 1052 } 1053 ds->status = htole32(MALO_TXD_STATUS_IDLE); 1054 ds->pktlen = htole32(0); 1055 1056 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1057 BUS_DMASYNC_POSTWRITE); 1058 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1059 m_freem(bf->bf_m); 1060 bf->bf_m = NULL; 1061 bf->bf_node = NULL; 1062 1063 MALO_TXQ_LOCK(txq); 1064 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1065 txq->nfree++; 1066 MALO_TXQ_UNLOCK(txq); 1067 } 1068 return nreaped; 1069} 1070 1071/* 1072 * Deferred processing of transmit interrupt. 1073 */ 1074static void 1075malo_tx_proc(void *arg, int npending) 1076{ 1077 struct malo_softc *sc = arg; 1078 struct ifnet *ifp = sc->malo_ifp; 1079 int i, nreaped; 1080 1081 /* 1082 * Process each active queue. 1083 */ 1084 nreaped = 0; 1085 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1086 if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1087 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1088 } 1089 1090 if (nreaped != 0) { 1091 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1092 ifp->if_timer = 0; 1093 malo_start(ifp); 1094 } 1095} 1096 1097static int 1098malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1099 struct malo_txbuf *bf, struct mbuf *m0) 1100{ 1101#define IEEE80211_DIR_DSTODS(wh) \ 1102 ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1103#define IS_DATA_FRAME(wh) \ 1104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1105 int error, ismcast, iswep; 1106 int copyhdrlen, hdrlen, pktlen; 1107 struct ieee80211_frame *wh; 1108 struct ifnet *ifp = sc->malo_ifp; 1109 struct ieee80211com *ic = ifp->if_l2com; 1110 struct malo_txdesc *ds; 1111 struct malo_txrec *tr; 1112 struct malo_txq *txq; 1113 uint16_t qos; 1114 1115 wh = mtod(m0, struct ieee80211_frame *); 1116 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1117 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1118 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1119 pktlen = m0->m_pkthdr.len; 1120 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1121 if (IEEE80211_DIR_DSTODS(wh)) { 1122 qos = *(uint16_t *) 1123 (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1124 copyhdrlen -= sizeof(qos); 1125 } else 1126 qos = *(uint16_t *) 1127 (((struct ieee80211_qosframe *) wh)->i_qos); 1128 } else 1129 qos = 0; 1130 1131 if (iswep) { 1132 struct ieee80211_key *k; 1133 1134 /* 1135 * Construct the 802.11 header+trailer for an encrypted 1136 * frame. The only reason this can fail is because of an 1137 * unknown or unsupported cipher/key type. 1138 * 1139 * NB: we do this even though the firmware will ignore 1140 * what we've done for WEP and TKIP as we need the 1141 * ExtIV filled in for CCMP and this also adjusts 1142 * the headers which simplifies our work below. 1143 */ 1144 k = ieee80211_crypto_encap(ni, m0); 1145 if (k == NULL) { 1146 /* 1147 * This can happen when the key is yanked after the 1148 * frame was queued. Just discard the frame; the 1149 * 802.11 layer counts failures and provides 1150 * debugging/diagnostics. 1151 */ 1152 m_freem(m0); 1153 return EIO; 1154 } 1155 1156 /* 1157 * Adjust the packet length for the crypto additions 1158 * done during encap and any other bits that the f/w 1159 * will add later on. 1160 */ 1161 pktlen = m0->m_pkthdr.len; 1162 1163 /* packet header may have moved, reset our local pointer */ 1164 wh = mtod(m0, struct ieee80211_frame *); 1165 } 1166 1167 if (bpf_peers_present(ifp->if_bpf)) { 1168 sc->malo_tx_th.wt_flags = 0; /* XXX */ 1169 if (iswep) 1170 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1171 sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1172 sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1173 1174 bpf_mtap2(ifp->if_bpf, &sc->malo_tx_th, sc->malo_tx_th_len, m0); 1175 } 1176 1177 /* 1178 * Copy up/down the 802.11 header; the firmware requires 1179 * we present a 2-byte payload length followed by a 1180 * 4-address header (w/o QoS), followed (optionally) by 1181 * any WEP/ExtIV header (but only filled in for CCMP). 1182 * We are assured the mbuf has sufficient headroom to 1183 * prepend in-place by the setup of ic_headroom in 1184 * malo_attach. 1185 */ 1186 if (hdrlen < sizeof(struct malo_txrec)) { 1187 const int space = sizeof(struct malo_txrec) - hdrlen; 1188 if (M_LEADINGSPACE(m0) < space) { 1189 /* NB: should never happen */ 1190 device_printf(sc->malo_dev, 1191 "not enough headroom, need %d found %zd, " 1192 "m_flags 0x%x m_len %d\n", 1193 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1194 ieee80211_dump_pkt(ic, 1195 mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1196 m_freem(m0); 1197 /* XXX stat */ 1198 return EIO; 1199 } 1200 M_PREPEND(m0, space, M_NOWAIT); 1201 } 1202 tr = mtod(m0, struct malo_txrec *); 1203 if (wh != (struct ieee80211_frame *) &tr->wh) 1204 ovbcopy(wh, &tr->wh, hdrlen); 1205 /* 1206 * Note: the "firmware length" is actually the length of the fully 1207 * formed "802.11 payload". That is, it's everything except for 1208 * the 802.11 header. In particular this includes all crypto 1209 * material including the MIC! 1210 */ 1211 tr->fwlen = htole16(pktlen - hdrlen); 1212 1213 /* 1214 * Load the DMA map so any coalescing is done. This 1215 * also calculates the number of descriptors we need. 1216 */ 1217 error = malo_tx_dmasetup(sc, bf, m0); 1218 if (error != 0) 1219 return error; 1220 bf->bf_node = ni; /* NB: held reference */ 1221 m0 = bf->bf_m; /* NB: may have changed */ 1222 tr = mtod(m0, struct malo_txrec *); 1223 wh = (struct ieee80211_frame *)&tr->wh; 1224 1225 /* 1226 * Formulate tx descriptor. 1227 */ 1228 ds = bf->bf_desc; 1229 txq = bf->bf_txq; 1230 1231 ds->qosctrl = qos; /* NB: already little-endian */ 1232 ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1233 ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1234 /* NB: pPhysNext setup once, don't touch */ 1235 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1236 ds->sap_pktinfo = 0; 1237 ds->format = 0; 1238 1239 /* 1240 * Select transmit rate. 1241 */ 1242 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1243 case IEEE80211_FC0_TYPE_MGT: 1244 sc->malo_stats.mst_tx_mgmt++; 1245 /* fall thru... */ 1246 case IEEE80211_FC0_TYPE_CTL: 1247 ds->txpriority = 1; 1248 break; 1249 case IEEE80211_FC0_TYPE_DATA: 1250 ds->txpriority = txq->qnum; 1251 break; 1252 default: 1253 if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1254 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1255 /* XXX statistic */ 1256 m_freem(m0); 1257 return EIO; 1258 } 1259 1260#ifdef MALO_DEBUG 1261 if (IFF_DUMPPKTS_XMIT(sc)) 1262 ieee80211_dump_pkt(ic, 1263 mtod(m0, const uint8_t *)+sizeof(uint16_t), 1264 m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1265#endif 1266 1267 MALO_TXQ_LOCK(txq); 1268 if (!IS_DATA_FRAME(wh)) 1269 ds->status |= htole32(1); 1270 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1271 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1272 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1273 1274 ifp->if_opackets++; 1275 ifp->if_timer = 5; 1276 MALO_TXQ_UNLOCK(txq); 1277 return 0; 1278#undef IEEE80211_DIR_DSTODS 1279} 1280 1281static void 1282malo_start(struct ifnet *ifp) 1283{ 1284 struct malo_softc *sc = ifp->if_softc; 1285 struct ieee80211_node *ni; 1286 struct malo_txq *txq = &sc->malo_txq[0]; 1287 struct malo_txbuf *bf = NULL; 1288 struct mbuf *m; 1289 int nqueued = 0; 1290 1291 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1292 return; 1293 1294 for (;;) { 1295 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1296 if (m == NULL) 1297 break; 1298 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1299 bf = malo_getbuf(sc, txq); 1300 if (bf == NULL) { 1301 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1302 1303 /* XXX blocks other traffic */ 1304 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1305 sc->malo_stats.mst_tx_qstop++; 1306 break; 1307 } 1308 /* 1309 * Encapsulate the packet in prep for transmission. 1310 */ 1311 m = ieee80211_encap(ni, m); 1312 if (m == NULL) { 1313 DPRINTF(sc, MALO_DEBUG_XMIT, 1314 "%s: encapsulation failure\n", __func__); 1315 sc->malo_stats.mst_tx_encap++; 1316 goto bad; 1317 } 1318 /* 1319 * Pass the frame to the h/w for transmission. 1320 */ 1321 if (malo_tx_start(sc, ni, bf, m)) { 1322 bad: 1323 ifp->if_oerrors++; 1324 if (bf != NULL) { 1325 bf->bf_m = NULL; 1326 bf->bf_node = NULL; 1327 MALO_TXQ_LOCK(txq); 1328 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1329 MALO_TXQ_UNLOCK(txq); 1330 } 1331 ieee80211_free_node(ni); 1332 continue; 1333 } 1334 nqueued++; 1335 1336 if (nqueued >= malo_txcoalesce) { 1337 /* 1338 * Poke the firmware to process queued frames; 1339 * see below about (lack of) locking. 1340 */ 1341 nqueued = 0; 1342 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1343 } 1344 } 1345 1346 if (nqueued) { 1347 /* 1348 * NB: We don't need to lock against tx done because 1349 * this just prods the firmware to check the transmit 1350 * descriptors. The firmware will also start fetching 1351 * descriptors by itself if it notices new ones are 1352 * present when it goes to deliver a tx done interrupt 1353 * to the host. So if we race with tx done processing 1354 * it's ok. Delivering the kick here rather than in 1355 * malo_tx_start is an optimization to avoid poking the 1356 * firmware for each packet. 1357 * 1358 * NB: the queue id isn't used so 0 is ok. 1359 */ 1360 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1361 } 1362} 1363 1364static void 1365malo_watchdog(struct ifnet *ifp) 1366{ 1367 struct malo_softc *sc = ifp->if_softc; 1368 1369 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1370 if_printf(ifp, "watchdog timeout\n"); 1371 1372 /* XXX no way to reset h/w. now */ 1373 1374 ifp->if_oerrors++; 1375 sc->malo_stats.mst_watchdog++; 1376 } 1377} 1378 1379static int 1380malo_hal_reset(struct malo_softc *sc) 1381{ 1382 static int first = 0; 1383 struct ifnet *ifp = sc->malo_ifp; 1384 struct ieee80211com *ic = ifp->if_l2com; 1385 struct malo_hal *mh = sc->malo_mh; 1386 1387 if (first == 0) { 1388 /* 1389 * NB: when the device firstly is initialized, sometimes 1390 * firmware could override rx/tx dma registers so we re-set 1391 * these values once. 1392 */ 1393 malo_hal_set_rxtxdma(sc); 1394 first = 1; 1395 } 1396 1397 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1398 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1399 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1400 malo_chan_set(sc, ic->ic_curchan); 1401 1402 /* XXX needs other stuffs? */ 1403 1404 return 1; 1405} 1406 1407static __inline struct mbuf * 1408malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1409{ 1410 struct mbuf *m; 1411 bus_addr_t paddr; 1412 int error; 1413 1414 /* XXX don't need mbuf, just dma buffer */ 1415 m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1416 if (m == NULL) { 1417 sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1418 return NULL; 1419 } 1420 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1421 mtod(m, caddr_t), MJUMPAGESIZE, 1422 malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1423 if (error != 0) { 1424 if_printf(sc->malo_ifp, 1425 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1426 m_freem(m); 1427 return NULL; 1428 } 1429 bf->bf_data = paddr; 1430 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1431 1432 return m; 1433} 1434 1435static int 1436malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1437{ 1438 struct malo_rxdesc *ds; 1439 1440 ds = bf->bf_desc; 1441 if (bf->bf_m == NULL) { 1442 bf->bf_m = malo_getrxmbuf(sc, bf); 1443 if (bf->bf_m == NULL) { 1444 /* mark descriptor to be skipped */ 1445 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1446 /* NB: don't need PREREAD */ 1447 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1448 return ENOMEM; 1449 } 1450 } 1451 1452 /* 1453 * Setup descriptor. 1454 */ 1455 ds->qosctrl = 0; 1456 ds->snr = 0; 1457 ds->status = MALO_RXD_STATUS_IDLE; 1458 ds->channel = 0; 1459 ds->pktlen = htole16(MALO_RXSIZE); 1460 ds->nf = 0; 1461 ds->physbuffdata = htole32(bf->bf_data); 1462 /* NB: don't touch pPhysNext, set once */ 1463 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1464 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1465 1466 return 0; 1467} 1468 1469/* 1470 * Setup the rx data structures. This should only be done once or we may get 1471 * out of sync with the firmware. 1472 */ 1473static int 1474malo_startrecv(struct malo_softc *sc) 1475{ 1476 struct malo_rxbuf *bf, *prev; 1477 struct malo_rxdesc *ds; 1478 1479 if (sc->malo_recvsetup == 1) { 1480 malo_mode_init(sc); /* set filters, etc. */ 1481 return 0; 1482 } 1483 1484 prev = NULL; 1485 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1486 int error = malo_rxbuf_init(sc, bf); 1487 if (error != 0) { 1488 DPRINTF(sc, MALO_DEBUG_RECV, 1489 "%s: malo_rxbuf_init failed %d\n", 1490 __func__, error); 1491 return error; 1492 } 1493 if (prev != NULL) { 1494 ds = prev->bf_desc; 1495 ds->physnext = htole32(bf->bf_daddr); 1496 } 1497 prev = bf; 1498 } 1499 if (prev != NULL) { 1500 ds = prev->bf_desc; 1501 ds->physnext = 1502 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1503 } 1504 1505 sc->malo_recvsetup = 1; 1506 1507 malo_mode_init(sc); /* set filters, etc. */ 1508 1509 return 0; 1510} 1511 1512static void 1513malo_init_locked(struct malo_softc *sc) 1514{ 1515 struct ifnet *ifp = sc->malo_ifp; 1516 struct malo_hal *mh = sc->malo_mh; 1517 int error; 1518 1519 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1520 __func__, ifp->if_flags); 1521 1522 MALO_LOCK_ASSERT(sc); 1523 1524 /* 1525 * Stop anything previously setup. This is safe whether this is 1526 * the first time through or not. 1527 */ 1528 malo_stop_locked(ifp, 0); 1529 1530 /* 1531 * Push state to the firmware. 1532 */ 1533 if (!malo_hal_reset(sc)) { 1534 if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1535 return; 1536 } 1537 1538 /* 1539 * Setup recv (once); transmit is already good to go. 1540 */ 1541 error = malo_startrecv(sc); 1542 if (error != 0) { 1543 if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1544 __func__, error); 1545 return; 1546 } 1547 1548 /* 1549 * Enable interrupts. 1550 */ 1551 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1552 | MALO_A2HRIC_BIT_TX_DONE 1553 | MALO_A2HRIC_BIT_OPC_DONE 1554 | MALO_A2HRIC_BIT_MAC_EVENT 1555 | MALO_A2HRIC_BIT_RX_PROBLEM 1556 | MALO_A2HRIC_BIT_ICV_ERROR 1557 | MALO_A2HRIC_BIT_RADAR_DETECT 1558 | MALO_A2HRIC_BIT_CHAN_SWITCH; 1559 1560 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1561 malo_hal_intrset(mh, sc->malo_imask); 1562} 1563 1564static void 1565malo_init(void *arg) 1566{ 1567 struct malo_softc *sc = (struct malo_softc *) arg; 1568 struct ifnet *ifp = sc->malo_ifp; 1569 struct ieee80211com *ic = ifp->if_l2com; 1570 1571 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1572 __func__, ifp->if_flags); 1573 1574 MALO_LOCK(sc); 1575 malo_init_locked(sc); 1576 1577 MALO_UNLOCK(sc); 1578 1579 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1580 ieee80211_start_all(ic); /* start all vap's */ 1581} 1582 1583/* 1584 * Set the multicast filter contents into the hardware. 1585 */ 1586static void 1587malo_setmcastfilter(struct malo_softc *sc) 1588{ 1589 struct ifnet *ifp = sc->malo_ifp; 1590 struct ieee80211com *ic = ifp->if_l2com; 1591 struct ifmultiaddr *ifma; 1592 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1593 uint8_t *mp; 1594 int nmc; 1595 1596 mp = macs; 1597 nmc = 0; 1598 1599 if (ic->ic_opmode == IEEE80211_M_MONITOR || 1600 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1601 goto all; 1602 1603 IF_ADDR_LOCK(ifp); 1604 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1605 if (ifma->ifma_addr->sa_family != AF_LINK) 1606 continue; 1607 1608 if (nmc == MALO_HAL_MCAST_MAX) { 1609 ifp->if_flags |= IFF_ALLMULTI; 1610 IF_ADDR_UNLOCK(ifp); 1611 goto all; 1612 } 1613 IEEE80211_ADDR_COPY(mp, 1614 LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1615 1616 mp += IEEE80211_ADDR_LEN, nmc++; 1617 } 1618 IF_ADDR_UNLOCK(ifp); 1619 1620 malo_hal_setmcast(sc->malo_mh, nmc, macs); 1621 1622all: 1623 /* 1624 * XXX we don't know how to set the f/w for supporting 1625 * IFF_ALLMULTI | IFF_PROMISC cases 1626 */ 1627 return; 1628} 1629 1630static int 1631malo_mode_init(struct malo_softc *sc) 1632{ 1633 struct ifnet *ifp = sc->malo_ifp; 1634 struct ieee80211com *ic = ifp->if_l2com; 1635 struct malo_hal *mh = sc->malo_mh; 1636 1637 /* 1638 * Handle any link-level address change. Note that we only 1639 * need to force ic_myaddr; any other addresses are handled 1640 * as a byproduct of the ifnet code marking the interface 1641 * down then up. 1642 */ 1643 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 1644 1645 /* 1646 * NB: Ignore promisc in hostap mode; it's set by the 1647 * bridge. This is wrong but we have no way to 1648 * identify internal requests (from the bridge) 1649 * versus external requests such as for tcpdump. 1650 */ 1651 malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1652 ic->ic_opmode != IEEE80211_M_HOSTAP); 1653 malo_setmcastfilter(sc); 1654 1655 return ENXIO; 1656} 1657 1658static void 1659malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1660{ 1661 struct ieee80211_node *ni; 1662 struct malo_txbuf *bf; 1663 u_int ix; 1664 1665 /* 1666 * NB: this assumes output has been stopped and 1667 * we do not need to block malo_tx_tasklet 1668 */ 1669 for (ix = 0;; ix++) { 1670 MALO_TXQ_LOCK(txq); 1671 bf = STAILQ_FIRST(&txq->active); 1672 if (bf == NULL) { 1673 MALO_TXQ_UNLOCK(txq); 1674 break; 1675 } 1676 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1677 MALO_TXQ_UNLOCK(txq); 1678#ifdef MALO_DEBUG 1679 if (sc->malo_debug & MALO_DEBUG_RESET) { 1680 struct ifnet *ifp = sc->malo_ifp; 1681 struct ieee80211com *ic = ifp->if_l2com; 1682 const struct malo_txrec *tr = 1683 mtod(bf->bf_m, const struct malo_txrec *); 1684 malo_printtxbuf(bf, txq->qnum, ix); 1685 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1686 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1687 } 1688#endif /* MALO_DEBUG */ 1689 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1690 ni = bf->bf_node; 1691 bf->bf_node = NULL; 1692 if (ni != NULL) { 1693 /* 1694 * Reclaim node reference. 1695 */ 1696 ieee80211_free_node(ni); 1697 } 1698 m_freem(bf->bf_m); 1699 bf->bf_m = NULL; 1700 1701 MALO_TXQ_LOCK(txq); 1702 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1703 txq->nfree++; 1704 MALO_TXQ_UNLOCK(txq); 1705 } 1706} 1707 1708static void 1709malo_stop_locked(struct ifnet *ifp, int disable) 1710{ 1711 struct malo_softc *sc = ifp->if_softc; 1712 struct malo_hal *mh = sc->malo_mh; 1713 int i; 1714 1715 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1716 __func__, sc->malo_invalid, ifp->if_flags); 1717 1718 MALO_LOCK_ASSERT(sc); 1719 1720 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1721 return; 1722 1723 /* 1724 * Shutdown the hardware and driver: 1725 * disable interrupts 1726 * turn off the radio 1727 * drain and release tx queues 1728 * 1729 * Note that some of this work is not possible if the hardware 1730 * is gone (invalid). 1731 */ 1732 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1733 ifp->if_timer = 0; 1734 /* diable interrupt. */ 1735 malo_hal_intrset(mh, 0); 1736 /* turn off the radio. */ 1737 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1738 1739 /* drain and release tx queues. */ 1740 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1741 malo_tx_draintxq(sc, &sc->malo_txq[i]); 1742} 1743 1744static int 1745malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1746{ 1747#define MALO_IS_RUNNING(ifp) \ 1748 ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1749 struct malo_softc *sc = ifp->if_softc; 1750 struct ieee80211com *ic = ifp->if_l2com; 1751 struct ifreq *ifr = (struct ifreq *) data; 1752 int error = 0, startall = 0; 1753 1754 MALO_LOCK(sc); 1755 switch (cmd) { 1756 case SIOCSIFFLAGS: 1757 if (MALO_IS_RUNNING(ifp)) { 1758 /* 1759 * To avoid rescanning another access point, 1760 * do not call malo_init() here. Instead, 1761 * only reflect promisc mode settings. 1762 */ 1763 malo_mode_init(sc); 1764 } else if (ifp->if_flags & IFF_UP) { 1765 /* 1766 * Beware of being called during attach/detach 1767 * to reset promiscuous mode. In that case we 1768 * will still be marked UP but not RUNNING. 1769 * However trying to re-init the interface 1770 * is the wrong thing to do as we've already 1771 * torn down much of our state. There's 1772 * probably a better way to deal with this. 1773 */ 1774 if (!sc->malo_invalid) { 1775 malo_init_locked(sc); 1776 startall = 1; 1777 } 1778 } else 1779 malo_stop_locked(ifp, 1); 1780 break; 1781 case SIOCGIFMEDIA: 1782 case SIOCSIFMEDIA: 1783 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1784 break; 1785 default: 1786 error = ether_ioctl(ifp, cmd, data); 1787 break; 1788 } 1789 MALO_UNLOCK(sc); 1790 1791 if (startall) 1792 ieee80211_start_all(ic); 1793 return error; 1794#undef MALO_IS_RUNNING 1795} 1796 1797/* 1798 * Callback from the 802.11 layer to update the slot time 1799 * based on the current setting. We use it to notify the 1800 * firmware of ERP changes and the f/w takes care of things 1801 * like slot time and preamble. 1802 */ 1803static void 1804malo_updateslot(struct ifnet *ifp) 1805{ 1806 struct malo_softc *sc = ifp->if_softc; 1807 struct ieee80211com *ic = ifp->if_l2com; 1808 struct malo_hal *mh = sc->malo_mh; 1809 int error; 1810 1811 /* NB: can be called early; suppress needless cmds */ 1812 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1813 return; 1814 1815 DPRINTF(sc, MALO_DEBUG_RESET, 1816 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1817 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1818 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1819 1820 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1821 error = malo_hal_set_slot(mh, 1); 1822 else 1823 error = malo_hal_set_slot(mh, 0); 1824 1825 if (error != 0) 1826 device_printf(sc->malo_dev, "setting %s slot failed\n", 1827 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1828} 1829 1830static int 1831malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1832{ 1833 struct ieee80211com *ic = vap->iv_ic; 1834 struct malo_softc *sc = ic->ic_ifp->if_softc; 1835 struct malo_hal *mh = sc->malo_mh; 1836 int error; 1837 1838 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1839 ieee80211_state_name[vap->iv_state], 1840 ieee80211_state_name[nstate]); 1841 1842 /* 1843 * Invoke the net80211 layer first so iv_bss is setup. 1844 */ 1845 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1846 if (error != 0) 1847 return error; 1848 1849 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1850 struct ieee80211_node *ni = vap->iv_bss; 1851 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1852 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1853 1854 DPRINTF(sc, MALO_DEBUG_STATE, 1855 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1856 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1857 vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1858 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1859 ieee80211_chan2ieee(ic, ic->ic_curchan), 1860 ni->ni_associd, mode, tp->ucastrate); 1861 1862 malo_hal_setradio(mh, 1, 1863 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1864 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1865 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1866 malo_hal_set_rate(mh, mode, 1867 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1868 0 : malo_fix2rate(tp->ucastrate)); 1869 } 1870 return 0; 1871} 1872 1873static int 1874malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1875 const struct ieee80211_bpf_params *params) 1876{ 1877 struct ieee80211com *ic = ni->ni_ic; 1878 struct ifnet *ifp = ic->ic_ifp; 1879 struct malo_softc *sc = ifp->if_softc; 1880 struct malo_txbuf *bf; 1881 struct malo_txq *txq; 1882 1883 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1884 ieee80211_free_node(ni); 1885 m_freem(m); 1886 return ENETDOWN; 1887 } 1888 1889 /* 1890 * Grab a TX buffer and associated resources. Note that we depend 1891 * on the classification by the 802.11 layer to get to the right h/w 1892 * queue. Management frames must ALWAYS go on queue 1 but we 1893 * cannot just force that here because we may receive non-mgt frames. 1894 */ 1895 txq = &sc->malo_txq[0]; 1896 bf = malo_getbuf(sc, txq); 1897 if (bf == NULL) { 1898 /* XXX blocks other traffic */ 1899 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1900 ieee80211_free_node(ni); 1901 m_freem(m); 1902 return ENOBUFS; 1903 } 1904 1905 /* 1906 * Pass the frame to the h/w for transmission. 1907 */ 1908 if (malo_tx_start(sc, ni, bf, m) != 0) { 1909 ifp->if_oerrors++; 1910 bf->bf_m = NULL; 1911 bf->bf_node = NULL; 1912 MALO_TXQ_LOCK(txq); 1913 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1914 txq->nfree++; 1915 MALO_TXQ_UNLOCK(txq); 1916 1917 ieee80211_free_node(ni); 1918 return EIO; /* XXX */ 1919 } 1920 1921 /* 1922 * NB: We don't need to lock against tx done because this just 1923 * prods the firmware to check the transmit descriptors. The firmware 1924 * will also start fetching descriptors by itself if it notices 1925 * new ones are present when it goes to deliver a tx done interrupt 1926 * to the host. So if we race with tx done processing it's ok. 1927 * Delivering the kick here rather than in malo_tx_start is 1928 * an optimization to avoid poking the firmware for each packet. 1929 * 1930 * NB: the queue id isn't used so 0 is ok. 1931 */ 1932 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1933 1934 return 0; 1935} 1936 1937static void 1938malo_bpfattach(struct malo_softc *sc) 1939{ 1940 struct ifnet *ifp = sc->malo_ifp; 1941 1942 bpfattach(ifp, DLT_IEEE802_11_RADIO, 1943 sizeof(struct ieee80211_frame) + sizeof(sc->malo_tx_th)); 1944 1945 /* 1946 * Initialize constant fields. 1947 * XXX make header lengths a multiple of 32-bits so subsequent 1948 * headers are properly aligned; this is a kludge to keep 1949 * certain applications happy. 1950 * 1951 * NB: the channel is setup each time we transition to the 1952 * RUN state to avoid filling it in for each frame. 1953 */ 1954 sc->malo_tx_th_len = roundup(sizeof(sc->malo_tx_th), sizeof(uint32_t)); 1955 sc->malo_tx_th.wt_ihdr.it_len = htole16(sc->malo_tx_th_len); 1956 sc->malo_tx_th.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 1957 1958 sc->malo_rx_th_len = roundup(sizeof(sc->malo_rx_th), sizeof(uint32_t)); 1959 sc->malo_rx_th.wr_ihdr.it_len = htole16(sc->malo_rx_th_len); 1960 sc->malo_rx_th.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 1961} 1962 1963static void 1964malo_sysctlattach(struct malo_softc *sc) 1965{ 1966#ifdef MALO_DEBUG 1967 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1968 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1969 1970 sc->malo_debug = malo_debug; 1971 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1972 "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1973 "control debugging printfs"); 1974#endif 1975} 1976 1977static void 1978malo_announce(struct malo_softc *sc) 1979{ 1980 struct ifnet *ifp = sc->malo_ifp; 1981 1982 if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1983 sc->malo_hwspecs.hwversion, 1984 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1985 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1986 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1987 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1988 sc->malo_hwspecs.regioncode); 1989 1990 if (bootverbose || malo_rxbuf != MALO_RXBUF) 1991 if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1992 if (bootverbose || malo_txbuf != MALO_TXBUF) 1993 if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1994} 1995 1996/* 1997 * Convert net80211 channel to a HAL channel. 1998 */ 1999static void 2000malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 2001{ 2002 hc->channel = chan->ic_ieee; 2003 2004 *(uint32_t *)&hc->flags = 0; 2005 if (IEEE80211_IS_CHAN_2GHZ(chan)) 2006 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 2007} 2008 2009/* 2010 * Set/change channels. If the channel is really being changed, 2011 * it's done by reseting the chip. To accomplish this we must 2012 * first cleanup any pending DMA, then restart stuff after a la 2013 * malo_init. 2014 */ 2015static int 2016malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 2017{ 2018 struct malo_hal *mh = sc->malo_mh; 2019 struct malo_hal_channel hchan; 2020 2021 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 2022 __func__, chan->ic_freq, chan->ic_flags); 2023 2024 /* 2025 * Convert to a HAL channel description with the flags constrained 2026 * to reflect the current operating mode. 2027 */ 2028 malo_mapchan(&hchan, chan); 2029 malo_hal_intrset(mh, 0); /* disable interrupts */ 2030 malo_hal_setchannel(mh, &hchan); 2031 malo_hal_settxpower(mh, &hchan); 2032 2033 /* 2034 * Update internal state. 2035 */ 2036 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 2037 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 2038 if (IEEE80211_IS_CHAN_ANYG(chan)) { 2039 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 2040 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 2041 } else { 2042 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 2043 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 2044 } 2045 sc->malo_curchan = hchan; 2046 malo_hal_intrset(mh, sc->malo_imask); 2047 2048 return 0; 2049} 2050 2051static void 2052malo_scan_start(struct ieee80211com *ic) 2053{ 2054 struct ifnet *ifp = ic->ic_ifp; 2055 struct malo_softc *sc = ifp->if_softc; 2056 2057 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2058} 2059 2060static void 2061malo_scan_end(struct ieee80211com *ic) 2062{ 2063 struct ifnet *ifp = ic->ic_ifp; 2064 struct malo_softc *sc = ifp->if_softc; 2065 2066 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2067} 2068 2069static void 2070malo_set_channel(struct ieee80211com *ic) 2071{ 2072 struct ifnet *ifp = ic->ic_ifp; 2073 struct malo_softc *sc = ifp->if_softc; 2074 2075 (void) malo_chan_set(sc, ic->ic_curchan); 2076} 2077 2078static void 2079malo_rx_proc(void *arg, int npending) 2080{ 2081#define IEEE80211_DIR_DSTODS(wh) \ 2082 ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2083 IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2084 struct malo_softc *sc = arg; 2085 struct ifnet *ifp = sc->malo_ifp; 2086 struct ieee80211com *ic = ifp->if_l2com; 2087 struct malo_rxbuf *bf; 2088 struct malo_rxdesc *ds; 2089 struct mbuf *m, *mnew; 2090 struct ieee80211_qosframe *wh; 2091 struct ieee80211_qosframe_addr4 *wh4; 2092 struct ieee80211_node *ni; 2093 int off, len, hdrlen, pktlen, rssi, ntodo; 2094 uint8_t *data, status; 2095 uint32_t readptr, writeptr; 2096 2097 DPRINTF(sc, MALO_DEBUG_RX_PROC, 2098 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2099 __func__, npending, 2100 sc->malo_hwspecs.rxdesc_read, 2101 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2102 sc->malo_hwspecs.rxdesc_write, 2103 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2104 2105 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2106 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2107 if (readptr == writeptr) 2108 return; 2109 2110 bf = sc->malo_rxnext; 2111 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2112 if (bf == NULL) { 2113 bf = STAILQ_FIRST(&sc->malo_rxbuf); 2114 break; 2115 } 2116 ds = bf->bf_desc; 2117 if (bf->bf_m == NULL) { 2118 /* 2119 * If data allocation failed previously there 2120 * will be no buffer; try again to re-populate it. 2121 * Note the firmware will not advance to the next 2122 * descriptor with a dma buffer so we must mimic 2123 * this or we'll get out of sync. 2124 */ 2125 DPRINTF(sc, MALO_DEBUG_ANY, 2126 "%s: rx buf w/o dma memory\n", __func__); 2127 (void)malo_rxbuf_init(sc, bf); 2128 break; 2129 } 2130 MALO_RXDESC_SYNC(sc, ds, 2131 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2132 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2133 break; 2134 2135 readptr = le32toh(ds->physnext); 2136 2137#ifdef MALO_DEBUG 2138 if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2139 malo_printrxbuf(bf, 0); 2140#endif 2141 status = ds->status; 2142 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2143 ifp->if_ierrors++; 2144 goto rx_next; 2145 } 2146 /* 2147 * Sync the data buffer. 2148 */ 2149 len = le16toh(ds->pktlen); 2150 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2151 BUS_DMASYNC_POSTREAD); 2152 /* 2153 * The 802.11 header is provided all or in part at the front; 2154 * use it to calculate the true size of the header that we'll 2155 * construct below. We use this to figure out where to copy 2156 * payload prior to constructing the header. 2157 */ 2158 m = bf->bf_m; 2159 data = mtod(m, uint8_t *);; 2160 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2161 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2162 2163 /* 2164 * Calculate RSSI. XXX wrong 2165 */ 2166 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2167 if (rssi > 100) 2168 rssi = 100; 2169 2170 pktlen = hdrlen + (len - off); 2171 /* 2172 * NB: we know our frame is at least as large as 2173 * IEEE80211_MIN_LEN because there is a 4-address frame at 2174 * the front. Hence there's no need to vet the packet length. 2175 * If the frame in fact is too small it should be discarded 2176 * at the net80211 layer. 2177 */ 2178 2179 /* XXX don't need mbuf, just dma buffer */ 2180 mnew = malo_getrxmbuf(sc, bf); 2181 if (mnew == NULL) { 2182 ifp->if_ierrors++; 2183 goto rx_next; 2184 } 2185 /* 2186 * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2187 * re-setup the rx descriptor using the replacement dma 2188 * buffer we just installed above. 2189 */ 2190 bf->bf_m = mnew; 2191 m->m_data += off - hdrlen; 2192 m->m_pkthdr.len = m->m_len = pktlen; 2193 m->m_pkthdr.rcvif = ifp; 2194 2195 /* 2196 * Piece 802.11 header together. 2197 */ 2198 wh = mtod(m, struct ieee80211_qosframe *); 2199 /* NB: don't need to do this sometimes but ... */ 2200 /* XXX special case so we can memcpy after m_devget? */ 2201 ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2202 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2203 if (IEEE80211_DIR_DSTODS(wh)) { 2204 wh4 = mtod(m, 2205 struct ieee80211_qosframe_addr4*); 2206 *(uint16_t *)wh4->i_qos = ds->qosctrl; 2207 } else { 2208 *(uint16_t *)wh->i_qos = ds->qosctrl; 2209 } 2210 } 2211 if (sc->malo_drvbpf != NULL) { 2212 sc->malo_rx_th.wr_flags = 0; 2213 sc->malo_rx_th.wr_rate = ds->rate; 2214 sc->malo_rx_th.wr_antsignal = rssi; 2215 sc->malo_rx_th.wr_antnoise = ds->nf; 2216 2217 bpf_mtap2(ifp->if_bpf, &sc->malo_rx_th, 2218 sc->malo_rx_th_len, m); 2219 } 2220#ifdef MALO_DEBUG 2221 if (IFF_DUMPPKTS_RECV(sc, wh)) { 2222 ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2223 len, ds->rate, rssi); 2224 } 2225#endif 2226 ifp->if_ipackets++; 2227 2228 /* dispatch */ 2229 ni = ieee80211_find_rxnode(ic, 2230 (struct ieee80211_frame_min *)wh); 2231 if (ni != NULL) { 2232 (void) ieee80211_input(ni, m, rssi, ds->nf, 0); 2233 ieee80211_free_node(ni); 2234 } else 2235 (void) ieee80211_input_all(ic, m, rssi, ds->nf, 0); 2236rx_next: 2237 /* NB: ignore ENOMEM so we process more descriptors */ 2238 (void) malo_rxbuf_init(sc, bf); 2239 bf = STAILQ_NEXT(bf, bf_list); 2240 } 2241 2242 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2243 sc->malo_rxnext = bf; 2244 2245 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2246 !IFQ_IS_EMPTY(&ifp->if_snd)) 2247 malo_start(ifp); 2248#undef IEEE80211_DIR_DSTODS 2249} 2250 2251static void 2252malo_stop(struct ifnet *ifp, int disable) 2253{ 2254 struct malo_softc *sc = ifp->if_softc; 2255 2256 MALO_LOCK(sc); 2257 malo_stop_locked(ifp, disable); 2258 MALO_UNLOCK(sc); 2259} 2260 2261/* 2262 * Reclaim all tx queue resources. 2263 */ 2264static void 2265malo_tx_cleanup(struct malo_softc *sc) 2266{ 2267 int i; 2268 2269 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2270 malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2271} 2272 2273int 2274malo_detach(struct malo_softc *sc) 2275{ 2276 struct ifnet *ifp = sc->malo_ifp; 2277 struct ieee80211com *ic = ifp->if_l2com; 2278 2279 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2280 __func__, ifp->if_flags); 2281 2282 malo_stop(ifp, 1); 2283 2284 if (sc->malo_tq != NULL) { 2285 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2286 taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2287 taskqueue_free(sc->malo_tq); 2288 sc->malo_tq = NULL; 2289 } 2290 2291 bpfdetach(ifp); 2292 2293 /* 2294 * NB: the order of these is important: 2295 * o call the 802.11 layer before detaching the hal to 2296 * insure callbacks into the driver to delete global 2297 * key cache entries can be handled 2298 * o reclaim the tx queue data structures after calling 2299 * the 802.11 layer as we'll get called back to reclaim 2300 * node state and potentially want to use them 2301 * o to cleanup the tx queues the hal is called, so detach 2302 * it last 2303 * Other than that, it's straightforward... 2304 */ 2305 ieee80211_ifdetach(ic); 2306 malo_dma_cleanup(sc); 2307 malo_tx_cleanup(sc); 2308 malo_hal_detach(sc->malo_mh); 2309 if_free(ifp); 2310 2311 MALO_LOCK_DESTROY(sc); 2312 2313 return 0; 2314} 2315 2316void 2317malo_shutdown(struct malo_softc *sc) 2318{ 2319 malo_stop(sc->malo_ifp, 1); 2320} 2321 2322void 2323malo_suspend(struct malo_softc *sc) 2324{ 2325 struct ifnet *ifp = sc->malo_ifp; 2326 2327 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2328 __func__, ifp->if_flags); 2329 2330 malo_stop(ifp, 1); 2331} 2332 2333void 2334malo_resume(struct malo_softc *sc) 2335{ 2336 struct ifnet *ifp = sc->malo_ifp; 2337 2338 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2339 __func__, ifp->if_flags); 2340 2341 if (ifp->if_flags & IFF_UP) 2342 malo_init(sc); 2343} 2344