ixgbe_osdep.h revision 239940
1179055Sjfv/****************************************************************************** 2171384Sjfv 3230775Sjfv Copyright (c) 2001-2012, Intel Corporation 4179055Sjfv All rights reserved. 5179055Sjfv 6179055Sjfv Redistribution and use in source and binary forms, with or without 7179055Sjfv modification, are permitted provided that the following conditions are met: 8179055Sjfv 9179055Sjfv 1. Redistributions of source code must retain the above copyright notice, 10179055Sjfv this list of conditions and the following disclaimer. 11179055Sjfv 12179055Sjfv 2. Redistributions in binary form must reproduce the above copyright 13179055Sjfv notice, this list of conditions and the following disclaimer in the 14179055Sjfv documentation and/or other materials provided with the distribution. 15179055Sjfv 16179055Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17179055Sjfv contributors may be used to endorse or promote products derived from 18179055Sjfv this software without specific prior written permission. 19179055Sjfv 20179055Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21179055Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22179055Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23179055Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24179055Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25179055Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26179055Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27179055Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28179055Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29179055Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30179055Sjfv POSSIBILITY OF SUCH DAMAGE. 31171384Sjfv 32179055Sjfv******************************************************************************/ 33179055Sjfv/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.h 239940 2012-08-31 10:07:38Z scottl $*/ 34171384Sjfv 35171384Sjfv#ifndef _IXGBE_OS_H_ 36171384Sjfv#define _IXGBE_OS_H_ 37171384Sjfv 38171384Sjfv#include <sys/types.h> 39171384Sjfv#include <sys/param.h> 40230775Sjfv#include <sys/endian.h> 41171384Sjfv#include <sys/systm.h> 42171384Sjfv#include <sys/mbuf.h> 43171384Sjfv#include <sys/protosw.h> 44171384Sjfv#include <sys/socket.h> 45171384Sjfv#include <sys/malloc.h> 46171384Sjfv#include <sys/kernel.h> 47171384Sjfv#include <sys/bus.h> 48171384Sjfv#include <machine/bus.h> 49171384Sjfv#include <sys/rman.h> 50171384Sjfv#include <machine/resource.h> 51171384Sjfv#include <vm/vm.h> 52171384Sjfv#include <vm/pmap.h> 53171384Sjfv#include <machine/clock.h> 54171384Sjfv#include <dev/pci/pcivar.h> 55171384Sjfv#include <dev/pci/pcireg.h> 56171384Sjfv 57171384Sjfv#define ASSERT(x) if(!(x)) panic("IXGBE: x") 58238149Sjfv#define EWARN(H, W, S) printf(W) 59171384Sjfv 60171384Sjfv/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 61171384Sjfv#define usec_delay(x) DELAY(x) 62171384Sjfv#define msec_delay(x) DELAY(1000*(x)) 63171384Sjfv 64171384Sjfv#define DBG 0 65171384Sjfv#define MSGOUT(S, A, B) printf(S "\n", A, B) 66171384Sjfv#define DEBUGFUNC(F) DEBUGOUT(F); 67171384Sjfv#if DBG 68171384Sjfv #define DEBUGOUT(S) printf(S "\n") 69171384Sjfv #define DEBUGOUT1(S,A) printf(S "\n",A) 70171384Sjfv #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 71171384Sjfv #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 72171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 73171384Sjfv#else 74171384Sjfv #define DEBUGOUT(S) 75171384Sjfv #define DEBUGOUT1(S,A) 76171384Sjfv #define DEBUGOUT2(S,A,B) 77171384Sjfv #define DEBUGOUT3(S,A,B,C) 78171384Sjfv #define DEBUGOUT6(S,A,B,C,D,E,F) 79171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) 80171384Sjfv#endif 81171384Sjfv 82171384Sjfv#define FALSE 0 83185352Sjfv#define false 0 /* shared code requires this */ 84171384Sjfv#define TRUE 1 85185352Sjfv#define true 1 86171384Sjfv#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 87171384Sjfv#define PCI_COMMAND_REGISTER PCIR_COMMAND 88230775Sjfv 89230775Sjfv/* Bunch of defines for shared code bogosity */ 90194875Sjfv#define UNREFERENCED_PARAMETER(_p) 91230775Sjfv#define UNREFERENCED_1PARAMETER(_p) 92230775Sjfv#define UNREFERENCED_2PARAMETER(_p, _q) 93230775Sjfv#define UNREFERENCED_3PARAMETER(_p, _q, _r) 94230775Sjfv#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 95171384Sjfv 96194875Sjfv 97215911Sjfv#define IXGBE_NTOHL(_i) ntohl(_i) 98215911Sjfv#define IXGBE_NTOHS(_i) ntohs(_i) 99171384Sjfv 100230775Sjfv/* XXX these need to be revisited */ 101230775Sjfv#define IXGBE_CPU_TO_LE32 le32toh 102230775Sjfv#define IXGBE_LE32_TO_CPUS le32dec 103230775Sjfv 104185352Sjfvtypedef uint8_t u8; 105185352Sjfvtypedef int8_t s8; 106185352Sjfvtypedef uint16_t u16; 107185352Sjfvtypedef uint32_t u32; 108185352Sjfvtypedef int32_t s32; 109185352Sjfvtypedef uint64_t u64; 110230790Sjfv#ifndef __bool_true_false_are_defined 111185352Sjfvtypedef boolean_t bool; 112230790Sjfv#endif 113185352Sjfv 114238149Sjfv/* shared code requires this */ 115238149Sjfv#define __le16 u16 116238149Sjfv#define __le32 u32 117238149Sjfv#define __le64 u64 118238149Sjfv#define __be16 u16 119238149Sjfv#define __be32 u32 120238149Sjfv#define __be64 u64 121238149Sjfv 122171384Sjfv#define le16_to_cpu 123171384Sjfv 124190873Sjfv#if __FreeBSD_version < 800000 125179055Sjfv#if defined(__i386__) || defined(__amd64__) 126179055Sjfv#define mb() __asm volatile("mfence" ::: "memory") 127179055Sjfv#define wmb() __asm volatile("sfence" ::: "memory") 128179055Sjfv#define rmb() __asm volatile("lfence" ::: "memory") 129179055Sjfv#else 130179055Sjfv#define mb() 131179055Sjfv#define rmb() 132179055Sjfv#define wmb() 133179055Sjfv#endif 134190873Sjfv#endif 135179055Sjfv 136200239Sjfv#if defined(__i386__) || defined(__amd64__) 137200239Sjfvstatic __inline 138200239Sjfvvoid prefetch(void *x) 139200239Sjfv{ 140200239Sjfv __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 141200239Sjfv} 142200239Sjfv#else 143200239Sjfv#define prefetch(x) 144200239Sjfv#endif 145200239Sjfv 146239940Sscottl/* 147239940Sscottl * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 148239940Sscottl * non-overlapping regions and 32-byte padding on both src and dst. 149239940Sscottl */ 150239940Sscottlstatic __inline int 151239940Sscottlixgbe_bcopy(void *_src, void *_dst, int l) 152239940Sscottl{ 153239940Sscottl uint64_t *src = _src; 154239940Sscottl uint64_t *dst = _dst; 155239940Sscottl 156239940Sscottl for (; l > 0; l -= 32) { 157239940Sscottl *dst++ = *src++; 158239940Sscottl *dst++ = *src++; 159239940Sscottl *dst++ = *src++; 160239940Sscottl *dst++ = *src++; 161239940Sscottl } 162239940Sscottl return (0); 163239940Sscottl} 164239940Sscottl 165171384Sjfvstruct ixgbe_osdep 166171384Sjfv{ 167171384Sjfv bus_space_tag_t mem_bus_space_tag; 168171384Sjfv bus_space_handle_t mem_bus_space_handle; 169171384Sjfv struct device *dev; 170171384Sjfv}; 171171384Sjfv 172190873Sjfv/* These routines are needed by the shared code */ 173171384Sjfvstruct ixgbe_hw; 174171384Sjfvextern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 175171384Sjfv#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 176171384Sjfv 177190873Sjfvextern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 178190873Sjfv#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 179190873Sjfv 180171384Sjfv#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 181171384Sjfv 182171384Sjfv#define IXGBE_READ_REG(a, reg) (\ 183171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 184171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 185171384Sjfv reg)) 186171384Sjfv 187171384Sjfv#define IXGBE_WRITE_REG(a, reg, value) (\ 188171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 189171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 190171384Sjfv reg, value)) 191171384Sjfv 192171384Sjfv 193171384Sjfv#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\ 194171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 195171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 196171384Sjfv (reg + ((offset) << 2)))) 197171384Sjfv 198171384Sjfv#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\ 199171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 200171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 201171384Sjfv (reg + ((offset) << 2)), value)) 202171384Sjfv 203171384Sjfv 204171384Sjfv#endif /* _IXGBE_OS_H_ */ 205