ixgbe_osdep.h revision 230775
1179055Sjfv/****************************************************************************** 2171384Sjfv 3230775Sjfv Copyright (c) 2001-2012, Intel Corporation 4179055Sjfv All rights reserved. 5179055Sjfv 6179055Sjfv Redistribution and use in source and binary forms, with or without 7179055Sjfv modification, are permitted provided that the following conditions are met: 8179055Sjfv 9179055Sjfv 1. Redistributions of source code must retain the above copyright notice, 10179055Sjfv this list of conditions and the following disclaimer. 11179055Sjfv 12179055Sjfv 2. Redistributions in binary form must reproduce the above copyright 13179055Sjfv notice, this list of conditions and the following disclaimer in the 14179055Sjfv documentation and/or other materials provided with the distribution. 15179055Sjfv 16179055Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17179055Sjfv contributors may be used to endorse or promote products derived from 18179055Sjfv this software without specific prior written permission. 19179055Sjfv 20179055Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21179055Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22179055Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23179055Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24179055Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25179055Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26179055Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27179055Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28179055Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29179055Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30179055Sjfv POSSIBILITY OF SUCH DAMAGE. 31171384Sjfv 32179055Sjfv******************************************************************************/ 33179055Sjfv/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.h 230775 2012-01-30 16:42:02Z jfv $*/ 34171384Sjfv 35171384Sjfv#ifndef _IXGBE_OS_H_ 36171384Sjfv#define _IXGBE_OS_H_ 37171384Sjfv 38171384Sjfv#include <sys/types.h> 39171384Sjfv#include <sys/param.h> 40230775Sjfv#include <sys/endian.h> 41171384Sjfv#include <sys/systm.h> 42171384Sjfv#include <sys/mbuf.h> 43171384Sjfv#include <sys/protosw.h> 44171384Sjfv#include <sys/socket.h> 45171384Sjfv#include <sys/malloc.h> 46171384Sjfv#include <sys/kernel.h> 47171384Sjfv#include <sys/bus.h> 48171384Sjfv#include <machine/bus.h> 49171384Sjfv#include <sys/rman.h> 50171384Sjfv#include <machine/resource.h> 51171384Sjfv#include <vm/vm.h> 52171384Sjfv#include <vm/pmap.h> 53171384Sjfv#include <machine/clock.h> 54171384Sjfv#include <dev/pci/pcivar.h> 55171384Sjfv#include <dev/pci/pcireg.h> 56171384Sjfv 57171384Sjfv#define ASSERT(x) if(!(x)) panic("IXGBE: x") 58171384Sjfv 59171384Sjfv/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 60171384Sjfv#define usec_delay(x) DELAY(x) 61171384Sjfv#define msec_delay(x) DELAY(1000*(x)) 62171384Sjfv 63171384Sjfv#define DBG 0 64171384Sjfv#define MSGOUT(S, A, B) printf(S "\n", A, B) 65171384Sjfv#define DEBUGFUNC(F) DEBUGOUT(F); 66171384Sjfv#if DBG 67171384Sjfv #define DEBUGOUT(S) printf(S "\n") 68171384Sjfv #define DEBUGOUT1(S,A) printf(S "\n",A) 69171384Sjfv #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 70171384Sjfv #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 71171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 72171384Sjfv#else 73171384Sjfv #define DEBUGOUT(S) 74171384Sjfv #define DEBUGOUT1(S,A) 75171384Sjfv #define DEBUGOUT2(S,A,B) 76171384Sjfv #define DEBUGOUT3(S,A,B,C) 77171384Sjfv #define DEBUGOUT6(S,A,B,C,D,E,F) 78171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) 79171384Sjfv#endif 80171384Sjfv 81171384Sjfv#define FALSE 0 82185352Sjfv#define false 0 /* shared code requires this */ 83171384Sjfv#define TRUE 1 84185352Sjfv#define true 1 85171384Sjfv#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 86171384Sjfv#define PCI_COMMAND_REGISTER PCIR_COMMAND 87230775Sjfv 88230775Sjfv/* Bunch of defines for shared code bogosity */ 89194875Sjfv#define UNREFERENCED_PARAMETER(_p) 90230775Sjfv#define UNREFERENCED_1PARAMETER(_p) 91230775Sjfv#define UNREFERENCED_2PARAMETER(_p, _q) 92230775Sjfv#define UNREFERENCED_3PARAMETER(_p, _q, _r) 93230775Sjfv#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 94171384Sjfv 95194875Sjfv 96215911Sjfv#define IXGBE_NTOHL(_i) ntohl(_i) 97215911Sjfv#define IXGBE_NTOHS(_i) ntohs(_i) 98171384Sjfv 99230775Sjfv/* XXX these need to be revisited */ 100230775Sjfv#define IXGBE_CPU_TO_LE32 le32toh 101230775Sjfv#define IXGBE_LE32_TO_CPUS le32dec 102230775Sjfv 103185352Sjfvtypedef uint8_t u8; 104185352Sjfvtypedef int8_t s8; 105185352Sjfvtypedef uint16_t u16; 106185352Sjfvtypedef uint32_t u32; 107185352Sjfvtypedef int32_t s32; 108185352Sjfvtypedef uint64_t u64; 109185352Sjfvtypedef boolean_t bool; 110185352Sjfv 111171384Sjfv#define le16_to_cpu 112171384Sjfv 113190873Sjfv#if __FreeBSD_version < 800000 114179055Sjfv#if defined(__i386__) || defined(__amd64__) 115179055Sjfv#define mb() __asm volatile("mfence" ::: "memory") 116179055Sjfv#define wmb() __asm volatile("sfence" ::: "memory") 117179055Sjfv#define rmb() __asm volatile("lfence" ::: "memory") 118179055Sjfv#else 119179055Sjfv#define mb() 120179055Sjfv#define rmb() 121179055Sjfv#define wmb() 122179055Sjfv#endif 123190873Sjfv#endif 124179055Sjfv 125200239Sjfv#if defined(__i386__) || defined(__amd64__) 126200239Sjfvstatic __inline 127200239Sjfvvoid prefetch(void *x) 128200239Sjfv{ 129200239Sjfv __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 130200239Sjfv} 131200239Sjfv#else 132200239Sjfv#define prefetch(x) 133200239Sjfv#endif 134200239Sjfv 135171384Sjfvstruct ixgbe_osdep 136171384Sjfv{ 137171384Sjfv bus_space_tag_t mem_bus_space_tag; 138171384Sjfv bus_space_handle_t mem_bus_space_handle; 139171384Sjfv struct device *dev; 140171384Sjfv}; 141171384Sjfv 142190873Sjfv/* These routines are needed by the shared code */ 143171384Sjfvstruct ixgbe_hw; 144171384Sjfvextern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 145171384Sjfv#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 146171384Sjfv 147190873Sjfvextern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 148190873Sjfv#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 149190873Sjfv 150171384Sjfv#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 151171384Sjfv 152171384Sjfv#define IXGBE_READ_REG(a, reg) (\ 153171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 154171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 155171384Sjfv reg)) 156171384Sjfv 157171384Sjfv#define IXGBE_WRITE_REG(a, reg, value) (\ 158171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 159171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 160171384Sjfv reg, value)) 161171384Sjfv 162171384Sjfv 163171384Sjfv#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\ 164171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 165171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 166171384Sjfv (reg + ((offset) << 2)))) 167171384Sjfv 168171384Sjfv#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\ 169171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 170171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 171171384Sjfv (reg + ((offset) << 2)), value)) 172171384Sjfv 173171384Sjfv 174171384Sjfv#endif /* _IXGBE_OS_H_ */ 175