ixgbe_api.c revision 190873
1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.c 190873 2009-04-10 00:22:48Z jfv $*/ 34 35#include "ixgbe_api.h" 36#include "ixgbe_common.h" 37 38extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 39extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 40 41/** 42 * ixgbe_init_shared_code - Initialize the shared code 43 * @hw: pointer to hardware structure 44 * 45 * This will assign function pointers and assign the MAC type and PHY code. 46 * Does not touch the hardware. This function must be called prior to any 47 * other function in the shared code. The ixgbe_hw structure should be 48 * memset to 0 prior to calling this function. The following fields in 49 * hw structure should be filled in prior to calling this function: 50 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 51 * subsystem_vendor_id, and revision_id 52 **/ 53s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 54{ 55 s32 status; 56 57 /* 58 * Set the mac type 59 */ 60 ixgbe_set_mac_type(hw); 61 62 switch (hw->mac.type) { 63 case ixgbe_mac_82598EB: 64 status = ixgbe_init_ops_82598(hw); 65 break; 66 case ixgbe_mac_82599EB: 67 status = ixgbe_init_ops_82599(hw); 68 break; 69 default: 70 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 71 break; 72 } 73 74 return status; 75} 76 77/** 78 * ixgbe_set_mac_type - Sets MAC type 79 * @hw: pointer to the HW structure 80 * 81 * This function sets the mac type of the adapter based on the 82 * vendor ID and device ID stored in the hw structure. 83 **/ 84s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 85{ 86 s32 ret_val = IXGBE_SUCCESS; 87 88 DEBUGFUNC("ixgbe_set_mac_type\n"); 89 90 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 91 switch (hw->device_id) { 92 case IXGBE_DEV_ID_82598: 93 case IXGBE_DEV_ID_82598_BX: 94 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 95 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 96 case IXGBE_DEV_ID_82598AT: 97 case IXGBE_DEV_ID_82598EB_CX4: 98 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 99 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 100 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 101 case IXGBE_DEV_ID_82598EB_XF_LR: 102 case IXGBE_DEV_ID_82598EB_SFP_LOM: 103 hw->mac.type = ixgbe_mac_82598EB; 104 break; 105 case IXGBE_DEV_ID_82599_KX4: 106 case IXGBE_DEV_ID_82599_SFP: 107 case IXGBE_DEV_ID_82599_CX4: 108 hw->mac.type = ixgbe_mac_82599EB; 109 break; 110 default: 111 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 112 break; 113 } 114 } else { 115 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 116 } 117 118 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 119 hw->mac.type, ret_val); 120 return ret_val; 121} 122 123/** 124 * ixgbe_init_hw - Initialize the hardware 125 * @hw: pointer to hardware structure 126 * 127 * Initialize the hardware by resetting and then starting the hardware 128 **/ 129s32 ixgbe_init_hw(struct ixgbe_hw *hw) 130{ 131 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 132 IXGBE_NOT_IMPLEMENTED); 133} 134 135/** 136 * ixgbe_reset_hw - Performs a hardware reset 137 * @hw: pointer to hardware structure 138 * 139 * Resets the hardware by resetting the transmit and receive units, masks and 140 * clears all interrupts, performs a PHY reset, and performs a MAC reset 141 **/ 142s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 143{ 144 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 145 IXGBE_NOT_IMPLEMENTED); 146} 147 148/** 149 * ixgbe_start_hw - Prepares hardware for Rx/Tx 150 * @hw: pointer to hardware structure 151 * 152 * Starts the hardware by filling the bus info structure and media type, 153 * clears all on chip counters, initializes receive address registers, 154 * multicast table, VLAN filter table, calls routine to setup link and 155 * flow control settings, and leaves transmit and receive units disabled 156 * and uninitialized. 157 **/ 158s32 ixgbe_start_hw(struct ixgbe_hw *hw) 159{ 160 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 161 IXGBE_NOT_IMPLEMENTED); 162} 163 164/** 165 * ixgbe_clear_hw_cntrs - Clear hardware counters 166 * @hw: pointer to hardware structure 167 * 168 * Clears all hardware statistics counters by reading them from the hardware 169 * Statistics counters are clear on read. 170 **/ 171s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 172{ 173 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 174 IXGBE_NOT_IMPLEMENTED); 175} 176 177/** 178 * ixgbe_get_media_type - Get media type 179 * @hw: pointer to hardware structure 180 * 181 * Returns the media type (fiber, copper, backplane) 182 **/ 183enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 184{ 185 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 186 ixgbe_media_type_unknown); 187} 188 189/** 190 * ixgbe_get_mac_addr - Get MAC address 191 * @hw: pointer to hardware structure 192 * @mac_addr: Adapter MAC address 193 * 194 * Reads the adapter's MAC address from the first Receive Address Register 195 * (RAR0) A reset of the adapter must have been performed prior to calling 196 * this function in order for the MAC address to have been loaded from the 197 * EEPROM into RAR0 198 **/ 199s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 200{ 201 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 202 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 203} 204 205/** 206 * ixgbe_get_san_mac_addr - Get SAN MAC address 207 * @hw: pointer to hardware structure 208 * @san_mac_addr: SAN MAC address 209 * 210 * Reads the SAN MAC address from the EEPROM, if it's available. This is 211 * per-port, so set_lan_id() must be called before reading the addresses. 212 **/ 213s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 214{ 215 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 216 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 217} 218 219/** 220 * ixgbe_set_san_mac_addr - Write a SAN MAC address 221 * @hw: pointer to hardware structure 222 * @san_mac_addr: SAN MAC address 223 * 224 * Writes A SAN MAC address to the EEPROM. 225 **/ 226s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 227{ 228 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 229 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 230} 231 232/** 233 * ixgbe_get_device_caps - Get additional device capabilities 234 * @hw: pointer to hardware structure 235 * @device_caps: the EEPROM word for device capabilities 236 * 237 * Reads the extra device capabilities from the EEPROM 238 **/ 239s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 240{ 241 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 242 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 243} 244 245/** 246 * ixgbe_get_bus_info - Set PCI bus info 247 * @hw: pointer to hardware structure 248 * 249 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 250 **/ 251s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 252{ 253 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 254 IXGBE_NOT_IMPLEMENTED); 255} 256 257/** 258 * ixgbe_get_num_of_tx_queues - Get Tx queues 259 * @hw: pointer to hardware structure 260 * 261 * Returns the number of transmit queues for the given adapter. 262 **/ 263u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 264{ 265 return hw->mac.max_tx_queues; 266} 267 268/** 269 * ixgbe_get_num_of_rx_queues - Get Rx queues 270 * @hw: pointer to hardware structure 271 * 272 * Returns the number of receive queues for the given adapter. 273 **/ 274u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 275{ 276 return hw->mac.max_rx_queues; 277} 278 279/** 280 * ixgbe_stop_adapter - Disable Rx/Tx units 281 * @hw: pointer to hardware structure 282 * 283 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 284 * disables transmit and receive units. The adapter_stopped flag is used by 285 * the shared code and drivers to determine if the adapter is in a stopped 286 * state and should not touch the hardware. 287 **/ 288s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 289{ 290 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 291 IXGBE_NOT_IMPLEMENTED); 292} 293 294/** 295 * ixgbe_read_pba_num - Reads part number from EEPROM 296 * @hw: pointer to hardware structure 297 * @pba_num: stores the part number from the EEPROM 298 * 299 * Reads the part number from the EEPROM. 300 **/ 301s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 302{ 303 return ixgbe_read_pba_num_generic(hw, pba_num); 304} 305 306/** 307 * ixgbe_identify_phy - Get PHY type 308 * @hw: pointer to hardware structure 309 * 310 * Determines the physical layer module found on the current adapter. 311 **/ 312s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 313{ 314 s32 status = IXGBE_SUCCESS; 315 316 if (hw->phy.type == ixgbe_phy_unknown) { 317 status = ixgbe_call_func(hw, 318 hw->phy.ops.identify, 319 (hw), 320 IXGBE_NOT_IMPLEMENTED); 321 } 322 323 return status; 324} 325 326/** 327 * ixgbe_reset_phy - Perform a PHY reset 328 * @hw: pointer to hardware structure 329 **/ 330s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 331{ 332 s32 status = IXGBE_SUCCESS; 333 334 if (hw->phy.type == ixgbe_phy_unknown) { 335 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 336 status = IXGBE_ERR_PHY; 337 } 338 339 if (status == IXGBE_SUCCESS) { 340 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 341 IXGBE_NOT_IMPLEMENTED); 342 } 343 return status; 344} 345 346/** 347 * ixgbe_get_phy_firmware_version - 348 * @hw: pointer to hardware structure 349 * @firmware_version: pointer to firmware version 350 **/ 351s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 352{ 353 s32 status = IXGBE_SUCCESS; 354 355 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 356 (hw, firmware_version), 357 IXGBE_NOT_IMPLEMENTED); 358 return status; 359} 360 361/** 362 * ixgbe_read_phy_reg - Read PHY register 363 * @hw: pointer to hardware structure 364 * @reg_addr: 32 bit address of PHY register to read 365 * @phy_data: Pointer to read data from PHY register 366 * 367 * Reads a value from a specified PHY register 368 **/ 369s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 370 u16 *phy_data) 371{ 372 if (hw->phy.id == 0) 373 ixgbe_identify_phy(hw); 374 375 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 376 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 377} 378 379/** 380 * ixgbe_write_phy_reg - Write PHY register 381 * @hw: pointer to hardware structure 382 * @reg_addr: 32 bit PHY register to write 383 * @phy_data: Data to write to the PHY register 384 * 385 * Writes a value to specified PHY register 386 **/ 387s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 388 u16 phy_data) 389{ 390 if (hw->phy.id == 0) 391 ixgbe_identify_phy(hw); 392 393 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 394 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 395} 396 397/** 398 * ixgbe_setup_phy_link - Restart PHY autoneg 399 * @hw: pointer to hardware structure 400 * 401 * Restart autonegotiation and PHY and waits for completion. 402 **/ 403s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 404{ 405 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 406 IXGBE_NOT_IMPLEMENTED); 407} 408 409/** 410 * ixgbe_check_phy_link - Determine link and speed status 411 * @hw: pointer to hardware structure 412 * 413 * Reads a PHY register to determine if link is up and the current speed for 414 * the PHY. 415 **/ 416s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 417 bool *link_up) 418{ 419 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 420 link_up), IXGBE_NOT_IMPLEMENTED); 421} 422 423/** 424 * ixgbe_setup_phy_link_speed - Set auto advertise 425 * @hw: pointer to hardware structure 426 * @speed: new link speed 427 * @autoneg: TRUE if autonegotiation enabled 428 * 429 * Sets the auto advertised capabilities 430 **/ 431s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 432 bool autoneg, 433 bool autoneg_wait_to_complete) 434{ 435 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 436 autoneg, autoneg_wait_to_complete), 437 IXGBE_NOT_IMPLEMENTED); 438} 439 440/** 441 * ixgbe_setup_link - Configure link settings 442 * @hw: pointer to hardware structure 443 * 444 * Configures link settings based on values in the ixgbe_hw struct. 445 * Restarts the link. Performs autonegotiation if needed. 446 **/ 447s32 ixgbe_setup_link(struct ixgbe_hw *hw) 448{ 449 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 450 IXGBE_NOT_IMPLEMENTED); 451} 452 453/** 454 * ixgbe_check_link - Get link and speed status 455 * @hw: pointer to hardware structure 456 * 457 * Reads the links register to determine if link is up and the current speed 458 **/ 459s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 460 bool *link_up, bool link_up_wait_to_complete) 461{ 462 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 463 link_up, link_up_wait_to_complete), 464 IXGBE_NOT_IMPLEMENTED); 465} 466 467/** 468 * ixgbe_setup_link_speed - Set link speed 469 * @hw: pointer to hardware structure 470 * @speed: new link speed 471 * @autoneg: TRUE if autonegotiation enabled 472 * 473 * Set the link speed and restarts the link. 474 **/ 475s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 476 bool autoneg, 477 bool autoneg_wait_to_complete) 478{ 479 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 480 autoneg, autoneg_wait_to_complete), 481 IXGBE_NOT_IMPLEMENTED); 482} 483 484/** 485 * ixgbe_get_link_capabilities - Returns link capabilities 486 * @hw: pointer to hardware structure 487 * 488 * Determines the link capabilities of the current configuration. 489 **/ 490s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 491 bool *autoneg) 492{ 493 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 494 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 495} 496 497/** 498 * ixgbe_led_on - Turn on LEDs 499 * @hw: pointer to hardware structure 500 * @index: led number to turn on 501 * 502 * Turns on the software controllable LEDs. 503 **/ 504s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 505{ 506 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 507 IXGBE_NOT_IMPLEMENTED); 508} 509 510/** 511 * ixgbe_led_off - Turn off LEDs 512 * @hw: pointer to hardware structure 513 * @index: led number to turn off 514 * 515 * Turns off the software controllable LEDs. 516 **/ 517s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 518{ 519 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 520 IXGBE_NOT_IMPLEMENTED); 521} 522 523/** 524 * ixgbe_blink_led_start - Blink LEDs 525 * @hw: pointer to hardware structure 526 * @index: led number to blink 527 * 528 * Blink LED based on index. 529 **/ 530s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 531{ 532 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 533 IXGBE_NOT_IMPLEMENTED); 534} 535 536/** 537 * ixgbe_blink_led_stop - Stop blinking LEDs 538 * @hw: pointer to hardware structure 539 * 540 * Stop blinking LED based on index. 541 **/ 542s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 543{ 544 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 545 IXGBE_NOT_IMPLEMENTED); 546} 547 548/** 549 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 550 * @hw: pointer to hardware structure 551 * 552 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 553 * ixgbe_hw struct in order to set up EEPROM access. 554 **/ 555s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 556{ 557 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 558 IXGBE_NOT_IMPLEMENTED); 559} 560 561 562/** 563 * ixgbe_write_eeprom - Write word to EEPROM 564 * @hw: pointer to hardware structure 565 * @offset: offset within the EEPROM to be written to 566 * @data: 16 bit word to be written to the EEPROM 567 * 568 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 569 * called after this function, the EEPROM will most likely contain an 570 * invalid checksum. 571 **/ 572s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 573{ 574 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 575 IXGBE_NOT_IMPLEMENTED); 576} 577 578/** 579 * ixgbe_read_eeprom - Read word from EEPROM 580 * @hw: pointer to hardware structure 581 * @offset: offset within the EEPROM to be read 582 * @data: read 16 bit value from EEPROM 583 * 584 * Reads 16 bit value from EEPROM 585 **/ 586s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 587{ 588 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 589 IXGBE_NOT_IMPLEMENTED); 590} 591 592/** 593 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 594 * @hw: pointer to hardware structure 595 * @checksum_val: calculated checksum 596 * 597 * Performs checksum calculation and validates the EEPROM checksum 598 **/ 599s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 600{ 601 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 602 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 603} 604 605/** 606 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 607 * @hw: pointer to hardware structure 608 **/ 609s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 610{ 611 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 612 IXGBE_NOT_IMPLEMENTED); 613} 614 615/** 616 * ixgbe_insert_mac_addr - Find a RAR for this mac address 617 * @hw: pointer to hardware structure 618 * @addr: Address to put into receive address register 619 * @vmdq: VMDq pool to assign 620 * 621 * Puts an ethernet address into a receive address register, or 622 * finds the rar that it is aleady in; adds to the pool list 623 **/ 624s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 625{ 626 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 627 (hw, addr, vmdq), 628 IXGBE_NOT_IMPLEMENTED); 629} 630 631/** 632 * ixgbe_set_rar - Set Rx address register 633 * @hw: pointer to hardware structure 634 * @index: Receive address register to write 635 * @addr: Address to put into receive address register 636 * @vmdq: VMDq "set" 637 * @enable_addr: set flag that address is active 638 * 639 * Puts an ethernet address into a receive address register. 640 **/ 641s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 642 u32 enable_addr) 643{ 644 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 645 enable_addr), IXGBE_NOT_IMPLEMENTED); 646} 647 648/** 649 * ixgbe_clear_rar - Clear Rx address register 650 * @hw: pointer to hardware structure 651 * @index: Receive address register to write 652 * 653 * Puts an ethernet address into a receive address register. 654 **/ 655s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 656{ 657 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 658 IXGBE_NOT_IMPLEMENTED); 659} 660 661/** 662 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 663 * @hw: pointer to hardware structure 664 * @rar: receive address register index to associate with VMDq index 665 * @vmdq: VMDq set or pool index 666 **/ 667s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 668{ 669 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 670 IXGBE_NOT_IMPLEMENTED); 671} 672 673/** 674 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 675 * @hw: pointer to hardware structure 676 * @rar: receive address register index to disassociate with VMDq index 677 * @vmdq: VMDq set or pool index 678 **/ 679s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 680{ 681 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 682 IXGBE_NOT_IMPLEMENTED); 683} 684 685/** 686 * ixgbe_init_rx_addrs - Initializes receive address filters. 687 * @hw: pointer to hardware structure 688 * 689 * Places the MAC address in receive address register 0 and clears the rest 690 * of the receive address registers. Clears the multicast table. Assumes 691 * the receiver is in reset when the routine is called. 692 **/ 693s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 694{ 695 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 696 IXGBE_NOT_IMPLEMENTED); 697} 698 699/** 700 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 701 * @hw: pointer to hardware structure 702 **/ 703u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 704{ 705 return hw->mac.num_rar_entries; 706} 707 708/** 709 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 710 * @hw: pointer to hardware structure 711 * @addr_list: the list of new multicast addresses 712 * @addr_count: number of addresses 713 * @func: iterator function to walk the multicast address list 714 * 715 * The given list replaces any existing list. Clears the secondary addrs from 716 * receive address registers. Uses unused receive address registers for the 717 * first secondary addresses, and falls back to promiscuous mode as needed. 718 **/ 719s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 720 u32 addr_count, ixgbe_mc_addr_itr func) 721{ 722 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 723 addr_list, addr_count, func), 724 IXGBE_NOT_IMPLEMENTED); 725} 726 727/** 728 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 729 * @hw: pointer to hardware structure 730 * @mc_addr_list: the list of new multicast addresses 731 * @mc_addr_count: number of addresses 732 * @func: iterator function to walk the multicast address list 733 * 734 * The given list replaces any existing list. Clears the MC addrs from receive 735 * address registers and the multicast table. Uses unused receive address 736 * registers for the first multicast addresses, and hashes the rest into the 737 * multicast table. 738 **/ 739s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 740 u32 mc_addr_count, ixgbe_mc_addr_itr func) 741{ 742 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 743 mc_addr_list, mc_addr_count, func), 744 IXGBE_NOT_IMPLEMENTED); 745} 746 747/** 748 * ixgbe_enable_mc - Enable multicast address in RAR 749 * @hw: pointer to hardware structure 750 * 751 * Enables multicast address in RAR and the use of the multicast hash table. 752 **/ 753s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 754{ 755 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 756 IXGBE_NOT_IMPLEMENTED); 757} 758 759/** 760 * ixgbe_disable_mc - Disable multicast address in RAR 761 * @hw: pointer to hardware structure 762 * 763 * Disables multicast address in RAR and the use of the multicast hash table. 764 **/ 765s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 766{ 767 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 768 IXGBE_NOT_IMPLEMENTED); 769} 770 771/** 772 * ixgbe_clear_vfta - Clear VLAN filter table 773 * @hw: pointer to hardware structure 774 * 775 * Clears the VLAN filer table, and the VMDq index associated with the filter 776 **/ 777s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 778{ 779 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 780 IXGBE_NOT_IMPLEMENTED); 781} 782 783/** 784 * ixgbe_set_vfta - Set VLAN filter table 785 * @hw: pointer to hardware structure 786 * @vlan: VLAN id to write to VLAN filter 787 * @vind: VMDq output index that maps queue to VLAN id in VFTA 788 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 789 * 790 * Turn on/off specified VLAN in the VLAN filter table. 791 **/ 792s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 793{ 794 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 795 vlan_on), IXGBE_NOT_IMPLEMENTED); 796} 797 798/** 799 * ixgbe_fc_enable - Enable flow control 800 * @hw: pointer to hardware structure 801 * @packetbuf_num: packet buffer number (0-7) 802 * 803 * Configures the flow control settings based on SW configuration. 804 **/ 805s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 806{ 807 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 808 IXGBE_NOT_IMPLEMENTED); 809} 810 811/** 812 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 813 * @hw: pointer to hardware structure 814 * @reg: analog register to read 815 * @val: read value 816 * 817 * Performs write operation to analog register specified. 818 **/ 819s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 820{ 821 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 822 val), IXGBE_NOT_IMPLEMENTED); 823} 824 825/** 826 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 827 * @hw: pointer to hardware structure 828 * @reg: analog register to write 829 * @val: value to write 830 * 831 * Performs write operation to Atlas analog register specified. 832 **/ 833s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 834{ 835 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 836 val), IXGBE_NOT_IMPLEMENTED); 837} 838 839/** 840 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 841 * @hw: pointer to hardware structure 842 * 843 * Initializes the Unicast Table Arrays to zero on device load. This 844 * is part of the Rx init addr execution path. 845 **/ 846s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 847{ 848 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 849 IXGBE_NOT_IMPLEMENTED); 850} 851 852/** 853 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 854 * @hw: pointer to hardware structure 855 * @byte_offset: byte offset to read 856 * @data: value read 857 * 858 * Performs byte read operation to SFP module's EEPROM over I2C interface. 859 **/ 860s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 861 u8 *data) 862{ 863 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 864 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 865} 866 867/** 868 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 869 * @hw: pointer to hardware structure 870 * @byte_offset: byte offset to write 871 * @data: value to write 872 * 873 * Performs byte write operation to SFP module's EEPROM over I2C interface 874 * at a specified device address. 875 **/ 876s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 877 u8 data) 878{ 879 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 880 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 881} 882 883/** 884 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 885 * @hw: pointer to hardware structure 886 * @byte_offset: EEPROM byte offset to write 887 * @eeprom_data: value to write 888 * 889 * Performs byte write operation to SFP module's EEPROM over I2C interface. 890 **/ 891s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 892 u8 byte_offset, u8 eeprom_data) 893{ 894 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 895 (hw, byte_offset, eeprom_data), 896 IXGBE_NOT_IMPLEMENTED); 897} 898 899/** 900 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 901 * @hw: pointer to hardware structure 902 * @byte_offset: EEPROM byte offset to read 903 * @eeprom_data: value read 904 * 905 * Performs byte read operation to SFP module's EEPROM over I2C interface. 906 **/ 907s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 908{ 909 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 910 (hw, byte_offset, eeprom_data), 911 IXGBE_NOT_IMPLEMENTED); 912} 913 914/** 915 * ixgbe_get_supported_physical_layer - Returns physical layer type 916 * @hw: pointer to hardware structure 917 * 918 * Determines physical layer capabilities of the current configuration. 919 **/ 920u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 921{ 922 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 923 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 924} 925 926/** 927 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 928 * @hw: pointer to hardware structure 929 * @regval: bitfield to write to the Rx DMA register 930 * 931 * Enables the Rx DMA unit of the device. 932 **/ 933s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 934{ 935 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 936 (hw, regval), IXGBE_NOT_IMPLEMENTED); 937} 938