ispmbox.h revision 160080
1249423Sdim/* $FreeBSD: head/sys/dev/isp/ispmbox.h 160080 2006-07-03 08:24:09Z mjacob $ */ 2249423Sdim/*- 3249423Sdim * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 4249423Sdim * 5249423Sdim * Copyright (c) 1997-2006 by Matthew Jacob 6249423Sdim * All rights reserved. 7249423Sdim * 8249423Sdim * Redistribution and use in source and binary forms, with or without 9249423Sdim * modification, are permitted provided that the following conditions 10249423Sdim * are met: 11249423Sdim * 1. Redistributions of source code must retain the above copyright 12249423Sdim * notice immediately at the beginning of the file, without modification, 13249423Sdim * this list of conditions, and the following disclaimer. 14193326Sed * 2. The name of the author may not be used to endorse or promote products 15249423Sdim * derived from this software without specific prior written permission. 16249423Sdim * 17234353Sdim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18249423Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19198092Srdivacky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20249423Sdim * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21226633Sdim * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22249423Sdim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23226633Sdim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24226633Sdim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25193326Sed * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26226633Sdim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27193326Sed * SUCH DAMAGE. 28193326Sed * 29198092Srdivacky */ 30226633Sdim#ifndef _ISPMBOX_H 31226633Sdim#define _ISPMBOX_H 32226633Sdim 33234353Sdim/* 34193326Sed * Mailbox Command Opcodes 35234353Sdim */ 36226633Sdim#define MBOX_NO_OP 0x0000 37234353Sdim#define MBOX_LOAD_RAM 0x0001 38226633Sdim#define MBOX_EXEC_FIRMWARE 0x0002 39226633Sdim#define MBOX_DUMP_RAM 0x0003 40226633Sdim#define MBOX_WRITE_RAM_WORD 0x0004 41226633Sdim#define MBOX_READ_RAM_WORD 0x0005 42193326Sed#define MBOX_MAILBOX_REG_TEST 0x0006 43226633Sdim#define MBOX_VERIFY_CHECKSUM 0x0007 44193326Sed#define MBOX_ABOUT_FIRMWARE 0x0008 45226633Sdim /* 9 */ 46226633Sdim /* a */ 47198092Srdivacky /* b */ 48226633Sdim /* c */ 49193326Sed#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 50226633Sdim#define MBOX_CHECK_FIRMWARE 0x000e 51226633Sdim#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 52226633Sdim#define MBOX_INIT_REQ_QUEUE 0x0010 53226633Sdim#define MBOX_INIT_RES_QUEUE 0x0011 54193326Sed#define MBOX_EXECUTE_IOCB 0x0012 55226633Sdim#define MBOX_WAKE_UP 0x0013 56226633Sdim#define MBOX_STOP_FIRMWARE 0x0014 57226633Sdim#define MBOX_ABORT 0x0015 58226633Sdim#define MBOX_ABORT_DEVICE 0x0016 59226633Sdim#define MBOX_ABORT_TARGET 0x0017 60226633Sdim#define MBOX_BUS_RESET 0x0018 61226633Sdim#define MBOX_STOP_QUEUE 0x0019 62226633Sdim#define MBOX_START_QUEUE 0x001a 63193326Sed#define MBOX_SINGLE_STEP_QUEUE 0x001b 64226633Sdim#define MBOX_ABORT_QUEUE 0x001c 65226633Sdim#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 66198092Srdivacky /* 1e */ 67226633Sdim#define MBOX_GET_FIRMWARE_STATUS 0x001f 68226633Sdim#define MBOX_GET_INIT_SCSI_ID 0x0020 69226633Sdim#define MBOX_GET_SELECT_TIMEOUT 0x0021 70226633Sdim#define MBOX_GET_RETRY_COUNT 0x0022 71226633Sdim#define MBOX_GET_TAG_AGE_LIMIT 0x0023 72226633Sdim#define MBOX_GET_CLOCK_RATE 0x0024 73226633Sdim#define MBOX_GET_ACT_NEG_STATE 0x0025 74226633Sdim#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 75193326Sed#define MBOX_GET_SBUS_PARAMS 0x0027 76226633Sdim#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 77226633Sdim#define MBOX_GET_TARGET_PARAMS 0x0028 78226633Sdim#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 79198092Srdivacky#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 80226633Sdim /* 2b */ 81226633Sdim /* 2c */ 82193326Sed /* 2d */ 83226633Sdim /* 2e */ 84234353Sdim /* 2f */ 85226633Sdim#define MBOX_SET_INIT_SCSI_ID 0x0030 86198092Srdivacky#define MBOX_SET_SELECT_TIMEOUT 0x0031 87226633Sdim#define MBOX_SET_RETRY_COUNT 0x0032 88226633Sdim#define MBOX_SET_TAG_AGE_LIMIT 0x0033 89226633Sdim#define MBOX_SET_CLOCK_RATE 0x0034 90261991Sdim#define MBOX_SET_ACT_NEG_STATE 0x0035 91226633Sdim#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 92226633Sdim#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 93193326Sed#define MBOX_SET_PCI_PARAMETERS 0x0037 94193326Sed#define MBOX_SET_TARGET_PARAMS 0x0038 95226633Sdim#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 96226633Sdim#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 97226633Sdim /* 3b */ 98234353Sdim /* 3c */ 99226633Sdim /* 3d */ 100226633Sdim /* 3e */ 101226633Sdim /* 3f */ 102226633Sdim#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 103226633Sdim#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 104226633Sdim#define MBOX_EXEC_BIOS_IOCB 0x0042 105226633Sdim#define MBOX_SET_FW_FEATURES 0x004a 106226633Sdim#define MBOX_GET_FW_FEATURES 0x004b 107226633Sdim#define FW_FEATURE_FAST_POST 0x1 108226633Sdim#define FW_FEATURE_LVD_NOTIFY 0x2 109226633Sdim#define FW_FEATURE_RIO_32BIT 0x4 110226633Sdim#define FW_FEATURE_RIO_16BIT 0x8 111226633Sdim 112226633Sdim#define MBOX_INIT_REQ_QUEUE_A64 0x0052 113226633Sdim#define MBOX_INIT_RES_QUEUE_A64 0x0053 114226633Sdim 115226633Sdim#define MBOX_ENABLE_TARGET_MODE 0x0055 116226633Sdim#define ENABLE_TARGET_FLAG 0x8000 117226633Sdim#define ENABLE_TQING_FLAG 0x0004 118234353Sdim#define ENABLE_MANDATORY_DISC 0x0002 119226633Sdim#define MBOX_GET_TARGET_STATUS 0x0056 120226633Sdim 121226633Sdim/* These are for the ISP2X00 FC cards */ 122226633Sdim#define MBOX_GET_LOOP_ID 0x0020 123226633Sdim#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 124226633Sdim#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 125226633Sdim#define MBOX_GET_RESOURCE_COUNT 0x0042 126226633Sdim#define MBOX_ENHANCED_GET_PDB 0x0047 127226633Sdim#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 128226633Sdim#define MBOX_INIT_FIRMWARE 0x0060 129226633Sdim#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 130193326Sed#define MBOX_INIT_LIP 0x0062 131226633Sdim#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 132198092Srdivacky#define MBOX_GET_PORT_DB 0x0064 133193326Sed#define MBOX_CLEAR_ACA 0x0065 134226633Sdim#define MBOX_TARGET_RESET 0x0066 135226633Sdim#define MBOX_CLEAR_TASK_SET 0x0067 136226633Sdim#define MBOX_ABORT_TASK_SET 0x0068 137193326Sed#define MBOX_GET_FW_STATE 0x0069 138226633Sdim#define MBOX_GET_PORT_NAME 0x006A 139226633Sdim#define MBOX_GET_LINK_STATUS 0x006B 140226633Sdim#define MBOX_INIT_LIP_RESET 0x006C 141193326Sed#define MBOX_SEND_SNS 0x006E 142226633Sdim#define MBOX_FABRIC_LOGIN 0x006F 143226633Sdim#define MBOX_SEND_CHANGE_REQUEST 0x0070 144226633Sdim#define MBOX_FABRIC_LOGOUT 0x0071 145226633Sdim#define MBOX_INIT_LIP_LOGIN 0x0072 146226633Sdim#define MBOX_LUN_RESET 0x007E 147226633Sdim 148226633Sdim#define MBOX_DRIVER_HEARTBEAT 0x005B 149226633Sdim#define MBOX_FW_HEARTBEAT 0x005C 150226633Sdim 151226633Sdim#define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */ 152226633Sdim#define MBGSD_GET_RATE 0 153226633Sdim#define MBGSD_SET_RATE 1 154198092Srdivacky#define MBGSD_ONEGB 0 155234353Sdim#define MBGSD_TWOGB 1 156234353Sdim#define MBGSD_AUTO 2 157226633Sdim 158226633Sdim 159226633Sdim#define ISP2100_SET_PCI_PARAM 0x00ff 160201361Srdivacky 161226633Sdim#define MBOX_BUSY 0x04 162226633Sdim 163226633Sdim/* 164226633Sdim * Mailbox Command Complete Status Codes 165226633Sdim */ 166226633Sdim#define MBOX_COMMAND_COMPLETE 0x4000 167226633Sdim#define MBOX_INVALID_COMMAND 0x4001 168226633Sdim#define MBOX_HOST_INTERFACE_ERROR 0x4002 169226633Sdim#define MBOX_TEST_FAILED 0x4003 170198092Srdivacky#define MBOX_COMMAND_ERROR 0x4005 171226633Sdim#define MBOX_COMMAND_PARAM_ERROR 0x4006 172226633Sdim#define MBOX_PORT_ID_USED 0x4007 173218893Sdim#define MBOX_LOOP_ID_USED 0x4008 174226633Sdim#define MBOX_ALL_IDS_USED 0x4009 175226633Sdim#define MBOX_NOT_LOGGED_IN 0x400A 176226633Sdim#define MBLOGALL 0x000f 177226633Sdim#define MBLOGNONE 0x0000 178226633Sdim#define MBLOGMASK(x) ((x) & 0xf) 179198092Srdivacky 180226633Sdim/* 181226633Sdim * Asynchronous event status codes 182226633Sdim */ 183198092Srdivacky#define ASYNC_BUS_RESET 0x8001 184226633Sdim#define ASYNC_SYSTEM_ERROR 0x8002 185226633Sdim#define ASYNC_RQS_XFER_ERR 0x8003 186226633Sdim#define ASYNC_RSP_XFER_ERR 0x8004 187198092Srdivacky#define ASYNC_QWAKEUP 0x8005 188226633Sdim#define ASYNC_TIMEOUT_RESET 0x8006 189226633Sdim#define ASYNC_DEVICE_RESET 0x8007 190226633Sdim#define ASYNC_EXTMSG_UNDERRUN 0x800A 191198092Srdivacky#define ASYNC_SCAM_INT 0x800B 192226633Sdim#define ASYNC_HUNG_SCSI 0x800C 193226633Sdim#define ASYNC_KILLED_BUS 0x800D 194226633Sdim#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 195201361Srdivacky#define ASYNC_LIP_OCCURRED 0x8010 196226633Sdim#define ASYNC_LOOP_UP 0x8011 197226633Sdim#define ASYNC_LOOP_DOWN 0x8012 198226633Sdim#define ASYNC_LOOP_RESET 0x8013 199198092Srdivacky#define ASYNC_PDB_CHANGED 0x8014 200226633Sdim#define ASYNC_CHANGE_NOTIFY 0x8015 201226633Sdim#define ASYNC_LIP_F8 0x8016 202226633Sdim#define ASYNC_CMD_CMPLT 0x8020 203198092Srdivacky#define ASYNC_CTIO_DONE 0x8021 204226633Sdim#define ASYNC_IP_XMIT_DONE 0x8022 205226633Sdim#define ASYNC_IP_RECV_DONE 0x8023 206226633Sdim#define ASYNC_IP_BROADCAST 0x8024 207198092Srdivacky#define ASYNC_IP_RCVQ_LOW 0x8025 208226633Sdim#define ASYNC_IP_RCVQ_EMPTY 0x8026 209226633Sdim#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 210226633Sdim#define ASYNC_PTPMODE 0x8030 211226633Sdim#define ASYNC_RIO1 0x8031 212226633Sdim#define ASYNC_RIO2 0x8032 213226633Sdim#define ASYNC_RIO3 0x8033 214226633Sdim#define ASYNC_RIO4 0x8034 215226633Sdim#define ASYNC_RIO5 0x8035 216226633Sdim#define ASYNC_CONNMODE 0x8036 217226633Sdim#define ISP_CONN_LOOP 1 218226633Sdim#define ISP_CONN_PTP 2 219226633Sdim#define ISP_CONN_BADLIP 3 220226633Sdim#define ISP_CONN_FATAL 4 221226633Sdim#define ISP_CONN_LOOPBACK 5 222226633Sdim#define ASYNC_RIO_RESP 0x8040 223226633Sdim#define ASYNC_RIO_COMP 0x8042 224226633Sdim/* 225226633Sdim * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 226226633Sdim * mailbox command to enable this. 227226633Sdim */ 228226633Sdim#define ASYNC_QFULL_SENT 0x8049 229226633Sdim 230226633Sdim/* 231226633Sdim * Mailbox Usages 232226633Sdim */ 233226633Sdim 234226633Sdim#define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \ 235226633Sdim ISP_WRITE(isp, isp->isp_rqstinrp, value) 236226633Sdim 237226633Sdim#define READ_REQUEST_QUEUE_OUT_POINTER(isp) \ 238226633Sdim ISP_READ(isp, isp->isp_rqstoutrp) 239226633Sdim 240193326Sed#define READ_RESPONSE_QUEUE_IN_POINTER(isp) \ 241226633Sdim ISP_READ(isp, isp->isp_respinrp) 242226633Sdim 243193326Sed#define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \ 244226633Sdim ISP_WRITE(isp, isp->isp_respoutrp, value) 245234353Sdim 246234353Sdim/* 247234353Sdim * Command Structure Definitions 248234353Sdim */ 249234353Sdim 250234353Sdimtypedef struct { 251234353Sdim uint32_t ds_base; 252234353Sdim uint32_t ds_count; 253234353Sdim} ispds_t; 254234353Sdim 255234353Sdimtypedef struct { 256234353Sdim uint32_t ds_base; 257234353Sdim uint32_t ds_basehi; 258234353Sdim uint32_t ds_count; 259234353Sdim} ispds64_t; 260234353Sdim 261234353Sdim#define DSTYPE_32BIT 0 262234353Sdim#define DSTYPE_64BIT 1 263234353Sdimtypedef struct { 264234353Sdim uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 265234353Sdim uint32_t ds_segment; /* unused */ 266234353Sdim uint32_t ds_base; /* 32 bit address of DSD list */ 267234353Sdim} ispdslist_t; 268226633Sdim 269226633Sdim 270226633Sdim/* 271201361Srdivacky * These elements get swizzled around for SBus instances. 272226633Sdim */ 273226633Sdim#define ISP_SWAP8(a, b) { \ 274226633Sdim uint8_t tmp; \ 275226633Sdim tmp = a; \ 276226633Sdim a = b; \ 277226633Sdim b = tmp; \ 278226633Sdim} 279226633Sdimtypedef struct { 280226633Sdim uint8_t rqs_entry_type; 281226633Sdim uint8_t rqs_entry_count; 282226633Sdim uint8_t rqs_seqno; 283226633Sdim uint8_t rqs_flags; 284226633Sdim} isphdr_t; 285226633Sdim 286226633Sdim/* RQS Flag definitions */ 287226633Sdim#define RQSFLAG_CONTINUATION 0x01 288226633Sdim#define RQSFLAG_FULL 0x02 289226633Sdim#define RQSFLAG_BADHEADER 0x04 290226633Sdim#define RQSFLAG_BADPACKET 0x08 291226633Sdim 292234353Sdim/* RQS entry_type definitions */ 293226633Sdim#define RQSTYPE_REQUEST 0x01 294226633Sdim#define RQSTYPE_DATASEG 0x02 295226633Sdim#define RQSTYPE_RESPONSE 0x03 296239462Sdim#define RQSTYPE_MARKER 0x04 297239462Sdim#define RQSTYPE_CMDONLY 0x05 298239462Sdim#define RQSTYPE_ATIO 0x06 /* Target Mode */ 299239462Sdim#define RQSTYPE_CTIO 0x07 /* Target Mode */ 300239462Sdim#define RQSTYPE_SCAM 0x08 301239462Sdim#define RQSTYPE_A64 0x09 302239462Sdim#define RQSTYPE_A64_CONT 0x0a 303239462Sdim#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 304226633Sdim#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 305226633Sdim#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 306226633Sdim#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 307226633Sdim#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 308226633Sdim#define RQSTYPE_STATUS_CONT 0x10 309234353Sdim#define RQSTYPE_T2RQS 0x11 310226633Sdim#define RQSTYPE_IP_XMIT 0x13 311226633Sdim#define RQSTYPE_T4RQS 0x15 312226633Sdim#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 313226633Sdim#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 314234353Sdim#define RQSTYPE_CSET0 0x18 315234353Sdim#define RQSTYPE_T3RQS 0x19 316234353Sdim#define RQSTYPE_IP_XMIT_64 0x1b 317234353Sdim#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 318234353Sdim#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 319234353Sdim#define RQSTYPE_RIO1 0x21 320234353Sdim#define RQSTYPE_RIO2 0x22 321234353Sdim#define RQSTYPE_IP_RECV 0x23 322234353Sdim#define RQSTYPE_IP_RECV_CONT 0x24 323234353Sdim 324234353Sdim 325234353Sdim#define ISP_RQDSEG 4 326226633Sdimtypedef struct { 327226633Sdim isphdr_t req_header; 328226633Sdim uint32_t req_handle; 329226633Sdim uint8_t req_lun_trn; 330226633Sdim uint8_t req_target; 331226633Sdim uint16_t req_cdblen; 332226633Sdim#define req_modifier req_cdblen /* marker packet */ 333226633Sdim uint16_t req_flags; 334226633Sdim uint16_t req_reserved; 335226633Sdim uint16_t req_time; 336226633Sdim uint16_t req_seg_count; 337226633Sdim uint8_t req_cdb[12]; 338226633Sdim ispds_t req_dataseg[ISP_RQDSEG]; 339226633Sdim} ispreq_t; 340226633Sdim 341226633Sdim#define ispreq64_t ispreqt3_t /* same as.... */ 342226633Sdim#define ISP_RQDSEG_A64 2 343234353Sdim 344234353Sdim/* 345226633Sdim * A request packet can also be a marker packet. 346201361Srdivacky */ 347198092Srdivacky#define SYNC_DEVICE 0 348226633Sdim#define SYNC_TARGET 1 349226633Sdim#define SYNC_ALL 2 350226633Sdim#define SYNC_LIP 3 351226633Sdim 352226633Sdim#define ISP_RQDSEG_T2 3 353226633Sdimtypedef struct { 354226633Sdim isphdr_t req_header; 355226633Sdim uint32_t req_handle; 356226633Sdim uint8_t req_lun_trn; 357226633Sdim uint8_t req_target; 358226633Sdim uint16_t req_scclun; 359226633Sdim uint16_t req_flags; 360226633Sdim uint16_t _res2; 361198092Srdivacky uint16_t req_time; 362226633Sdim uint16_t req_seg_count; 363226633Sdim uint8_t req_cdb[16]; 364226633Sdim uint32_t req_totalcnt; 365226633Sdim ispds_t req_dataseg[ISP_RQDSEG_T2]; 366193326Sed} ispreqt2_t; 367226633Sdim 368226633Sdimtypedef struct { 369226633Sdim isphdr_t req_header; 370226633Sdim uint32_t req_handle; 371193326Sed uint16_t req_target; 372193326Sed uint16_t req_scclun; 373226633Sdim uint16_t req_flags; 374234353Sdim uint16_t _res2; 375226633Sdim uint16_t req_time; 376226633Sdim uint16_t req_seg_count; 377199990Srdivacky uint8_t req_cdb[16]; 378226633Sdim uint32_t req_totalcnt; 379226633Sdim ispds_t req_dataseg[ISP_RQDSEG_T2]; 380226633Sdim} ispreqt2e_t; 381226633Sdim 382199990Srdivacky#define ISP_RQDSEG_T3 2 383199990Srdivackytypedef struct { 384198092Srdivacky isphdr_t req_header; 385226633Sdim uint32_t req_handle; 386226633Sdim uint8_t req_lun_trn; 387226633Sdim uint8_t req_target; 388226633Sdim uint16_t req_scclun; 389193326Sed uint16_t req_flags; 390193326Sed uint16_t _res2; 391226633Sdim uint16_t req_time; 392226633Sdim uint16_t req_seg_count; 393226633Sdim uint8_t req_cdb[16]; 394226633Sdim uint32_t req_totalcnt; 395226633Sdim ispds64_t req_dataseg[ISP_RQDSEG_T3]; 396226633Sdim} ispreqt3_t; 397226633Sdim 398226633Sdimtypedef struct { 399198092Srdivacky isphdr_t req_header; 400226633Sdim uint32_t req_handle; 401226633Sdim uint16_t req_target; 402226633Sdim uint16_t req_scclun; 403226633Sdim uint16_t req_flags; 404193326Sed uint16_t _res2; 405226633Sdim uint16_t req_time; 406226633Sdim uint16_t req_seg_count; 407193326Sed uint8_t req_cdb[16]; 408193326Sed uint32_t req_totalcnt; 409226633Sdim ispds64_t req_dataseg[ISP_RQDSEG_T3]; 410226633Sdim} ispreqt3e_t; 411226633Sdim 412226633Sdim/* req_flag values */ 413193326Sed#define REQFLAG_NODISCON 0x0001 414226633Sdim#define REQFLAG_HTAG 0x0002 415226633Sdim#define REQFLAG_OTAG 0x0004 416226633Sdim#define REQFLAG_STAG 0x0008 417193326Sed#define REQFLAG_TARGET_RTN 0x0010 418193326Sed 419193326Sed#define REQFLAG_NODATA 0x0000 420226633Sdim#define REQFLAG_DATA_IN 0x0020 421226633Sdim#define REQFLAG_DATA_OUT 0x0040 422226633Sdim#define REQFLAG_DATA_UNKNOWN 0x0060 423226633Sdim 424226633Sdim#define REQFLAG_DISARQ 0x0100 425226633Sdim#define REQFLAG_FRC_ASYNC 0x0200 426226633Sdim#define REQFLAG_FRC_SYNC 0x0400 427226633Sdim#define REQFLAG_FRC_WIDE 0x0800 428198092Srdivacky#define REQFLAG_NOPARITY 0x1000 429226633Sdim#define REQFLAG_STOPQ 0x2000 430226633Sdim#define REQFLAG_XTRASNS 0x4000 431226633Sdim#define REQFLAG_PRIORITY 0x8000 432226633Sdim 433226633Sdimtypedef struct { 434226633Sdim isphdr_t req_header; 435198092Srdivacky uint32_t req_handle; 436226633Sdim uint8_t req_lun_trn; 437226633Sdim uint8_t req_target; 438226633Sdim uint16_t req_cdblen; 439226633Sdim uint16_t req_flags; 440226633Sdim uint16_t _res1; 441226633Sdim uint16_t req_time; 442226633Sdim uint16_t req_seg_count; 443226633Sdim uint8_t req_cdb[44]; 444226633Sdim} ispextreq_t; 445226633Sdim 446212904Sdim#define ISP_CDSEG 7 447226633Sdimtypedef struct { 448212904Sdim isphdr_t req_header; 449212904Sdim uint32_t _res1; 450226633Sdim ispds_t req_dataseg[ISP_CDSEG]; 451193326Sed} ispcontreq_t; 452226633Sdim 453226633Sdim#define ISP_CDSEG64 5 454226633Sdimtypedef struct { 455226633Sdim isphdr_t req_header; 456226633Sdim ispds64_t req_dataseg[ISP_CDSEG64]; 457226633Sdim} ispcontreq64_t; 458193326Sed 459198092Srdivackytypedef struct { 460226633Sdim isphdr_t req_header; 461226633Sdim uint32_t req_handle; 462226633Sdim uint16_t req_scsi_status; 463226633Sdim uint16_t req_completion_status; 464193326Sed uint16_t req_state_flags; 465226633Sdim uint16_t req_status_flags; 466226633Sdim uint16_t req_time; 467226633Sdim#define req_response_len req_time /* FC only */ 468226633Sdim uint16_t req_sense_len; 469226633Sdim uint32_t req_resid; 470226633Sdim uint8_t req_response[8]; /* FC only */ 471226633Sdim uint8_t req_sense_data[32]; 472226633Sdim} ispstatusreq_t; 473226633Sdim 474226633Sdimtypedef struct { 475239462Sdim isphdr_t req_header; 476249423Sdim uint8_t req_sense_data[60]; 477249423Sdim} ispstatus_cont_t; 478239462Sdim 479239462Sdim/* 480239462Sdim * For Qlogic 2X00, the high order byte of SCSI status has 481239462Sdim * additional meaning. 482249423Sdim */ 483226633Sdim#define RQCS_RU 0x800 /* Residual Under */ 484226633Sdim#define RQCS_RO 0x400 /* Residual Over */ 485249423Sdim#define RQCS_RESID (RQCS_RU|RQCS_RO) 486226633Sdim#define RQCS_SV 0x200 /* Sense Length Valid */ 487226633Sdim#define RQCS_RV 0x100 /* FCP Response Length Valid */ 488193326Sed 489226633Sdim/* 490226633Sdim * Completion Status Codes. 491198092Srdivacky */ 492226633Sdim#define RQCS_COMPLETE 0x0000 493226633Sdim#define RQCS_DMA_ERROR 0x0002 494226633Sdim#define RQCS_RESET_OCCURRED 0x0004 495226633Sdim#define RQCS_ABORTED 0x0005 496193326Sed#define RQCS_TIMEOUT 0x0006 497193326Sed#define RQCS_DATA_OVERRUN 0x0007 498226633Sdim#define RQCS_DATA_UNDERRUN 0x0015 499204643Srdivacky#define RQCS_QUEUE_FULL 0x001C 500226633Sdim 501226633Sdim/* 1X00 Only Completion Codes */ 502193326Sed#define RQCS_INCOMPLETE 0x0001 503198092Srdivacky#define RQCS_TRANSPORT_ERROR 0x0003 504226633Sdim#define RQCS_COMMAND_OVERRUN 0x0008 505234353Sdim#define RQCS_STATUS_OVERRUN 0x0009 506226633Sdim#define RQCS_BAD_MESSAGE 0x000a 507193326Sed#define RQCS_NO_MESSAGE_OUT 0x000b 508226633Sdim#define RQCS_EXT_ID_FAILED 0x000c 509226633Sdim#define RQCS_IDE_MSG_FAILED 0x000d 510226633Sdim#define RQCS_ABORT_MSG_FAILED 0x000e 511226633Sdim#define RQCS_REJECT_MSG_FAILED 0x000f 512193326Sed#define RQCS_NOP_MSG_FAILED 0x0010 513239462Sdim#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 514239462Sdim#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 515239462Sdim#define RQCS_ID_MSG_FAILED 0x0013 516239462Sdim#define RQCS_UNEXP_BUS_FREE 0x0014 517239462Sdim#define RQCS_XACT_ERR1 0x0018 518226633Sdim#define RQCS_XACT_ERR2 0x0019 519193326Sed#define RQCS_XACT_ERR3 0x001A 520226633Sdim#define RQCS_BAD_ENTRY 0x001B 521226633Sdim#define RQCS_PHASE_SKIPPED 0x001D 522234353Sdim#define RQCS_ARQS_FAILED 0x001E 523226633Sdim#define RQCS_WIDE_FAILED 0x001F 524193326Sed#define RQCS_SYNCXFER_FAILED 0x0020 525226633Sdim#define RQCS_LVD_BUSERR 0x0021 526226633Sdim 527226633Sdim/* 2X00 Only Completion Codes */ 528226633Sdim#define RQCS_PORT_UNAVAILABLE 0x0028 529226633Sdim#define RQCS_PORT_LOGGED_OUT 0x0029 530226633Sdim#define RQCS_PORT_CHANGED 0x002A 531226633Sdim#define RQCS_PORT_BUSY 0x002B 532226633Sdim 533226633Sdim/* 534226633Sdim * 1X00 specific State Flags 535226633Sdim */ 536226633Sdim#define RQSF_GOT_BUS 0x0100 537249423Sdim#define RQSF_GOT_TARGET 0x0200 538249423Sdim#define RQSF_SENT_CDB 0x0400 539249423Sdim#define RQSF_XFRD_DATA 0x0800 540226633Sdim#define RQSF_GOT_STATUS 0x1000 541226633Sdim#define RQSF_GOT_SENSE 0x2000 542226633Sdim#define RQSF_XFER_COMPLETE 0x4000 543226633Sdim 544226633Sdim/* 545226633Sdim * 2X00 specific State Flags 546226633Sdim * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 547226633Sdim */ 548226633Sdim#define RQSF_DATA_IN 0x0020 549226633Sdim#define RQSF_DATA_OUT 0x0040 550226633Sdim#define RQSF_STAG 0x0008 551226633Sdim#define RQSF_OTAG 0x0004 552226633Sdim#define RQSF_HTAG 0x0002 553226633Sdim/* 554226633Sdim * 1X00 Status Flags 555226633Sdim */ 556226633Sdim#define RQSTF_DISCONNECT 0x0001 557226633Sdim#define RQSTF_SYNCHRONOUS 0x0002 558226633Sdim#define RQSTF_PARITY_ERROR 0x0004 559226633Sdim#define RQSTF_BUS_RESET 0x0008 560226633Sdim#define RQSTF_DEVICE_RESET 0x0010 561226633Sdim#define RQSTF_ABORTED 0x0020 562226633Sdim#define RQSTF_TIMEOUT 0x0040 563226633Sdim#define RQSTF_NEGOTIATION 0x0080 564226633Sdim 565226633Sdim/* 566226633Sdim * 2X00 specific state flags 567226633Sdim */ 568226633Sdim/* RQSF_SENT_CDB */ 569226633Sdim/* RQSF_XFRD_DATA */ 570226633Sdim/* RQSF_GOT_STATUS */ 571193326Sed/* RQSF_XFER_COMPLETE */ 572226633Sdim 573226633Sdim/* 574226633Sdim * 2X00 specific status flags 575226633Sdim */ 576226633Sdim/* RQSTF_ABORTED */ 577226633Sdim/* RQSTF_TIMEOUT */ 578226633Sdim#define RQSTF_DMA_ERROR 0x0080 579226633Sdim#define RQSTF_LOGOUT 0x2000 580226633Sdim 581226633Sdim/* 582193326Sed * Miscellaneous 583193326Sed */ 584226633Sdim#ifndef ISP_EXEC_THROTTLE 585226633Sdim#define ISP_EXEC_THROTTLE 16 586193326Sed#endif 587193326Sed 588226633Sdim/* 589226633Sdim * About Firmware returns an 'attribute' word in mailbox 6. 590226633Sdim */ 591226633Sdim#define ISP_FW_ATTR_TMODE 0x01 592193326Sed#define ISP_FW_ATTR_SCCLUN 0x02 593193326Sed#define ISP_FW_ATTR_FABRIC 0x04 594226633Sdim#define ISP_FW_ATTR_CLASS2 0x08 595226633Sdim#define ISP_FW_ATTR_FCTAPE 0x10 596193326Sed#define ISP_FW_ATTR_IP 0x20 597193326Sed#define ISP_FW_ATTR_VI 0x40 598226633Sdim#define ISP_FW_ATTR_VI_SOLARIS 0x80 599226633Sdim#define ISP_FW_ATTR_2KLOGINS 0x100 /* XXX: just a guess */ 600226633Sdim 601226633Sdim#define IS_2KLOGIN(isp) \ 602226633Sdim (IS_FC(isp) && (FCPARAM(isp)->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 603226633Sdim 604226633Sdim/* 605226633Sdim * Reduced Interrupt Operation Response Queue Entreis 606193326Sed */ 607226633Sdim 608193326Sedtypedef struct { 609226633Sdim isphdr_t req_header; 610226633Sdim uint32_t req_handles[15]; 611226633Sdim} isp_rio1_t; 612226633Sdim 613226633Sdimtypedef struct { 614226633Sdim isphdr_t req_header; 615226633Sdim uint16_t req_handles[30]; 616226633Sdim} isp_rio2_t; 617226633Sdim 618226633Sdim/* 619226633Sdim * FC (ISP2100) specific data structures 620226633Sdim */ 621226633Sdim 622226633Sdim/* 623226633Sdim * Initialization Control Block 624226633Sdim * 625226633Sdim * Version One (prime) format. 626226633Sdim */ 627226633Sdimtypedef struct isp_icb { 628226633Sdim uint8_t icb_version; 629226633Sdim uint8_t _reserved0; 630198398Srdivacky uint16_t icb_fwoptions; 631193326Sed uint16_t icb_maxfrmlen; 632226633Sdim uint16_t icb_maxalloc; 633226633Sdim uint16_t icb_execthrottle; 634198092Srdivacky uint8_t icb_retry_count; 635193326Sed uint8_t icb_retry_delay; 636226633Sdim uint8_t icb_portname[8]; 637226633Sdim uint16_t icb_hardaddr; 638 uint8_t icb_iqdevtype; 639 uint8_t icb_logintime; 640 uint8_t icb_nodename[8]; 641 uint16_t icb_rqstout; 642 uint16_t icb_rspnsin; 643 uint16_t icb_rqstqlen; 644 uint16_t icb_rsltqlen; 645 uint16_t icb_rqstaddr[4]; 646 uint16_t icb_respaddr[4]; 647 uint16_t icb_lunenables; 648 uint8_t icb_ccnt; 649 uint8_t icb_icnt; 650 uint16_t icb_lunetimeout; 651 uint16_t _reserved1; 652 uint16_t icb_xfwoptions; 653 uint8_t icb_racctimer; 654 uint8_t icb_idelaytimer; 655 uint16_t icb_zfwoptions; 656 uint16_t _reserved2[13]; 657} isp_icb_t; 658#define ICB_VERSION1 1 659 660#define ICBOPT_HARD_ADDRESS 0x0001 661#define ICBOPT_FAIRNESS 0x0002 662#define ICBOPT_FULL_DUPLEX 0x0004 663#define ICBOPT_FAST_POST 0x0008 664#define ICBOPT_TGT_ENABLE 0x0010 665#define ICBOPT_INI_DISABLE 0x0020 666#define ICBOPT_INI_ADISC 0x0040 667#define ICBOPT_INI_TGTTYPE 0x0080 668#define ICBOPT_PDBCHANGE_AE 0x0100 669#define ICBOPT_NOLIP 0x0200 670#define ICBOPT_SRCHDOWN 0x0400 671#define ICBOPT_PREVLOOP 0x0800 672#define ICBOPT_STOP_ON_QFULL 0x1000 673#define ICBOPT_FULL_LOGIN 0x2000 674#define ICBOPT_BOTH_WWNS 0x4000 675#define ICBOPT_EXTENDED 0x8000 676 677#define ICBXOPT_CLASS2_ACK0 0x0200 678#define ICBXOPT_CLASS2 0x0100 679#define ICBXOPT_LOOP_ONLY (0 << 4) 680#define ICBXOPT_PTP_ONLY (1 << 4) 681#define ICBXOPT_LOOP_2_PTP (2 << 4) 682#define ICBXOPT_PTP_2_LOOP (3 << 4) 683 684/* 685 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 686 * RIO is not defined for the 23XX cards 687 */ 688#define ICBXOPT_RIO_OFF 0 689#define ICBXOPT_RIO_16BIT 1 690#define ICBXOPT_RIO_32BIT 2 691#define ICBXOPT_RIO_16BIT_IOCB 3 692#define ICBXOPT_RIO_32BIT_IOCB 4 693#define ICBXOPT_ZIO 5 694#define ICBXOPT_TIMER_MASK 0x7 695 696#define ICBZOPT_ENA_RDXFR_RDY 0x01 697#define ICBZOPT_ENA_OOF (1 << 6) /* out of order frame handling */ 698#define ICBZOPT_50_OHM 0x0200 699/* These 3 only apply to the 2300 */ 700#define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14) 701#define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14) 702#define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14) 703 704 705#define ICB_MIN_FRMLEN 256 706#define ICB_MAX_FRMLEN 2112 707#define ICB_DFLT_FRMLEN 1024 708#define ICB_DFLT_ALLOC 256 709#define ICB_DFLT_THROTTLE 16 710#define ICB_DFLT_RDELAY 5 711#define ICB_DFLT_RCOUNT 3 712 713#define ICB_LOGIN_TOV 30 714#define ICB_LUN_ENABLE_TOV 180 715 716 717 718#define RQRSP_ADDR0015 0 719#define RQRSP_ADDR1631 1 720#define RQRSP_ADDR3247 2 721#define RQRSP_ADDR4863 3 722 723 724#define ICB_NNM0 7 725#define ICB_NNM1 6 726#define ICB_NNM2 5 727#define ICB_NNM3 4 728#define ICB_NNM4 3 729#define ICB_NNM5 2 730#define ICB_NNM6 1 731#define ICB_NNM7 0 732 733#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 734 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 735 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 736 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 737 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 738 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 739 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 740 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 741 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 742 743#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 744 wwn = ((uint64_t) array[ICB_NNM0]) | \ 745 ((uint64_t) array[ICB_NNM1] << 8) | \ 746 ((uint64_t) array[ICB_NNM2] << 16) | \ 747 ((uint64_t) array[ICB_NNM3] << 24) | \ 748 ((uint64_t) array[ICB_NNM4] << 32) | \ 749 ((uint64_t) array[ICB_NNM5] << 40) | \ 750 ((uint64_t) array[ICB_NNM6] << 48) | \ 751 ((uint64_t) array[ICB_NNM7] << 56) 752 753/* 754 * FC-AL Position Map 755 * 756 * This is an at most 128 byte map that returns either 757 * the LILP or Firmware generated list of ports. 758 * 759 * We deviate a bit from the returned qlogic format to 760 * use an extra bit to say whether this was a LILP or 761 * f/w generated map. 762 */ 763typedef struct { 764 uint8_t fwmap : 1, 765 count : 7; 766 uint8_t map[127]; 767} fcpos_map_t; 768 769/* 770 * Port Data Base Element 771 */ 772 773typedef struct { 774 uint16_t pdb_options; 775 uint8_t pdb_mstate; 776 uint8_t pdb_sstate; 777#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 778 uint8_t pdb_hardaddr_bits[4]; 779 uint8_t pdb_portid_bits[4]; 780 uint8_t pdb_nodename[8]; 781 uint8_t pdb_portname[8]; 782 uint16_t pdb_execthrottle; 783 uint16_t pdb_exec_count; 784 uint8_t pdb_retry_count; 785 uint8_t pdb_retry_delay; 786 uint16_t pdb_resalloc; 787 uint16_t pdb_curalloc; 788 uint16_t pdb_qhead; 789 uint16_t pdb_qtail; 790 uint16_t pdb_tl_next; 791 uint16_t pdb_tl_last; 792 uint16_t pdb_features; /* PLOGI, Common Service */ 793 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 794 uint16_t pdb_roi; /* PLOGI, Common Service */ 795 uint8_t pdb_target; 796 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 797 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 798 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 799 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 800 uint16_t pdb_labrtflg; 801 uint16_t pdb_lstopflg; 802 uint16_t pdb_sqhead; 803 uint16_t pdb_sqtail; 804 uint16_t pdb_ptimer; 805 uint16_t pdb_nxt_seqid; 806 uint16_t pdb_fcount; 807 uint16_t pdb_prli_len; 808 uint16_t pdb_prli_svc0; 809 uint16_t pdb_prli_svc3; 810 uint16_t pdb_loopid; 811 uint16_t pdb_il_ptr; 812 uint16_t pdb_sl_ptr; 813} isp_pdb_t; 814 815#define PDB_OPTIONS_XMITTING (1<<11) 816#define PDB_OPTIONS_LNKXMIT (1<<10) 817#define PDB_OPTIONS_ABORTED (1<<9) 818#define PDB_OPTIONS_ADISC (1<<1) 819 820#define PDB_STATE_DISCOVERY 0 821#define PDB_STATE_WDISC_ACK 1 822#define PDB_STATE_PLOGI 2 823#define PDB_STATE_PLOGI_ACK 3 824#define PDB_STATE_PRLI 4 825#define PDB_STATE_PRLI_ACK 5 826#define PDB_STATE_LOGGED_IN 6 827#define PDB_STATE_PORT_UNAVAIL 7 828#define PDB_STATE_PRLO 8 829#define PDB_STATE_PRLO_ACK 9 830#define PDB_STATE_PLOGO 10 831#define PDB_STATE_PLOG_ACK 11 832 833#define SVC3_TGT_ROLE 0x10 834#define SVC3_INI_ROLE 0x20 835#define SVC3_ROLE_MASK 0x30 836#define SVC3_ROLE_SHIFT 4 837 838/* 839 * CT definition 840 * 841 * This is as the QLogic f/w documentations defines it- which is just opposite, 842 * bit wise, from what the specification defines it as. Additionally, the 843 * ct_response and ct_resid (really from FC-GS-2) need to be byte swapped. 844 */ 845 846typedef struct { 847 uint8_t ct_revision; 848 uint8_t ct_portid[3]; 849 uint8_t ct_fcs_type; 850 uint8_t ct_fcs_subtype; 851 uint8_t ct_options; 852 uint8_t ct_res0; 853 uint16_t ct_response; 854 uint16_t ct_resid; 855 uint8_t ct_res1; 856 uint8_t ct_reason; 857 uint8_t ct_explanation; 858 uint8_t ct_vunique; 859} ct_hdr_t; 860#define FS_ACC 0x8002 861#define FS_RJT 0x8001 862 863#define FC4_IP 5 /* ISO/EEC 8802-2 LLC/SNAP "Out of Order Delivery" */ 864#define FC4_SCSI 8 /* SCSI-3 via Fivre Channel Protocol (FCP) */ 865#define FC4_FC_SVC 0x20 /* Fibre Channel Services */ 866 867#define SNS_GA_NXT 0x100 868#define SNS_GPN_ID 0x112 869#define SNS_GNN_ID 0x113 870#define SNS_GFF_ID 0x11F 871#define SNS_GID_FT 0x171 872#define SNS_RFT_ID 0x217 873typedef struct { 874 uint16_t snscb_rblen; /* response buffer length (words) */ 875 uint16_t snscb_res0; 876 uint16_t snscb_addr[4]; /* response buffer address */ 877 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 878 uint16_t snscb_res1; 879 uint16_t snscb_data[1]; /* variable data */ 880} sns_screq_t; /* Subcommand Request Structure */ 881 882typedef struct { 883 uint16_t snscb_rblen; /* response buffer length (words) */ 884 uint16_t snscb_res0; 885 uint16_t snscb_addr[4]; /* response buffer address */ 886 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 887 uint16_t snscb_res1; 888 uint16_t snscb_cmd; 889 uint16_t snscb_res2; 890 uint32_t snscb_res3; 891 uint32_t snscb_port; 892} sns_ga_nxt_req_t; 893#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 894 895typedef struct { 896 uint16_t snscb_rblen; /* response buffer length (words) */ 897 uint16_t snscb_res0; 898 uint16_t snscb_addr[4]; /* response buffer address */ 899 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 900 uint16_t snscb_res1; 901 uint16_t snscb_cmd; 902 uint16_t snscb_res2; 903 uint32_t snscb_res3; 904 uint32_t snscb_portid; 905} sns_gxn_id_req_t; 906#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 907 908typedef struct { 909 uint16_t snscb_rblen; /* response buffer length (words) */ 910 uint16_t snscb_res0; 911 uint16_t snscb_addr[4]; /* response buffer address */ 912 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 913 uint16_t snscb_res1; 914 uint16_t snscb_cmd; 915 uint16_t snscb_mword_div_2; 916 uint32_t snscb_res3; 917 uint32_t snscb_fc4_type; 918} sns_gid_ft_req_t; 919#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 920 921typedef struct { 922 uint16_t snscb_rblen; /* response buffer length (words) */ 923 uint16_t snscb_res0; 924 uint16_t snscb_addr[4]; /* response buffer address */ 925 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 926 uint16_t snscb_res1; 927 uint16_t snscb_cmd; 928 uint16_t snscb_res2; 929 uint32_t snscb_res3; 930 uint32_t snscb_port; 931 uint32_t snscb_fc4_types[8]; 932} sns_rft_id_req_t; 933#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 934 935typedef struct { 936 ct_hdr_t snscb_cthdr; 937 uint8_t snscb_port_type; 938 uint8_t snscb_port_id[3]; 939 uint8_t snscb_portname[8]; 940 uint16_t snscb_data[1]; /* variable data */ 941} sns_scrsp_t; /* Subcommand Response Structure */ 942 943typedef struct { 944 ct_hdr_t snscb_cthdr; 945 uint8_t snscb_port_type; 946 uint8_t snscb_port_id[3]; 947 uint8_t snscb_portname[8]; 948 uint8_t snscb_pnlen; /* symbolic port name length */ 949 uint8_t snscb_pname[255]; /* symbolic port name */ 950 uint8_t snscb_nodename[8]; 951 uint8_t snscb_nnlen; /* symbolic node name length */ 952 uint8_t snscb_nname[255]; /* symbolic node name */ 953 uint8_t snscb_ipassoc[8]; 954 uint8_t snscb_ipaddr[16]; 955 uint8_t snscb_svc_class[4]; 956 uint8_t snscb_fc4_types[32]; 957 uint8_t snscb_fpname[8]; 958 uint8_t snscb_reserved; 959 uint8_t snscb_hardaddr[3]; 960} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 961#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 962 963typedef struct { 964 ct_hdr_t snscb_cthdr; 965 uint8_t snscb_wwn[8]; 966} sns_gxn_id_rsp_t; 967#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 968 969typedef struct { 970 ct_hdr_t snscb_cthdr; 971 uint32_t snscb_fc4_features[32]; 972} sns_gff_id_rsp_t; 973#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 974 975typedef struct { 976 ct_hdr_t snscb_cthdr; 977 struct { 978 uint8_t control; 979 uint8_t portid[3]; 980 } snscb_ports[1]; 981} sns_gid_ft_rsp_t; 982#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 983 984#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 985 986#endif /* _ISPMBOX_H */ 987