1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris */ 52230557Sjimharris 53230557Sjimharris#include <sys/cdefs.h> 54230557Sjimharris__FBSDID("$FreeBSD: releng/11.0/sys/dev/isci/scil/scic_sds_sgpio.c 231136 2012-02-07 17:43:58Z jimharris $"); 55230557Sjimharris 56230557Sjimharris/** 57230557Sjimharris* @file 58230557Sjimharris* 59230557Sjimharris* @brief This file contains the implementation of the SGPIO register inteface 60230557Sjimharris* methods. 61230557Sjimharris*/ 62230557Sjimharris 63230557Sjimharris#include <dev/isci/scil/scic_sgpio.h> 64230557Sjimharris#include <dev/isci/scil/scic_sds_controller_registers.h> 65230557Sjimharris#include <dev/isci/scil/scic_user_callback.h> 66230557Sjimharris 67230557Sjimharris/** 68230557Sjimharris * @brief Function writes Value to the 69230557Sjimharris * SGPIO Output Data Select Register (SGODSR) for phys specified by 70230557Sjimharris * phy_mask paremeter 71230557Sjimharris * 72230557Sjimharris * @param[in] SCIC_SDS_CONTROLLER_T controller 73230557Sjimharris * @param[in] phy_mask - This field is a bit mask that specifies the phys 74230557Sjimharris * to be updated. 75230557Sjimharris * @param[in] value - Value for write 76230557Sjimharris * 77230557Sjimharris * @return none 78230557Sjimharris */ 79230557Sjimharrisstatic 80230557Sjimharrisvoid scic_sgpio_write_SGODSR_register( 81230557Sjimharris SCIC_SDS_CONTROLLER_T *controller, 82230557Sjimharris U32 phy_mask, 83230557Sjimharris U32 value 84230557Sjimharris) 85230557Sjimharris{ 86230557Sjimharris U8 phy_index; 87230557Sjimharris 88230557Sjimharris for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++) 89230557Sjimharris { 90230557Sjimharris if (phy_mask >> phy_index & 1) 91230557Sjimharris { 92230557Sjimharris scu_sgpio_peg0_register_write( 93230557Sjimharris controller, output_data_select[phy_index], value 94230557Sjimharris ); 95230557Sjimharris } 96230557Sjimharris } 97230557Sjimharris} 98230557Sjimharris 99230557Sjimharrisvoid scic_sgpio_set_vendor_code( 100230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 101230557Sjimharris U8 vendor_specific_sequence 102230557Sjimharris) 103230557Sjimharris{ 104230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 105230557Sjimharris 106230557Sjimharris scu_sgpio_peg0_register_write( 107230557Sjimharris core_controller, vendor_specific_code, vendor_specific_sequence); 108230557Sjimharris} 109230557Sjimharris 110230557Sjimharrisvoid scic_sgpio_set_blink_patterns( 111230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 112230557Sjimharris U8 pattern_a_low, 113230557Sjimharris U8 pattern_a_high, 114230557Sjimharris U8 pattern_b_low, 115230557Sjimharris U8 pattern_b_high 116230557Sjimharris) 117230557Sjimharris{ 118230557Sjimharris U32 value; 119230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 120230557Sjimharris 121230557Sjimharris value = (pattern_b_high << 12) + (pattern_b_low << 8) + (pattern_a_high << 4) + pattern_a_low; 122230557Sjimharris 123230557Sjimharris scu_sgpio_peg0_register_write( 124230557Sjimharris core_controller, blink_rate, value); 125230557Sjimharris} 126230557Sjimharris 127230557Sjimharrisvoid scic_sgpio_set_functionality( 128230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 129230557Sjimharris BOOL sgpio_mode 130230557Sjimharris) 131230557Sjimharris{ 132230557Sjimharris U32 value = DISABLE_SGPIO_FUNCTIONALITY; 133230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 134230557Sjimharris 135230557Sjimharris if(sgpio_mode) 136230557Sjimharris { 137230557Sjimharris value = ENABLE_SGPIO_FUNCTIONALITY; 138230557Sjimharris } 139230557Sjimharris 140230557Sjimharris scu_sgpio_peg0_register_write( 141230557Sjimharris core_controller, interface_control, value); 142230557Sjimharris} 143230557Sjimharris 144230557Sjimharrisvoid scic_sgpio_apply_led_blink_pattern( 145230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 146230557Sjimharris U32 phy_mask, 147230557Sjimharris BOOL error, 148230557Sjimharris BOOL locate, 149230557Sjimharris BOOL activity, 150230557Sjimharris U8 pattern_selection 151230557Sjimharris) 152230557Sjimharris{ 153230557Sjimharris U32 output_value = 0; 154230557Sjimharris 155230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 156230557Sjimharris 157230557Sjimharris // Start with all LEDs turned off 158230557Sjimharris output_value = (SGODSR_INVERT_BIT << SGODSR_ERROR_LED_SHIFT) 159230557Sjimharris | (SGODSR_INVERT_BIT << SGODSR_LOCATE_LED_SHIFT) 160230557Sjimharris | (SGODSR_INVERT_BIT << SGODSR_ACTIVITY_LED_SHIFT); 161230557Sjimharris 162230557Sjimharris if(error) 163230557Sjimharris { //apply pattern to error LED 164230557Sjimharris output_value |= pattern_selection << SGODSR_ERROR_LED_SHIFT; 165230557Sjimharris output_value &= ~(SGODSR_INVERT_BIT << SGODSR_ERROR_LED_SHIFT); 166230557Sjimharris } 167230557Sjimharris if(locate) 168230557Sjimharris { //apply pattern to locate LED 169230557Sjimharris output_value |= pattern_selection << SGODSR_LOCATE_LED_SHIFT; 170230557Sjimharris output_value &= ~(SGODSR_INVERT_BIT << SGODSR_LOCATE_LED_SHIFT); 171230557Sjimharris } 172230557Sjimharris if(activity) 173230557Sjimharris { //apply pattern to activity LED 174230557Sjimharris output_value |= pattern_selection << SGODSR_ACTIVITY_LED_SHIFT; 175230557Sjimharris output_value &= ~(SGODSR_INVERT_BIT << SGODSR_ACTIVITY_LED_SHIFT); 176230557Sjimharris } 177230557Sjimharris 178230557Sjimharris scic_sgpio_write_SGODSR_register(core_controller, phy_mask, output_value); 179230557Sjimharris} 180230557Sjimharris 181230557Sjimharrisvoid scic_sgpio_set_led_blink_pattern( 182230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 183230557Sjimharris SCI_PORT_HANDLE_T port_handle, 184230557Sjimharris BOOL error, 185230557Sjimharris BOOL locate, 186230557Sjimharris BOOL activity, 187230557Sjimharris U8 pattern_selection 188230557Sjimharris) 189230557Sjimharris{ 190230557Sjimharris U32 phy_mask; 191230557Sjimharris 192230557Sjimharris SCIC_SDS_PORT_T * port = (SCIC_SDS_PORT_T *) port_handle; 193230557Sjimharris 194230557Sjimharris phy_mask = scic_sds_port_get_phys(port); 195230557Sjimharris 196230557Sjimharris scic_sgpio_apply_led_blink_pattern( 197230557Sjimharris controller, phy_mask, error, locate, activity, pattern_selection); 198230557Sjimharris} 199230557Sjimharris 200230557Sjimharrisvoid scic_sgpio_update_led_state( 201230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 202230557Sjimharris U32 phy_mask, 203230557Sjimharris BOOL error, 204230557Sjimharris BOOL locate, 205230557Sjimharris BOOL activity 206230557Sjimharris) 207230557Sjimharris{ 208230557Sjimharris U32 output_value; 209230557Sjimharris 210230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 211230557Sjimharris 212230557Sjimharris // Start with all LEDs turned on 213230557Sjimharris output_value = 0x00000000; 214230557Sjimharris 215230557Sjimharris if(!error) 216230557Sjimharris { //turn off error LED 217230557Sjimharris output_value |= SGODSR_INVERT_BIT << SGODSR_ERROR_LED_SHIFT; 218230557Sjimharris } 219230557Sjimharris if(!locate) 220230557Sjimharris { //turn off locate LED 221230557Sjimharris output_value |= SGODSR_INVERT_BIT << SGODSR_LOCATE_LED_SHIFT; 222230557Sjimharris } 223230557Sjimharris if(!activity) 224230557Sjimharris { //turn off activity LED 225230557Sjimharris output_value |= SGODSR_INVERT_BIT << SGODSR_ACTIVITY_LED_SHIFT; 226230557Sjimharris } 227230557Sjimharris 228230557Sjimharris scic_sgpio_write_SGODSR_register(core_controller, phy_mask, output_value); 229230557Sjimharris} 230230557Sjimharris 231230557Sjimharrisvoid scic_sgpio_set_led_state( 232230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 233230557Sjimharris SCI_PORT_HANDLE_T port_handle, 234230557Sjimharris BOOL error, 235230557Sjimharris BOOL locate, 236230557Sjimharris BOOL activity 237230557Sjimharris) 238230557Sjimharris{ 239230557Sjimharris U32 phy_mask; 240230557Sjimharris 241230557Sjimharris SCIC_SDS_PORT_T * port = (SCIC_SDS_PORT_T *) port_handle; 242230557Sjimharris 243230557Sjimharris phy_mask = scic_sds_port_get_phys(port); 244230557Sjimharris 245230557Sjimharris scic_sgpio_update_led_state(controller, phy_mask, error, locate, activity); 246230557Sjimharris} 247230557Sjimharris 248230557Sjimharrisvoid scic_sgpio_set_to_hardware_control( 249230557Sjimharris SCI_CONTROLLER_HANDLE_T controller, 250230557Sjimharris BOOL is_hardware_controlled 251230557Sjimharris) 252230557Sjimharris{ 253230557Sjimharris SCIC_SDS_CONTROLLER_T * core_controller = (SCIC_SDS_CONTROLLER_T *) controller; 254230557Sjimharris U8 i; 255230557Sjimharris U32 output_value; 256230557Sjimharris 257230557Sjimharris //turn on hardware control for LED's 258230557Sjimharris if(is_hardware_controlled) 259230557Sjimharris { 260230557Sjimharris output_value = SGPIO_HARDWARE_CONTROL; 261230557Sjimharris } 262230557Sjimharris else //turn off hardware control 263230557Sjimharris { 264230557Sjimharris output_value = SGPIO_SOFTWARE_CONTROL; 265230557Sjimharris } 266230557Sjimharris 267230557Sjimharris for(i = 0; i < SCI_MAX_PHYS; i++) 268230557Sjimharris { 269230557Sjimharris scu_sgpio_peg0_register_write( 270230557Sjimharris core_controller, output_data_select[i], output_value); 271230557Sjimharris } 272230557Sjimharris} 273230557Sjimharris 274230557SjimharrisU32 scic_sgpio_read( 275230557Sjimharris SCI_CONTROLLER_HANDLE_T controller 276230557Sjimharris) 277230557Sjimharris{ 278230557Sjimharris //Not supported in the SCU hardware returning 0xFFFFFFFF 279230557Sjimharris return 0xffffffff; 280230557Sjimharris} 281230557Sjimharris 282230557Sjimharrisvoid scic_sgpio_hardware_initialize( 283230557Sjimharris SCI_CONTROLLER_HANDLE_T controller 284230557Sjimharris) 285230557Sjimharris{ 286230557Sjimharris scic_sgpio_set_functionality(controller, TRUE); 287230557Sjimharris scic_sgpio_set_to_hardware_control(controller, TRUE); 288230557Sjimharris scic_sgpio_set_vendor_code(controller, 0x00); 289230557Sjimharris} 290230557Sjimharris 291230557Sjimharrisvoid scic_sgpio_initialize( 292230557Sjimharris SCI_CONTROLLER_HANDLE_T controller 293230557Sjimharris) 294230557Sjimharris{ 295230557Sjimharris scic_sgpio_set_functionality(controller, TRUE); 296230557Sjimharris scic_sgpio_set_to_hardware_control(controller, FALSE); 297230557Sjimharris scic_sgpio_set_vendor_code(controller, 0x00); 298230557Sjimharris} 299