1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris * 52230557Sjimharris * $FreeBSD: releng/11.0/sys/dev/isci/scil/sci_base_controller.h 240518 2012-09-14 21:28:56Z eadler $ 53230557Sjimharris */ 54230557Sjimharris#ifndef _SCI_BASE_CONTROLLER_H_ 55230557Sjimharris#define _SCI_BASE_CONTROLLER_H_ 56230557Sjimharris 57230557Sjimharris/** 58230557Sjimharris * @file 59230557Sjimharris * 60230557Sjimharris * @brief This file contains all of the structures, constants, and methods 61230557Sjimharris * common to all controller object definitions. 62230557Sjimharris */ 63230557Sjimharris 64230557Sjimharris#ifdef __cplusplus 65230557Sjimharrisextern "C" { 66230557Sjimharris#endif // __cplusplus 67230557Sjimharris 68230557Sjimharris#include <dev/isci/scil/intel_sas.h> 69230557Sjimharris#include <dev/isci/scil/sci_controller_constants.h> 70230557Sjimharris 71230557Sjimharris#include <dev/isci/scil/sci_base_object.h> 72230557Sjimharris#include <dev/isci/scil/sci_base_state.h> 73230557Sjimharris#include <dev/isci/scil/sci_base_logger.h> 74230557Sjimharris#include <dev/isci/scil/sci_base_memory_descriptor_list.h> 75230557Sjimharris#include <dev/isci/scil/sci_base_state_machine.h> 76230557Sjimharris#include <dev/isci/scil/sci_base_state_machine_logger.h> 77230557Sjimharris 78230557Sjimharris/** 79230557Sjimharris * @enum SCI_BASE_CONTROLLER_STATES 80230557Sjimharris * 81230557Sjimharris * @brief This enumeration depicts all the states for the common controller 82230557Sjimharris * state machine. 83230557Sjimharris */ 84230557Sjimharristypedef enum _SCI_BASE_CONTROLLER_STATES 85230557Sjimharris{ 86230557Sjimharris /** 87230557Sjimharris * Simply the initial state for the base controller state machine. 88230557Sjimharris */ 89230557Sjimharris SCI_BASE_CONTROLLER_STATE_INITIAL = 0, 90230557Sjimharris 91230557Sjimharris /** 92230557Sjimharris * This state indicates that the controller is reset. The memory for 93230557Sjimharris * the controller is in it's initial state, but the controller requires 94230557Sjimharris * initialization. 95230557Sjimharris * This state is entered from the INITIAL state. 96230557Sjimharris * This state is entered from the RESETTING state. 97230557Sjimharris */ 98230557Sjimharris SCI_BASE_CONTROLLER_STATE_RESET, 99230557Sjimharris 100230557Sjimharris /** 101230557Sjimharris * This state is typically an action state that indicates the controller 102230557Sjimharris * is in the process of initialization. In this state no new IO operations 103230557Sjimharris * are permitted. 104230557Sjimharris * This state is entered from the RESET state. 105230557Sjimharris */ 106230557Sjimharris SCI_BASE_CONTROLLER_STATE_INITIALIZING, 107230557Sjimharris 108230557Sjimharris /** 109230557Sjimharris * This state indicates that the controller has been successfully 110230557Sjimharris * initialized. In this state no new IO operations are permitted. 111230557Sjimharris * This state is entered from the INITIALIZING state. 112230557Sjimharris */ 113230557Sjimharris SCI_BASE_CONTROLLER_STATE_INITIALIZED, 114230557Sjimharris 115230557Sjimharris /** 116240518Seadler * This state indicates the controller is in the process of becoming 117230557Sjimharris * ready (i.e. starting). In this state no new IO operations are permitted. 118230557Sjimharris * This state is entered from the INITIALIZED state. 119230557Sjimharris */ 120230557Sjimharris SCI_BASE_CONTROLLER_STATE_STARTING, 121230557Sjimharris 122230557Sjimharris /** 123230557Sjimharris * This state indicates the controller is now ready. Thus, the user 124230557Sjimharris * is able to perform IO operations on the controller. 125230557Sjimharris * This state is entered from the STARTING state. 126230557Sjimharris */ 127230557Sjimharris SCI_BASE_CONTROLLER_STATE_READY, 128230557Sjimharris 129230557Sjimharris /** 130230557Sjimharris * This state is typically an action state that indicates the controller 131230557Sjimharris * is in the process of resetting. Thus, the user is unable to perform 132230557Sjimharris * IO operations on the controller. A reset is considered destructive in 133230557Sjimharris * most cases. 134230557Sjimharris * This state is entered from the READY state. 135230557Sjimharris * This state is entered from the FAILED state. 136230557Sjimharris * This state is entered from the STOPPED state. 137230557Sjimharris */ 138230557Sjimharris SCI_BASE_CONTROLLER_STATE_RESETTING, 139230557Sjimharris 140230557Sjimharris /** 141230557Sjimharris * This state indicates that the controller is in the process of stopping. 142230557Sjimharris * In this state no new IO operations are permitted, but existing IO 143230557Sjimharris * operations are allowed to complete. 144230557Sjimharris * This state is entered from the READY state. 145230557Sjimharris */ 146230557Sjimharris SCI_BASE_CONTROLLER_STATE_STOPPING, 147230557Sjimharris 148230557Sjimharris /** 149230557Sjimharris * This state indicates that the controller has successfully been stopped. 150230557Sjimharris * In this state no new IO operations are permitted. 151230557Sjimharris * This state is entered from the STOPPING state. 152230557Sjimharris */ 153230557Sjimharris SCI_BASE_CONTROLLER_STATE_STOPPED, 154230557Sjimharris 155230557Sjimharris /** 156230557Sjimharris * This state indicates that the controller could not successfully be 157230557Sjimharris * initialized. In this state no new IO operations are permitted. 158230557Sjimharris * This state is entered from the INITIALIZING state. 159230557Sjimharris * This state is entered from the STARTING state. 160230557Sjimharris * This state is entered from the STOPPING state. 161230557Sjimharris * This state is entered from the RESETTING state. 162230557Sjimharris */ 163230557Sjimharris SCI_BASE_CONTROLLER_STATE_FAILED, 164230557Sjimharris 165230557Sjimharris SCI_BASE_CONTROLLER_MAX_STATES 166230557Sjimharris 167230557Sjimharris} SCI_BASE_CONTROLLER_STATES; 168230557Sjimharris 169230557Sjimharris/** 170230557Sjimharris * @struct SCI_BASE_CONTROLLER 171230557Sjimharris * 172230557Sjimharris * @brief The base controller object abstracts the fields common to all 173230557Sjimharris * SCI controller objects. 174230557Sjimharris */ 175230557Sjimharristypedef struct SCI_BASE_CONTROLLER 176230557Sjimharris{ 177230557Sjimharris /** 178230557Sjimharris * The field specifies that the parent object for the base controller 179230557Sjimharris * is the base object itself. 180230557Sjimharris */ 181230557Sjimharris SCI_BASE_OBJECT_T parent; 182230557Sjimharris 183230557Sjimharris /** 184230557Sjimharris * This field points to the memory descriptor list associated with this 185230557Sjimharris * controller. The MDL indicates the memory requirements necessary for 186230557Sjimharris * this controller object. 187230557Sjimharris */ 188230557Sjimharris SCI_BASE_MEMORY_DESCRIPTOR_LIST_T mdl; 189230557Sjimharris 190230557Sjimharris /** 191230557Sjimharris * This field records the fact that the controller has encountered a fatal memory 192230557Sjimharris * error and controller must stay in failed state. 193230557Sjimharris */ 194230557Sjimharris U8 error; 195230557Sjimharris 196230557Sjimharris /** 197230557Sjimharris * This field contains the information for the base controller state 198230557Sjimharris * machine. 199230557Sjimharris */ 200230557Sjimharris SCI_BASE_STATE_MACHINE_T state_machine; 201230557Sjimharris 202230557Sjimharris #ifdef SCI_LOGGING 203230557Sjimharris SCI_BASE_STATE_MACHINE_LOGGER_T state_machine_logger; 204230557Sjimharris #endif // SCI_LOGGING 205230557Sjimharris 206230557Sjimharris} SCI_BASE_CONTROLLER_T; 207230557Sjimharris 208230557Sjimharris// Forward declarations 209230557Sjimharrisstruct SCI_BASE_REMOTE_DEVICE; 210230557Sjimharrisstruct SCI_BASE_REQUEST; 211230557Sjimharris 212230557Sjimharristypedef SCI_STATUS (*SCI_BASE_CONTROLLER_HANDLER_T)( 213230557Sjimharris SCI_BASE_CONTROLLER_T * 214230557Sjimharris); 215230557Sjimharris 216230557Sjimharristypedef SCI_STATUS (*SCI_BASE_CONTROLLER_TIMED_HANDLER_T)( 217230557Sjimharris SCI_BASE_CONTROLLER_T *, 218230557Sjimharris U32 219230557Sjimharris); 220230557Sjimharris 221230557Sjimharristypedef SCI_STATUS (*SCI_BASE_CONTROLLER_REQUEST_HANDLER_T)( 222230557Sjimharris SCI_BASE_CONTROLLER_T *, 223230557Sjimharris struct SCI_BASE_REMOTE_DEVICE *, 224230557Sjimharris struct SCI_BASE_REQUEST * 225230557Sjimharris); 226230557Sjimharris 227230557Sjimharristypedef SCI_STATUS (*SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T)( 228230557Sjimharris SCI_BASE_CONTROLLER_T *, 229230557Sjimharris struct SCI_BASE_REMOTE_DEVICE *, 230230557Sjimharris struct SCI_BASE_REQUEST *, 231230557Sjimharris U16 232230557Sjimharris); 233230557Sjimharris 234230557Sjimharris 235230557Sjimharris/** 236230557Sjimharris * @struct SCI_BASE_CONTROLLER_STATE_HANDLER 237230557Sjimharris * 238230557Sjimharris * @brief This structure contains all of the state handler methods common to 239230557Sjimharris * base controller state machines. Handler methods provide the ability 240230557Sjimharris * to change the behavior for user requests or transitions depending 241230557Sjimharris * on the state the machine is in. 242230557Sjimharris */ 243230557Sjimharristypedef struct SCI_BASE_CONTROLLER_STATE_HANDLER 244230557Sjimharris{ 245230557Sjimharris /** 246230557Sjimharris * The start_handler specifies the method invoked when a user attempts to 247230557Sjimharris * start a controller. 248230557Sjimharris */ 249230557Sjimharris SCI_BASE_CONTROLLER_TIMED_HANDLER_T start_handler; 250230557Sjimharris 251230557Sjimharris /** 252230557Sjimharris * The stop_handler specifies the method invoked when a user attempts to 253230557Sjimharris * stop a controller. 254230557Sjimharris */ 255230557Sjimharris SCI_BASE_CONTROLLER_TIMED_HANDLER_T stop_handler; 256230557Sjimharris 257230557Sjimharris /** 258230557Sjimharris * The reset_handler specifies the method invoked when a user attempts to 259230557Sjimharris * reset a controller. 260230557Sjimharris */ 261230557Sjimharris SCI_BASE_CONTROLLER_HANDLER_T reset_handler; 262230557Sjimharris 263230557Sjimharris /** 264230557Sjimharris * The initialize_handler specifies the method invoked when a user 265230557Sjimharris * attempts to initialize a controller. 266230557Sjimharris */ 267230557Sjimharris SCI_BASE_CONTROLLER_HANDLER_T initialize_handler; 268230557Sjimharris 269230557Sjimharris /** 270230557Sjimharris * The start_io_handler specifies the method invoked when a user 271230557Sjimharris * attempts to start an IO request for a controller. 272230557Sjimharris */ 273230557Sjimharris SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_io_handler; 274230557Sjimharris 275230557Sjimharris /** 276230557Sjimharris * The start_internal_request_handler specifies the method invoked when a user 277230557Sjimharris * attempts to start an internal request for a controller. 278230557Sjimharris */ 279230557Sjimharris SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_high_priority_io_handler; 280230557Sjimharris 281230557Sjimharris /** 282230557Sjimharris * The complete_io_handler specifies the method invoked when a user 283230557Sjimharris * attempts to complete an IO request for a controller. 284230557Sjimharris */ 285230557Sjimharris SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_io_handler; 286230557Sjimharris 287230557Sjimharris /** 288230557Sjimharris * The complete_high_priority_io_handler specifies the method invoked when a user 289230557Sjimharris * attempts to complete a high priority IO request for a controller. 290230557Sjimharris */ 291230557Sjimharris SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_high_priority_io_handler; 292230557Sjimharris 293230557Sjimharris /** 294230557Sjimharris * The continue_io_handler specifies the method invoked when a user 295230557Sjimharris * attempts to continue an IO request for a controller. 296230557Sjimharris */ 297230557Sjimharris SCI_BASE_CONTROLLER_REQUEST_HANDLER_T continue_io_handler; 298230557Sjimharris 299230557Sjimharris /** 300230557Sjimharris * The start_task_handler specifies the method invoked when a user 301230557Sjimharris * attempts to start a task management request for a controller. 302230557Sjimharris */ 303230557Sjimharris SCI_BASE_CONTROLLER_START_REQUEST_HANDLER_T start_task_handler; 304230557Sjimharris 305230557Sjimharris /** 306230557Sjimharris * The complete_task_handler specifies the method invoked when a user 307230557Sjimharris * attempts to complete a task management request for a controller. 308230557Sjimharris */ 309230557Sjimharris SCI_BASE_CONTROLLER_REQUEST_HANDLER_T complete_task_handler; 310230557Sjimharris 311230557Sjimharris} SCI_BASE_CONTROLLER_STATE_HANDLER_T; 312230557Sjimharris 313230557Sjimharris/** 314230557Sjimharris * @brief Construct the base controller 315230557Sjimharris * 316230557Sjimharris * @param[in] this_controller This parameter specifies the base controller 317230557Sjimharris * to be constructed. 318230557Sjimharris * @param[in] logger This parameter specifies the logger associated with 319230557Sjimharris * this base controller object. 320230557Sjimharris * @param[in] state_table This parameter specifies the table of state 321230557Sjimharris * definitions to be utilized for the controller state machine. 322230557Sjimharris * @param[in] mde_array This parameter specifies the array of memory 323230557Sjimharris * descriptor entries to be managed by this list. 324230557Sjimharris * @param[in] mde_array_length This parameter specifies the size of the 325230557Sjimharris * array of entries. 326230557Sjimharris * @param[in] next_mdl This parameter specifies a subsequent MDL object 327230557Sjimharris * to be managed by this MDL object. 328230557Sjimharris * @param[in] oem_parameters This parameter specifies the original 329230557Sjimharris * equipment manufacturer parameters to be utilized by this 330230557Sjimharris * controller object. 331230557Sjimharris * 332230557Sjimharris * @return none 333230557Sjimharris */ 334230557Sjimharrisvoid sci_base_controller_construct( 335230557Sjimharris SCI_BASE_CONTROLLER_T * this_controller, 336230557Sjimharris SCI_BASE_LOGGER_T * logger, 337230557Sjimharris SCI_BASE_STATE_T * state_table, 338230557Sjimharris SCI_PHYSICAL_MEMORY_DESCRIPTOR_T * mdes, 339230557Sjimharris U32 mde_count, 340230557Sjimharris SCI_MEMORY_DESCRIPTOR_LIST_HANDLE_T next_mdl 341230557Sjimharris); 342230557Sjimharris 343230557Sjimharris#ifdef __cplusplus 344230557Sjimharris} 345230557Sjimharris#endif // __cplusplus 346230557Sjimharris 347230557Sjimharris#endif // _SCI_BASE_CONTROLLER_H_ 348