ipmi_smic.c revision 163033 
1/*-
2 * Copyright (c) 2006 IronPort Systems Inc. <ambrisko@ironport.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/ipmi/ipmi_smic.c 163033 2006-10-05 15:33:43Z jhb $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/condvar.h>
34#include <sys/eventhandler.h>
35#include <sys/kernel.h>
36#include <sys/kthread.h>
37#include <sys/module.h>
38#include <sys/rman.h>
39#include <sys/selinfo.h>
40#include <machine/bus.h>
41
42#ifdef LOCAL_MODULE
43#include <ipmi.h>
44#include <ipmivars.h>
45#else
46#include <sys/ipmi.h>
47#include <dev/ipmi/ipmivars.h>
48#endif
49
50static void	smic_wait_for_tx_okay(struct ipmi_softc *);
51static void	smic_wait_for_rx_okay(struct ipmi_softc *);
52static void	smic_wait_for_not_busy(struct ipmi_softc *);
53static void	smic_set_busy(struct ipmi_softc *);
54
55static void
56smic_wait_for_tx_okay(struct ipmi_softc *sc)
57{
58	int flags;
59
60	do {
61		flags = INB(sc, SMIC_FLAGS);
62	} while (!(flags & SMIC_STATUS_TX_RDY));
63}
64
65static void
66smic_wait_for_rx_okay(struct ipmi_softc *sc)
67{
68	int flags;
69
70	do {
71		flags = INB(sc, SMIC_FLAGS);
72	} while (!(flags & SMIC_STATUS_RX_RDY));
73}
74
75static void
76smic_wait_for_not_busy(struct ipmi_softc *sc)
77{
78	int flags;
79
80	do {
81		flags = INB(sc, SMIC_FLAGS);
82	} while (flags & SMIC_STATUS_BUSY);
83}
84
85static void
86smic_set_busy(struct ipmi_softc *sc)
87{
88	int flags;
89
90	flags = INB(sc, SMIC_FLAGS);
91	flags |= SMIC_STATUS_BUSY;
92	flags &= ~SMIC_STATUS_RESERVED;
93	OUTB(sc, SMIC_FLAGS, flags);
94}
95
96/*
97 * Start a transfer with a WR_START transaction that sends the NetFn/LUN
98 * address.
99 */
100static int
101smic_start_write(struct ipmi_softc *sc, u_char data)
102{
103	u_char error, status;
104
105	smic_wait_for_not_busy(sc);
106
107	OUTB(sc, SMIC_CTL_STS, SMIC_CC_SMS_WR_START);
108	OUTB(sc, SMIC_DATA, data);
109	smic_set_busy(sc);
110	smic_wait_for_not_busy(sc);
111	status = INB(sc, SMIC_CTL_STS);
112	if (status != SMIC_SC_SMS_WR_START) {
113		error = INB(sc, SMIC_DATA);
114		device_printf(sc->ipmi_dev, "SMIC: Write did not start %02x\n",
115		    error);
116		return (0);
117	}
118	return (1);
119}
120
121/*
122 * Write a byte in the middle of the message (either the command or one of
123 * the data bytes) using a WR_NEXT transaction.
124 */
125static int
126smic_write_next(struct ipmi_softc *sc, u_char data)
127{
128	u_char error, status;
129
130	OUTB(sc, SMIC_CTL_STS, SMIC_CC_SMS_WR_NEXT);
131	smic_wait_for_tx_okay(sc);
132	OUTB(sc, SMIC_DATA, data);
133	smic_set_busy(sc);
134	smic_wait_for_not_busy(sc);
135	status = INB(sc, SMIC_CTL_STS);
136	if (status != SMIC_SC_SMS_WR_NEXT) {
137		error = INB(sc, SMIC_DATA);
138		device_printf(sc->ipmi_dev, "SMIC: Write did not next %02x\n",
139		    error);
140		return (0);
141	}
142	return (1);
143}
144
145/*
146 * Write the last byte of a transfer to end the write phase via a WR_END
147 * transaction.
148 */
149static int
150smic_write_last(struct ipmi_softc *sc, u_char data)
151{
152	u_char error, status;
153
154	OUTB(sc, SMIC_CTL_STS, SMIC_CC_SMS_WR_END);
155	smic_wait_for_tx_okay(sc);
156	OUTB(sc, SMIC_DATA, data);
157	smic_set_busy(sc);
158	smic_wait_for_not_busy(sc);
159	status = INB(sc, SMIC_CTL_STS);
160	if (status != SMIC_SC_SMS_WR_END) {
161		error = INB(sc, SMIC_DATA);
162		device_printf(sc->ipmi_dev, "SMIC: Write did not end %02x\n",
163		    error);
164		return (0);
165	}
166	return (1);
167}
168
169/*
170 * Start the read phase of a transfer with a RD_START transaction.
171 */
172static int
173smic_start_read(struct ipmi_softc *sc, u_char *data)
174{
175	u_char error, status;
176
177	smic_wait_for_not_busy(sc);
178
179	OUTB(sc, SMIC_CTL_STS, SMIC_CC_SMS_RD_START);
180	smic_wait_for_rx_okay(sc);
181	smic_set_busy(sc);
182	smic_wait_for_not_busy(sc);
183	status = INB(sc, SMIC_CTL_STS);
184	if (status != SMIC_SC_SMS_RD_START) {
185		error = INB(sc, SMIC_DATA);
186		device_printf(sc->ipmi_dev, "SMIC: Read did not start %02x\n",
187		    error);
188		return (0);
189	}
190	*data = INB(sc, SMIC_DATA);
191	return (1);
192}
193
194/*
195 * Read a byte via a RD_NEXT transaction.  If this was the last byte, return
196 * 2 rather than 1.
197 */
198static int
199smic_read_byte(struct ipmi_softc *sc, u_char *data)
200{
201	u_char error, status;
202
203	OUTB(sc, SMIC_CTL_STS, SMIC_SC_SMS_RD_NEXT);
204	smic_wait_for_rx_okay(sc);
205	smic_set_busy(sc);
206	smic_wait_for_not_busy(sc);
207	status = INB(sc, SMIC_CTL_STS);
208	if (status != SMIC_SC_SMS_RD_NEXT &&
209	    status != SMIC_SC_SMS_RD_END) {
210		error = INB(sc, SMIC_DATA);
211		device_printf(sc->ipmi_dev, "SMIC: Read did not next %02x\n",
212		    error);
213		return (0);
214	}
215	*data = INB(sc, SMIC_DATA);
216	if (status == SMIC_SC_SMS_RD_NEXT)
217		return (1);
218	else
219		return (2);
220}
221
222/* Complete a transfer via a RD_END transaction after reading the last byte. */
223static int
224smic_read_end(struct ipmi_softc *sc)
225{
226	u_char error, status;
227
228	OUTB(sc, SMIC_CTL_STS, SMIC_CC_SMS_RD_END);
229	smic_set_busy(sc);
230	smic_wait_for_not_busy(sc);
231	status = INB(sc, SMIC_CTL_STS);
232	if (status != SMIC_SC_SMS_RDY) {
233		error = INB(sc, SMIC_DATA);
234		device_printf(sc->ipmi_dev, "SMIC: Read did not end %02x\n",
235		    error);
236		return (0);
237	}
238	return (1);
239}
240
241static int
242smic_polled_request(struct ipmi_softc *sc, struct ipmi_request *req)
243{
244	u_char *cp, data;
245	int i, state;
246
247	/* First, start the message with the address. */
248	if (!smic_start_write(sc, req->ir_addr))
249		return (0);
250
251	if (req->ir_requestlen == 0) {
252		/* Send the command as the last byte. */
253		if (!smic_write_last(sc, req->ir_command))
254			return (0);
255	} else {
256		/* Send the command. */
257		if (!smic_write_next(sc, req->ir_command))
258			return (0);
259
260		/* Send the payload. */
261		cp = req->ir_request;
262		for (i = 0; i < req->ir_requestlen - 1; i++)
263			if (!smic_write_next(sc, *cp++))
264				return (0);
265		if (!smic_write_last(sc, *cp))
266			return (0);
267	}
268
269	/* Start the read phase by reading the NetFn/LUN. */
270	if (smic_start_read(sc, &data) != 1)
271		return (0);
272	if (data != IPMI_REPLY_ADDR(req->ir_addr)) {
273		device_printf(sc->ipmi_dev, "SMIC: Reply address mismatch\n");
274		return (0);
275	}
276
277	/* Read the command. */
278	if (smic_read_byte(sc, &data) != 1)
279		return (0);
280	if (data != req->ir_command) {
281		device_printf(sc->ipmi_dev, "SMIC: Command mismatch\n");
282		return (0);
283	}
284
285	/* Read the completion code. */
286	state = smic_read_byte(sc, &req->ir_compcode);
287	if (state == 0)
288		return (0);
289
290	/* Finally, read the reply from the BMC. */
291	i = 0;
292	while (state == 1) {
293		state = smic_read_byte(sc, &data);
294		if (state == 0)
295			return (0);
296		if (i < req->ir_replybuflen)
297			req->ir_reply[i] = data;
298		i++;
299	}
300
301	/* Terminate the transfer. */
302	if (!smic_read_end(sc))
303		return (0);
304	req->ir_replylen = i;
305	if (req->ir_replybuflen < i && req->ir_replybuflen != 0)
306		device_printf(sc->ipmi_dev,
307		    "SMIC: Read short: %zd buffer, %d actual\n",
308		    req->ir_replybuflen, i);
309	return (1);
310}
311
312static void
313smic_loop(void *arg)
314{
315	struct ipmi_softc *sc = arg;
316	struct ipmi_request *req;
317	int i, ok;
318
319	IPMI_LOCK(sc);
320	while ((req = ipmi_dequeue_request(sc)) != NULL) {
321		ok = 0;
322		for (i = 0; i < 3 && !ok; i++)
323			ok = smic_polled_request(sc, req);
324		if (ok)
325			req->ir_error = 0;
326		else
327			req->ir_error = EIO;
328		ipmi_complete_request(sc, req);
329	}
330	IPMI_UNLOCK(sc);
331	kthread_exit(0);
332}
333
334static int
335smic_startup(struct ipmi_softc *sc)
336{
337
338	return (kthread_create(smic_loop, sc, &sc->ipmi_kthread, 0, 0,
339	    "%s: smic", device_get_nameunit(sc->ipmi_dev)));
340}
341
342int
343ipmi_smic_attach(struct ipmi_softc *sc)
344{
345	int flags;
346
347	/* Setup function pointers. */
348	sc->ipmi_startup = smic_startup;
349	sc->ipmi_enqueue_request = ipmi_polled_enqueue_request;
350
351	/* See if we can talk to the controller. */
352	flags = INB(sc, SMIC_FLAGS);
353	if (flags == 0xff) {
354		device_printf(sc->ipmi_dev, "couldn't find it\n");
355		return (ENXIO);
356	}
357
358	return (0);
359}
360