iir.c revision 196969
1/*- 2 * Copyright (c) 2000-04 ICP vortex GmbH 3 * Copyright (c) 2002-04 Intel Corporation 4 * Copyright (c) 2003-04 Adaptec Inc. 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32/* 33 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver 34 * 35 * Written by: Achim Leubner <achim_leubner@adaptec.com> 36 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> 37 * 38 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers. 39 * Mike Smith; Some driver source code. 40 * FreeBSD.ORG; Great O/S to work on and for. 41 * 42 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $" 43 */ 44 45#include <sys/cdefs.h> 46__FBSDID("$FreeBSD: head/sys/dev/iir/iir.c 196969 2009-09-08 13:16:55Z phk $"); 47 48#define _IIR_C_ 49 50/* #include "opt_iir.h" */ 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/endian.h> 54#include <sys/eventhandler.h> 55#include <sys/malloc.h> 56#include <sys/kernel.h> 57#include <sys/bus.h> 58 59#include <machine/bus.h> 60#include <machine/stdarg.h> 61 62#include <cam/cam.h> 63#include <cam/cam_ccb.h> 64#include <cam/cam_sim.h> 65#include <cam/cam_xpt_sim.h> 66#include <cam/cam_debug.h> 67#include <cam/scsi/scsi_all.h> 68#include <cam/scsi/scsi_message.h> 69 70#include <dev/iir/iir.h> 71 72MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer"); 73 74struct gdt_softc *gdt_wait_gdt; 75int gdt_wait_index; 76 77#ifdef GDT_DEBUG 78int gdt_debug = GDT_DEBUG; 79#ifdef __SERIAL__ 80#define MAX_SERBUF 160 81static void ser_init(void); 82static void ser_puts(char *str); 83static void ser_putc(int c); 84static char strbuf[MAX_SERBUF+1]; 85#ifdef __COM2__ 86#define COM_BASE 0x2f8 87#else 88#define COM_BASE 0x3f8 89#endif 90static void ser_init() 91{ 92 unsigned port=COM_BASE; 93 94 outb(port+3, 0x80); 95 outb(port+1, 0); 96 /* 19200 Baud, if 9600: outb(12,port) */ 97 outb(port, 6); 98 outb(port+3, 3); 99 outb(port+1, 0); 100} 101 102static void ser_puts(char *str) 103{ 104 char *ptr; 105 106 ser_init(); 107 for (ptr=str;*ptr;++ptr) 108 ser_putc((int)(*ptr)); 109} 110 111static void ser_putc(int c) 112{ 113 unsigned port=COM_BASE; 114 115 while ((inb(port+5) & 0x20)==0); 116 outb(port, c); 117 if (c==0x0a) 118 { 119 while ((inb(port+5) & 0x20)==0); 120 outb(port, 0x0d); 121 } 122} 123 124int ser_printf(const char *fmt, ...) 125{ 126 va_list args; 127 int i; 128 129 va_start(args,fmt); 130 i = vsprintf(strbuf,fmt,args); 131 ser_puts(strbuf); 132 va_end(args); 133 return i; 134} 135#endif 136#endif 137 138/* The linked list of softc structures */ 139struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs); 140/* controller cnt. */ 141int gdt_cnt = 0; 142/* event buffer */ 143static gdt_evt_str ebuffer[GDT_MAX_EVENTS]; 144static int elastidx, eoldidx; 145/* statistics */ 146gdt_statist_t gdt_stat; 147 148/* Definitions for our use of the SIM private CCB area */ 149#define ccb_sim_ptr spriv_ptr0 150#define ccb_priority spriv_field1 151 152static void iir_action(struct cam_sim *sim, union ccb *ccb); 153static void iir_poll(struct cam_sim *sim); 154static void iir_shutdown(void *arg, int howto); 155static void iir_timeout(void *arg); 156static void iir_watchdog(void *arg); 157 158static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, 159 int *secs); 160static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 161 u_int8_t service, u_int16_t opcode, 162 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3); 163static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb, 164 int timeout); 165 166static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt); 167 168static int gdt_sync_event(struct gdt_softc *gdt, int service, 169 u_int8_t index, struct gdt_ccb *gccb); 170static int gdt_async_event(struct gdt_softc *gdt, int service); 171static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, 172 union ccb *ccb, int *lock); 173static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, 174 union ccb *ccb, int *lock); 175static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, 176 gdt_ucmd_t *ucmd, int *lock); 177static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb); 178 179static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, 180 int nseg, int error); 181static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 182 int nseg, int error); 183 184int 185iir_init(struct gdt_softc *gdt) 186{ 187 u_int16_t cdev_cnt; 188 int i, id, drv_cyls, drv_hds, drv_secs; 189 struct gdt_ccb *gccb; 190 191 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n")); 192 193 gdt->sc_state = GDT_POLLING; 194 gdt_clear_events(); 195 bzero(&gdt_stat, sizeof(gdt_statist_t)); 196 197 SLIST_INIT(&gdt->sc_free_gccb); 198 SLIST_INIT(&gdt->sc_pending_gccb); 199 TAILQ_INIT(&gdt->sc_ccb_queue); 200 TAILQ_INIT(&gdt->sc_ucmd_queue); 201 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links); 202 203 /* DMA tag for mapping buffers into device visible space. */ 204 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0, 205 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 206 /*highaddr*/BUS_SPACE_MAXADDR, 207 /*filter*/NULL, /*filterarg*/NULL, 208 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG, 209 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 210 /*flags*/BUS_DMA_ALLOCNOW, 211 /*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant, 212 &gdt->sc_buffer_dmat) != 0) { 213 printf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n", 214 gdt->sc_hanum); 215 return (1); 216 } 217 gdt->sc_init_level++; 218 219 /* DMA tag for our ccb structures */ 220 if (bus_dma_tag_create(gdt->sc_parent_dmat, 221 /*alignment*/1, 222 /*boundary*/0, 223 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 224 /*highaddr*/BUS_SPACE_MAXADDR, 225 /*filter*/NULL, 226 /*filterarg*/NULL, 227 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */ 228 /*nsegments*/1, 229 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 230 /*flags*/0, /*lockfunc*/busdma_lock_mutex, 231 /*lockarg*/&Giant, &gdt->sc_gcscratch_dmat) != 0) { 232 printf("iir%d: bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n", 233 gdt->sc_hanum); 234 return (1); 235 } 236 gdt->sc_init_level++; 237 238 /* Allocation for our ccb scratch area */ 239 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch, 240 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) { 241 printf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gccbs,...) failed\n", 242 gdt->sc_hanum); 243 return (1); 244 } 245 gdt->sc_init_level++; 246 247 /* And permanently map them */ 248 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap, 249 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ, 250 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0); 251 gdt->sc_init_level++; 252 253 /* Clear them out. */ 254 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ); 255 256 /* Initialize the ccbs */ 257 gdt->sc_gccbs = malloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF, 258 M_NOWAIT | M_ZERO); 259 if (gdt->sc_gccbs == NULL) { 260 printf("iir%d: no memory for gccbs.\n", gdt->sc_hanum); 261 return (1); 262 } 263 for (i = GDT_MAXCMDS-1; i >= 0; i--) { 264 gccb = &gdt->sc_gccbs[i]; 265 gccb->gc_cmd_index = i + 2; 266 gccb->gc_flags = GDT_GCF_UNUSED; 267 gccb->gc_map_flag = FALSE; 268 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0, 269 &gccb->gc_dmamap) != 0) 270 return(1); 271 gccb->gc_map_flag = TRUE; 272 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i]; 273 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i; 274 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 275 } 276 gdt->sc_init_level++; 277 278 /* create the control device */ 279 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum); 280 281 /* allocate ccb for gdt_internal_cmd() */ 282 gccb = gdt_get_ccb(gdt); 283 if (gccb == NULL) { 284 printf("iir%d: No free command index found\n", 285 gdt->sc_hanum); 286 return (1); 287 } 288 bzero(gccb->gc_cmd, GDT_CMD_SZ); 289 290 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT, 291 0, 0, 0)) { 292 printf("iir%d: Screen service initialization error %d\n", 293 gdt->sc_hanum, gdt->sc_status); 294 gdt_free_ccb(gdt, gccb); 295 return (1); 296 } 297 298 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO, 299 0, 0, 0); 300 301 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT, 302 GDT_LINUX_OS, 0, 0)) { 303 printf("iir%d: Cache service initialization error %d\n", 304 gdt->sc_hanum, gdt->sc_status); 305 gdt_free_ccb(gdt, gccb); 306 return (1); 307 } 308 cdev_cnt = (u_int16_t)gdt->sc_info; 309 gdt->sc_fw_vers = gdt->sc_service; 310 311 /* Detect number of buses */ 312 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST); 313 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS; 314 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0; 315 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1; 316 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ); 317 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 318 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL, 319 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) { 320 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT]; 321 for (i = 0; i < gdt->sc_bus_cnt; i++) { 322 id = gccb->gc_scratch[GDT_IOC_HDR_SZ + 323 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID]; 324 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff; 325 } 326 } else { 327 /* New method failed, use fallback. */ 328 for (i = 0; i < GDT_MAXBUS; i++) { 329 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i); 330 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 331 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN, 332 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL, 333 GDT_GETCH_SZ)) { 334 if (i == 0) { 335 printf("iir%d: Cannot get channel count, " 336 "error %d\n", gdt->sc_hanum, gdt->sc_status); 337 gdt_free_ccb(gdt, gccb); 338 return (1); 339 } 340 break; 341 } 342 gdt->sc_bus_id[i] = 343 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ? 344 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff; 345 } 346 gdt->sc_bus_cnt = i; 347 } 348 /* add one "virtual" channel for the host drives */ 349 gdt->sc_virt_bus = gdt->sc_bus_cnt; 350 gdt->sc_bus_cnt++; 351 352 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT, 353 0, 0, 0)) { 354 printf("iir%d: Raw service initialization error %d\n", 355 gdt->sc_hanum, gdt->sc_status); 356 gdt_free_ccb(gdt, gccb); 357 return (1); 358 } 359 360 /* Set/get features raw service (scatter/gather) */ 361 gdt->sc_raw_feat = 0; 362 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT, 363 GDT_SCATTER_GATHER, 0, 0)) { 364 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT, 365 0, 0, 0)) { 366 gdt->sc_raw_feat = gdt->sc_info; 367 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 368 panic("iir%d: Scatter/Gather Raw Service " 369 "required but not supported!\n", gdt->sc_hanum); 370 gdt_free_ccb(gdt, gccb); 371 return (1); 372 } 373 } 374 } 375 376 /* Set/get features cache service (scatter/gather) */ 377 gdt->sc_cache_feat = 0; 378 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT, 379 0, GDT_SCATTER_GATHER, 0)) { 380 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT, 381 0, 0, 0)) { 382 gdt->sc_cache_feat = gdt->sc_info; 383 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) { 384 panic("iir%d: Scatter/Gather Cache Service " 385 "required but not supported!\n", gdt->sc_hanum); 386 gdt_free_ccb(gdt, gccb); 387 return (1); 388 } 389 } 390 } 391 392 /* OEM */ 393 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01); 394 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t)); 395 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL, 396 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL, 397 sizeof(gdt_oem_str_record_t))) { 398 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *) 399 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7); 400 gdt->oem_name[7]='\0'; 401 } else { 402 /* Old method, based on PCI ID */ 403 if (gdt->sc_vendor == INTEL_VENDOR_ID) 404 strcpy(gdt->oem_name,"Intel "); 405 else 406 strcpy(gdt->oem_name,"ICP "); 407 } 408 409 /* Scan for cache devices */ 410 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) { 411 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO, 412 i, 0, 0)) { 413 gdt->sc_hdr[i].hd_present = 1; 414 gdt->sc_hdr[i].hd_size = gdt->sc_info; 415 416 /* 417 * Evaluate mapping (sectors per head, heads per cyl) 418 */ 419 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32; 420 if (gdt->sc_info2 == 0) 421 gdt_eval_mapping(gdt->sc_hdr[i].hd_size, 422 &drv_cyls, &drv_hds, &drv_secs); 423 else { 424 drv_hds = gdt->sc_info2 & 0xff; 425 drv_secs = (gdt->sc_info2 >> 8) & 0xff; 426 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds / 427 drv_secs; 428 } 429 gdt->sc_hdr[i].hd_heads = drv_hds; 430 gdt->sc_hdr[i].hd_secs = drv_secs; 431 /* Round the size */ 432 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs; 433 434 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, 435 GDT_DEVTYPE, i, 0, 0)) 436 gdt->sc_hdr[i].hd_devtype = gdt->sc_info; 437 } 438 } 439 440 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n", 441 gdt->sc_dpmembase, 442 gdt->sc_bus_cnt, cdev_cnt, 443 cdev_cnt == 1 ? "" : "s")); 444 gdt_free_ccb(gdt, gccb); 445 446 gdt_cnt++; 447 return (0); 448} 449 450void 451iir_free(struct gdt_softc *gdt) 452{ 453 int i; 454 455 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n")); 456 457 switch (gdt->sc_init_level) { 458 default: 459 gdt_destroy_dev(gdt->sc_dev); 460 case 5: 461 for (i = GDT_MAXCMDS-1; i >= 0; i--) 462 if (gdt->sc_gccbs[i].gc_map_flag) 463 bus_dmamap_destroy(gdt->sc_buffer_dmat, 464 gdt->sc_gccbs[i].gc_dmamap); 465 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap); 466 free(gdt->sc_gccbs, M_GDTBUF); 467 case 4: 468 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap); 469 case 3: 470 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat); 471 case 2: 472 bus_dma_tag_destroy(gdt->sc_buffer_dmat); 473 case 1: 474 bus_dma_tag_destroy(gdt->sc_parent_dmat); 475 case 0: 476 break; 477 } 478 TAILQ_REMOVE(&gdt_softcs, gdt, links); 479} 480 481void 482iir_attach(struct gdt_softc *gdt) 483{ 484 struct cam_devq *devq; 485 int i; 486 487 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n")); 488 489 /* 490 * Create the device queue for our SIM. 491 * XXX Throttle this down since the card has problems under load. 492 */ 493 devq = cam_simq_alloc(32); 494 if (devq == NULL) 495 return; 496 497 for (i = 0; i < gdt->sc_bus_cnt; i++) { 498 /* 499 * Construct our SIM entry 500 */ 501 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir", 502 gdt, gdt->sc_hanum, &Giant, 503 /*untagged*/1, 504 /*tagged*/GDT_MAXCMDS, devq); 505 if (xpt_bus_register(gdt->sims[i], gdt->sc_devnode, i) != CAM_SUCCESS) { 506 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 507 break; 508 } 509 510 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL, 511 cam_sim_path(gdt->sims[i]), 512 CAM_TARGET_WILDCARD, 513 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 514 xpt_bus_deregister(cam_sim_path(gdt->sims[i])); 515 cam_sim_free(gdt->sims[i], /*free_devq*/i == 0); 516 break; 517 } 518 } 519 if (i > 0) 520 EVENTHANDLER_REGISTER(shutdown_final, iir_shutdown, 521 gdt, SHUTDOWN_PRI_DEFAULT); 522 /* iir_watchdog(gdt); */ 523 gdt->sc_state = GDT_NORMAL; 524} 525 526static void 527gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs) 528{ 529 *cyls = size / GDT_HEADS / GDT_SECS; 530 if (*cyls < GDT_MAXCYLS) { 531 *heads = GDT_HEADS; 532 *secs = GDT_SECS; 533 } else { 534 /* Too high for 64 * 32 */ 535 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS; 536 if (*cyls < GDT_MAXCYLS) { 537 *heads = GDT_MEDHEADS; 538 *secs = GDT_MEDSECS; 539 } else { 540 /* Too high for 127 * 63 */ 541 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS; 542 *heads = GDT_BIGHEADS; 543 *secs = GDT_BIGSECS; 544 } 545 } 546} 547 548static int 549gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb, 550 int timeout) 551{ 552 int rv = 0; 553 554 GDT_DPRINTF(GDT_D_INIT, 555 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout)); 556 557 gdt->sc_state |= GDT_POLL_WAIT; 558 do { 559 iir_intr(gdt); 560 if (gdt == gdt_wait_gdt && 561 gccb->gc_cmd_index == gdt_wait_index) { 562 rv = 1; 563 break; 564 } 565 DELAY(1); 566 } while (--timeout); 567 gdt->sc_state &= ~GDT_POLL_WAIT; 568 569 while (gdt->sc_test_busy(gdt)) 570 DELAY(1); /* XXX correct? */ 571 572 return (rv); 573} 574 575static int 576gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb, 577 u_int8_t service, u_int16_t opcode, 578 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3) 579{ 580 int retries; 581 582 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n", 583 gdt, service, opcode, arg1, arg2, arg3)); 584 585 bzero(gccb->gc_cmd, GDT_CMD_SZ); 586 587 for (retries = GDT_RETRIES; ; ) { 588 gccb->gc_service = service; 589 gccb->gc_flags = GDT_GCF_INTERNAL; 590 591 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 592 gccb->gc_cmd_index); 593 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 594 595 switch (service) { 596 case GDT_CACHESERVICE: 597 if (opcode == GDT_IOCTL) { 598 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 599 GDT_IOCTL_SUBFUNC, arg1); 600 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 601 GDT_IOCTL_CHANNEL, arg2); 602 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 603 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3); 604 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 605 gccb->gc_scratch_busbase); 606 } else { 607 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + 608 GDT_CACHE_DEVICENO, (u_int16_t)arg1); 609 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 610 GDT_CACHE_BLOCKNO, arg2); 611 } 612 break; 613 614 case GDT_SCSIRAWSERVICE: 615 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + 616 GDT_RAW_DIRECTION, arg1); 617 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 618 (u_int8_t)arg2; 619 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 620 (u_int8_t)arg3; 621 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 622 (u_int8_t)(arg3 >> 8); 623 } 624 625 gdt->sc_set_sema0(gdt); 626 gccb->gc_cmd_len = GDT_CMD_SZ; 627 gdt->sc_cmd_off = 0; 628 gdt->sc_cmd_cnt = 0; 629 gdt->sc_copy_cmd(gdt, gccb); 630 gdt->sc_release_event(gdt); 631 DELAY(20); 632 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT)) 633 return (0); 634 if (gdt->sc_status != GDT_S_BSY || --retries == 0) 635 break; 636 DELAY(1); 637 } 638 return (gdt->sc_status == GDT_S_OK); 639} 640 641static struct gdt_ccb * 642gdt_get_ccb(struct gdt_softc *gdt) 643{ 644 struct gdt_ccb *gccb; 645 int lock; 646 647 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt)); 648 649 lock = splcam(); 650 gccb = SLIST_FIRST(&gdt->sc_free_gccb); 651 if (gccb != NULL) { 652 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle); 653 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle); 654 ++gdt_stat.cmd_index_act; 655 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max) 656 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act; 657 } 658 splx(lock); 659 return (gccb); 660} 661 662void 663gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb) 664{ 665 int lock; 666 667 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb)); 668 669 lock = splcam(); 670 gccb->gc_flags = GDT_GCF_UNUSED; 671 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle); 672 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle); 673 --gdt_stat.cmd_index_act; 674 splx(lock); 675 if (gdt->sc_state & GDT_SHUTDOWN) 676 wakeup(gccb); 677} 678 679void 680gdt_next(struct gdt_softc *gdt) 681{ 682 int lock; 683 union ccb *ccb; 684 gdt_ucmd_t *ucmd; 685 struct cam_sim *sim; 686 int bus, target, lun; 687 int next_cmd; 688 689 struct ccb_scsiio *csio; 690 struct ccb_hdr *ccbh; 691 struct gdt_ccb *gccb = NULL; 692 u_int8_t cmd; 693 694 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt)); 695 696 lock = splcam(); 697 if (gdt->sc_test_busy(gdt)) { 698 if (!(gdt->sc_state & GDT_POLLING)) { 699 splx(lock); 700 return; 701 } 702 while (gdt->sc_test_busy(gdt)) 703 DELAY(1); 704 } 705 706 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0; 707 next_cmd = TRUE; 708 for (;;) { 709 /* I/Os in queue? controller ready? */ 710 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) && 711 !TAILQ_FIRST(&gdt->sc_ccb_queue)) 712 break; 713 714 /* 1.: I/Os without ccb (IOCTLs) */ 715 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue); 716 if (ucmd != NULL) { 717 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links); 718 if ((gccb = gdt_ioctl_cmd(gdt, ucmd, &lock)) == NULL) { 719 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 720 break; 721 } 722 break; 723 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */ 724 } 725 726 /* 2.: I/Os with ccb */ 727 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue); 728 /* ist dann immer != NULL, da oben getestet */ 729 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 730 bus = cam_sim_bus(sim); 731 target = ccb->ccb_h.target_id; 732 lun = ccb->ccb_h.target_lun; 733 734 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 735 --gdt_stat.req_queue_act; 736 /* ccb->ccb_h.func_code is XPT_SCSI_IO */ 737 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n", 738 ccb->ccb_h.flags)); 739 csio = &ccb->csio; 740 ccbh = &ccb->ccb_h; 741 cmd = csio->cdb_io.cdb_bytes[0]; 742 /* Max CDB length is 12 bytes */ 743 if (csio->cdb_len > 12) { 744 ccbh->status = CAM_REQ_INVALID; 745 --gdt_stat.io_count_act; 746 xpt_done(ccb); 747 } else if (bus != gdt->sc_virt_bus) { 748 /* raw service command */ 749 if ((gccb = gdt_raw_cmd(gdt, ccb, &lock)) == NULL) { 750 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 751 sim_links.tqe); 752 ++gdt_stat.req_queue_act; 753 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 754 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 755 next_cmd = FALSE; 756 } 757 } else if (target >= GDT_MAX_HDRIVES || 758 !gdt->sc_hdr[target].hd_present || lun != 0) { 759 ccbh->status = CAM_DEV_NOT_THERE; 760 --gdt_stat.io_count_act; 761 xpt_done(ccb); 762 } else { 763 /* cache service command */ 764 if (cmd == READ_6 || cmd == WRITE_6 || 765 cmd == READ_10 || cmd == WRITE_10) { 766 if ((gccb = gdt_cache_cmd(gdt, ccb, &lock)) == NULL) { 767 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, 768 sim_links.tqe); 769 ++gdt_stat.req_queue_act; 770 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 771 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 772 next_cmd = FALSE; 773 } 774 } else { 775 splx(lock); 776 gdt_internal_cache_cmd(gdt, ccb); 777 lock = splcam(); 778 } 779 } 780 if ((gdt->sc_state & GDT_POLLING) || !next_cmd) 781 break; 782 } 783 if (gdt->sc_cmd_cnt > 0) 784 gdt->sc_release_event(gdt); 785 786 splx(lock); 787 788 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) { 789 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT); 790 } 791} 792 793static struct gdt_ccb * 794gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 795{ 796 struct gdt_ccb *gccb; 797 struct cam_sim *sim; 798 799 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb)); 800 801 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) + 802 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 803 gdt->sc_ic_all_size) { 804 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n", 805 gdt->sc_hanum)); 806 return (NULL); 807 } 808 809 gccb = gdt_get_ccb(gdt); 810 if (gccb == NULL) { 811 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n", 812 gdt->sc_hanum)); 813 return (gccb); 814 } 815 bzero(gccb->gc_cmd, GDT_CMD_SZ); 816 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 817 gccb->gc_ccb = ccb; 818 gccb->gc_service = GDT_SCSIRAWSERVICE; 819 gccb->gc_flags = GDT_GCF_SCSI; 820 821 if (gdt->sc_cmd_cnt == 0) 822 gdt->sc_set_sema0(gdt); 823 splx(*lock); 824 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 825 gccb->gc_cmd_index); 826 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 827 828 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 829 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 830 GDT_DATA_IN : GDT_DATA_OUT); 831 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 832 ccb->csio.dxfer_len); 833 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 834 ccb->csio.cdb_len); 835 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 836 ccb->csio.cdb_len); 837 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 838 ccb->ccb_h.target_id; 839 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 840 ccb->ccb_h.target_lun; 841 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 842 cam_sim_bus(sim); 843 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 844 sizeof(struct scsi_sense_data)); 845 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 846 gccb->gc_scratch_busbase); 847 848 /* 849 * If we have any data to send with this command, 850 * map it into bus space. 851 */ 852 /* Only use S/G if there is a transfer */ 853 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 854 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 855 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 856 int s; 857 int error; 858 859 /* vorher unlock von splcam() ??? */ 860 s = splsoftvm(); 861 error = 862 bus_dmamap_load(gdt->sc_buffer_dmat, 863 gccb->gc_dmamap, 864 ccb->csio.data_ptr, 865 ccb->csio.dxfer_len, 866 gdtexecuteccb, 867 gccb, /*flags*/0); 868 if (error == EINPROGRESS) { 869 xpt_freeze_simq(sim, 1); 870 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 871 } 872 splx(s); 873 } else { 874 panic("iir: CAM_DATA_PHYS not supported"); 875 } 876 } else { 877 struct bus_dma_segment *segs; 878 879 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 880 panic("iir%d: iir_action - Physical " 881 "segment pointers unsupported", gdt->sc_hanum); 882 883 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 884 panic("iir%d: iir_action - Virtual " 885 "segment addresses unsupported", gdt->sc_hanum); 886 887 /* Just use the segments provided */ 888 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 889 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 890 } 891 } else { 892 gdtexecuteccb(gccb, NULL, 0, 0); 893 } 894 895 *lock = splcam(); 896 return (gccb); 897} 898 899static struct gdt_ccb * 900gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb, int *lock) 901{ 902 struct gdt_ccb *gccb; 903 struct cam_sim *sim; 904 u_int8_t *cmdp; 905 u_int16_t opcode; 906 u_int32_t blockno, blockcnt; 907 908 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb)); 909 910 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) + 911 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET > 912 gdt->sc_ic_all_size) { 913 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n", 914 gdt->sc_hanum)); 915 return (NULL); 916 } 917 918 gccb = gdt_get_ccb(gdt); 919 if (gccb == NULL) { 920 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 921 gdt->sc_hanum)); 922 return (gccb); 923 } 924 bzero(gccb->gc_cmd, GDT_CMD_SZ); 925 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr; 926 gccb->gc_ccb = ccb; 927 gccb->gc_service = GDT_CACHESERVICE; 928 gccb->gc_flags = GDT_GCF_SCSI; 929 930 if (gdt->sc_cmd_cnt == 0) 931 gdt->sc_set_sema0(gdt); 932 splx(*lock); 933 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 934 gccb->gc_cmd_index); 935 cmdp = ccb->csio.cdb_io.cdb_bytes; 936 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ; 937 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE) 938 opcode = GDT_WRITE_THR; 939 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode); 940 941 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 942 ccb->ccb_h.target_id); 943 if (ccb->csio.cdb_len == 6) { 944 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp; 945 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff); 946 blockcnt = rw->length ? rw->length : 0x100; 947 } else { 948 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp; 949 blockno = scsi_4btoul(rw->addr); 950 blockcnt = scsi_2btoul(rw->length); 951 } 952 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 953 blockno); 954 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 955 blockcnt); 956 957 /* 958 * If we have any data to send with this command, 959 * map it into bus space. 960 */ 961 /* Only use S/G if there is a transfer */ 962 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 963 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) { 964 int s; 965 int error; 966 967 /* vorher unlock von splcam() ??? */ 968 s = splsoftvm(); 969 error = 970 bus_dmamap_load(gdt->sc_buffer_dmat, 971 gccb->gc_dmamap, 972 ccb->csio.data_ptr, 973 ccb->csio.dxfer_len, 974 gdtexecuteccb, 975 gccb, /*flags*/0); 976 if (error == EINPROGRESS) { 977 xpt_freeze_simq(sim, 1); 978 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 979 } 980 splx(s); 981 } else { 982 panic("iir: CAM_DATA_PHYS not supported"); 983 } 984 } else { 985 struct bus_dma_segment *segs; 986 987 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 988 panic("iir%d: iir_action - Physical " 989 "segment pointers unsupported", gdt->sc_hanum); 990 991 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0) 992 panic("iir%d: iir_action - Virtual " 993 "segment addresses unsupported", gdt->sc_hanum); 994 995 /* Just use the segments provided */ 996 segs = (struct bus_dma_segment *)ccb->csio.data_ptr; 997 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0); 998 } 999 1000 *lock = splcam(); 1001 return (gccb); 1002} 1003 1004static struct gdt_ccb * 1005gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd, int *lock) 1006{ 1007 struct gdt_ccb *gccb; 1008 u_int32_t cnt; 1009 1010 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd)); 1011 1012 gccb = gdt_get_ccb(gdt); 1013 if (gccb == NULL) { 1014 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n", 1015 gdt->sc_hanum)); 1016 return (gccb); 1017 } 1018 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1019 gccb->gc_ucmd = ucmd; 1020 gccb->gc_service = ucmd->service; 1021 gccb->gc_flags = GDT_GCF_IOCTL; 1022 1023 /* check DPMEM space, copy data buffer from user space */ 1024 if (ucmd->service == GDT_CACHESERVICE) { 1025 if (ucmd->OpCode == GDT_IOCTL) { 1026 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ, 1027 sizeof(u_int32_t)); 1028 cnt = ucmd->u.ioctl.param_size; 1029 if (cnt > GDT_SCRATCH_SZ) { 1030 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1031 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1032 gdt_free_ccb(gdt, gccb); 1033 return (NULL); 1034 } 1035 } else { 1036 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1037 GDT_SG_SZ, sizeof(u_int32_t)); 1038 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1039 if (cnt > GDT_SCRATCH_SZ) { 1040 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1041 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt); 1042 gdt_free_ccb(gdt, gccb); 1043 return (NULL); 1044 } 1045 } 1046 } else { 1047 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1048 GDT_SG_SZ, sizeof(u_int32_t)); 1049 cnt = ucmd->u.raw.sdlen; 1050 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) { 1051 printf("iir%d: Scratch buffer too small (%d/%d)\n", 1052 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len); 1053 gdt_free_ccb(gdt, gccb); 1054 return (NULL); 1055 } 1056 } 1057 if (cnt != 0) 1058 bcopy(ucmd->data, gccb->gc_scratch, cnt); 1059 1060 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET > 1061 gdt->sc_ic_all_size) { 1062 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n", 1063 gdt->sc_hanum)); 1064 gdt_free_ccb(gdt, gccb); 1065 return (NULL); 1066 } 1067 1068 if (gdt->sc_cmd_cnt == 0) 1069 gdt->sc_set_sema0(gdt); 1070 splx(*lock); 1071 1072 /* fill cmd structure */ 1073 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1074 gccb->gc_cmd_index); 1075 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, 1076 ucmd->OpCode); 1077 1078 if (ucmd->service == GDT_CACHESERVICE) { 1079 if (ucmd->OpCode == GDT_IOCTL) { 1080 /* IOCTL */ 1081 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE, 1082 ucmd->u.ioctl.param_size); 1083 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC, 1084 ucmd->u.ioctl.subfunc); 1085 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL, 1086 ucmd->u.ioctl.channel); 1087 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM, 1088 gccb->gc_scratch_busbase); 1089 } else { 1090 /* cache service command */ 1091 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO, 1092 ucmd->u.cache.DeviceNo); 1093 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO, 1094 ucmd->u.cache.BlockNo); 1095 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT, 1096 ucmd->u.cache.BlockCnt); 1097 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1098 0xffffffffUL); 1099 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1100 1); 1101 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1102 GDT_SG_PTR, gccb->gc_scratch_busbase); 1103 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1104 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE); 1105 } 1106 } else { 1107 /* raw service command */ 1108 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION, 1109 ucmd->u.raw.direction); 1110 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1111 0xffffffffUL); 1112 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN, 1113 ucmd->u.raw.sdlen); 1114 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN, 1115 ucmd->u.raw.clen); 1116 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD, 1117 12); 1118 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] = 1119 ucmd->u.raw.target; 1120 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] = 1121 ucmd->u.raw.lun; 1122 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] = 1123 ucmd->u.raw.bus; 1124 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN, 1125 ucmd->u.raw.sense_len); 1126 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA, 1127 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen); 1128 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1129 1); 1130 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1131 GDT_SG_PTR, gccb->gc_scratch_busbase); 1132 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1133 GDT_SG_LEN, ucmd->u.raw.sdlen); 1134 } 1135 1136 *lock = splcam(); 1137 gdt_stat.sg_count_act = 1; 1138 gdt->sc_copy_cmd(gdt, gccb); 1139 return (gccb); 1140} 1141 1142static void 1143gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb) 1144{ 1145 int t; 1146 1147 t = ccb->ccb_h.target_id; 1148 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n", 1149 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t)); 1150 1151 switch (ccb->csio.cdb_io.cdb_bytes[0]) { 1152 case TEST_UNIT_READY: 1153 case START_STOP: 1154 break; 1155 case REQUEST_SENSE: 1156 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n")); 1157 break; 1158 case INQUIRY: 1159 { 1160 struct scsi_inquiry_data inq; 1161 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len); 1162 1163 bzero(&inq, sizeof(inq)); 1164 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ? 1165 T_CDROM : T_DIRECT; 1166 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0; 1167 inq.version = SCSI_REV_2; 1168 inq.response_format = 2; 1169 inq.additional_length = 32; 1170 inq.flags = SID_CmdQue | SID_Sync; 1171 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor)); 1172 snprintf(inq.product, sizeof(inq.product), 1173 "Host Drive #%02d", t); 1174 strncpy(inq.revision, " ", sizeof(inq.revision)); 1175 bcopy(&inq, ccb->csio.data_ptr, copylen ); 1176 if( ccb->csio.dxfer_len > copylen ) 1177 bzero( ccb->csio.data_ptr+copylen, 1178 ccb->csio.dxfer_len - copylen ); 1179 break; 1180 } 1181 case MODE_SENSE_6: 1182 { 1183 struct mpd_data { 1184 struct scsi_mode_hdr_6 hd; 1185 struct scsi_mode_block_descr bd; 1186 struct scsi_control_page cp; 1187 } mpd; 1188 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len); 1189 u_int8_t page; 1190 1191 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/ 1192 bzero(&mpd, sizeof(mpd)); 1193 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) + 1194 sizeof(struct scsi_mode_block_descr); 1195 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0; 1196 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr); 1197 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16; 1198 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8; 1199 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff); 1200 1201 bcopy(&mpd, ccb->csio.data_ptr, copylen ); 1202 if( ccb->csio.dxfer_len > copylen ) 1203 bzero( ccb->csio.data_ptr+copylen, 1204 ccb->csio.dxfer_len - copylen ); 1205 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page; 1206 /* XXX: FlexeLint: why ?? */ 1207 switch (page) { 1208 default: 1209 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page)); 1210 break; 1211 } 1212 break; 1213 } 1214 case READ_CAPACITY: 1215 { 1216 struct scsi_read_capacity_data rcd; 1217 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len); 1218 1219 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/ 1220 bzero(&rcd, sizeof(rcd)); 1221 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr); 1222 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length); 1223 bcopy(&rcd, ccb->csio.data_ptr, copylen ); 1224 if( ccb->csio.dxfer_len > copylen ) 1225 bzero( ccb->csio.data_ptr+copylen, 1226 ccb->csio.dxfer_len - copylen ); 1227 break; 1228 } 1229 default: 1230 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n", 1231 ccb->csio.cdb_io.cdb_bytes[0])); 1232 break; 1233 } 1234 ccb->ccb_h.status |= CAM_REQ_CMP; 1235 --gdt_stat.io_count_act; 1236 xpt_done(ccb); 1237} 1238 1239static void 1240gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1241{ 1242 bus_addr_t *busaddrp; 1243 1244 busaddrp = (bus_addr_t *)arg; 1245 *busaddrp = dm_segs->ds_addr; 1246} 1247 1248static void 1249gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1250{ 1251 struct gdt_ccb *gccb; 1252 union ccb *ccb; 1253 struct gdt_softc *gdt; 1254 int i, lock; 1255 1256 lock = splcam(); 1257 1258 gccb = (struct gdt_ccb *)arg; 1259 ccb = gccb->gc_ccb; 1260 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr); 1261 1262 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n", 1263 gdt, gccb, dm_segs, nseg, error)); 1264 gdt_stat.sg_count_act = nseg; 1265 if (nseg > gdt_stat.sg_count_max) 1266 gdt_stat.sg_count_max = nseg; 1267 1268 /* Copy the segments into our SG list */ 1269 if (gccb->gc_service == GDT_CACHESERVICE) { 1270 for (i = 0; i < nseg; ++i) { 1271 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1272 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1273 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST + 1274 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1275 dm_segs++; 1276 } 1277 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ, 1278 nseg); 1279 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR, 1280 0xffffffffUL); 1281 1282 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST + 1283 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1284 } else { 1285 for (i = 0; i < nseg; ++i) { 1286 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1287 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr); 1288 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST + 1289 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len); 1290 dm_segs++; 1291 } 1292 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ, 1293 nseg); 1294 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA, 1295 0xffffffffUL); 1296 1297 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST + 1298 nseg * GDT_SG_SZ, sizeof(u_int32_t)); 1299 } 1300 1301 if (nseg != 0) { 1302 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1303 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1304 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1305 } 1306 1307 /* We must NOT abort the command here if CAM_REQ_INPROG is not set, 1308 * because command semaphore is already set! 1309 */ 1310 1311 ccb->ccb_h.status |= CAM_SIM_QUEUED; 1312 /* timeout handling */ 1313 ccb->ccb_h.timeout_ch = 1314 timeout(iir_timeout, (caddr_t)gccb, 1315 (ccb->ccb_h.timeout * hz) / 1000); 1316 1317 gdt->sc_copy_cmd(gdt, gccb); 1318 splx(lock); 1319} 1320 1321 1322static void 1323iir_action( struct cam_sim *sim, union ccb *ccb ) 1324{ 1325 struct gdt_softc *gdt; 1326 int lock, bus, target, lun; 1327 1328 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1329 ccb->ccb_h.ccb_sim_ptr = sim; 1330 bus = cam_sim_bus(sim); 1331 target = ccb->ccb_h.target_id; 1332 lun = ccb->ccb_h.target_lun; 1333 GDT_DPRINTF(GDT_D_CMD, 1334 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n", 1335 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0], 1336 bus, target, lun)); 1337 ++gdt_stat.io_count_act; 1338 if (gdt_stat.io_count_act > gdt_stat.io_count_max) 1339 gdt_stat.io_count_max = gdt_stat.io_count_act; 1340 1341 switch (ccb->ccb_h.func_code) { 1342 case XPT_SCSI_IO: 1343 lock = splcam(); 1344 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1345 ++gdt_stat.req_queue_act; 1346 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1347 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1348 splx(lock); 1349 gdt_next(gdt); 1350 break; 1351 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1352 case XPT_ABORT: /* Abort the specified CCB */ 1353 /* XXX Implement */ 1354 ccb->ccb_h.status = CAM_REQ_INVALID; 1355 --gdt_stat.io_count_act; 1356 xpt_done(ccb); 1357 break; 1358 case XPT_SET_TRAN_SETTINGS: 1359 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1360 --gdt_stat.io_count_act; 1361 xpt_done(ccb); 1362 break; 1363 case XPT_GET_TRAN_SETTINGS: 1364 /* Get default/user set transfer settings for the target */ 1365 { 1366 struct ccb_trans_settings *cts = &ccb->cts; 1367 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi; 1368 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi; 1369 1370 cts->protocol = PROTO_SCSI; 1371 cts->protocol_version = SCSI_REV_2; 1372 cts->transport = XPORT_SPI; 1373 cts->transport_version = 2; 1374 1375 if (cts->type == CTS_TYPE_USER_SETTINGS) { 1376 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1377 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1378 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 1379 spi->sync_period = 25; /* 10MHz */ 1380 if (spi->sync_period != 0) 1381 spi->sync_offset = 15; 1382 1383 spi->valid = CTS_SPI_VALID_SYNC_RATE 1384 | CTS_SPI_VALID_SYNC_OFFSET 1385 | CTS_SPI_VALID_BUS_WIDTH 1386 | CTS_SPI_VALID_DISC; 1387 scsi->valid = CTS_SCSI_VALID_TQ; 1388 ccb->ccb_h.status = CAM_REQ_CMP; 1389 } else { 1390 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1391 } 1392 --gdt_stat.io_count_act; 1393 xpt_done(ccb); 1394 break; 1395 } 1396 case XPT_CALC_GEOMETRY: 1397 { 1398 struct ccb_calc_geometry *ccg; 1399 u_int32_t secs_per_cylinder; 1400 1401 ccg = &ccb->ccg; 1402 ccg->heads = gdt->sc_hdr[target].hd_heads; 1403 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs; 1404 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1405 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1406 ccb->ccb_h.status = CAM_REQ_CMP; 1407 --gdt_stat.io_count_act; 1408 xpt_done(ccb); 1409 break; 1410 } 1411 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1412 { 1413 /* XXX Implement */ 1414 ccb->ccb_h.status = CAM_REQ_CMP; 1415 --gdt_stat.io_count_act; 1416 xpt_done(ccb); 1417 break; 1418 } 1419 case XPT_TERM_IO: /* Terminate the I/O process */ 1420 /* XXX Implement */ 1421 ccb->ccb_h.status = CAM_REQ_INVALID; 1422 --gdt_stat.io_count_act; 1423 xpt_done(ccb); 1424 break; 1425 case XPT_PATH_INQ: /* Path routing inquiry */ 1426 { 1427 struct ccb_pathinq *cpi = &ccb->cpi; 1428 1429 cpi->version_num = 1; 1430 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1431 cpi->hba_inquiry |= PI_WIDE_16; 1432 cpi->target_sprt = 1; 1433 cpi->hba_misc = 0; 1434 cpi->hba_eng_cnt = 0; 1435 if (bus == gdt->sc_virt_bus) 1436 cpi->max_target = GDT_MAX_HDRIVES - 1; 1437 else if (gdt->sc_class & GDT_FC) 1438 cpi->max_target = GDT_MAXID_FC - 1; 1439 else 1440 cpi->max_target = GDT_MAXID - 1; 1441 cpi->max_lun = 7; 1442 cpi->unit_number = cam_sim_unit(sim); 1443 cpi->bus_id = bus; 1444 cpi->initiator_id = 1445 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]); 1446 cpi->base_transfer_speed = 3300; 1447 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1448 if (gdt->sc_vendor == INTEL_VENDOR_ID) 1449 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN); 1450 else 1451 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN); 1452 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1453 cpi->transport = XPORT_SPI; 1454 cpi->transport_version = 2; 1455 cpi->protocol = PROTO_SCSI; 1456 cpi->protocol_version = SCSI_REV_2; 1457 cpi->ccb_h.status = CAM_REQ_CMP; 1458 --gdt_stat.io_count_act; 1459 xpt_done(ccb); 1460 break; 1461 } 1462 default: 1463 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n", 1464 gdt, ccb->ccb_h.func_code)); 1465 ccb->ccb_h.status = CAM_REQ_INVALID; 1466 --gdt_stat.io_count_act; 1467 xpt_done(ccb); 1468 break; 1469 } 1470} 1471 1472static void 1473iir_poll( struct cam_sim *sim ) 1474{ 1475 struct gdt_softc *gdt; 1476 1477 gdt = (struct gdt_softc *)cam_sim_softc( sim ); 1478 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt)); 1479 iir_intr(gdt); 1480} 1481 1482static void 1483iir_timeout(void *arg) 1484{ 1485 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb)); 1486} 1487 1488static void 1489iir_watchdog(void *arg) 1490{ 1491 struct gdt_softc *gdt; 1492 1493 gdt = (struct gdt_softc *)arg; 1494 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt)); 1495 1496 { 1497 int ccbs = 0, ucmds = 0, frees = 0, pends = 0; 1498 struct gdt_ccb *p; 1499 struct ccb_hdr *h; 1500 struct gdt_ucmd *u; 1501 1502 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL; 1503 h = TAILQ_NEXT(h, sim_links.tqe)) 1504 ccbs++; 1505 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL; 1506 u = TAILQ_NEXT(u, links)) 1507 ucmds++; 1508 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL; 1509 p = SLIST_NEXT(p, sle)) 1510 frees++; 1511 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL; 1512 p = SLIST_NEXT(p, sle)) 1513 pends++; 1514 1515 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n", 1516 ccbs, ucmds, frees, pends)); 1517 } 1518 1519 timeout(iir_watchdog, (caddr_t)gdt, hz * 15); 1520} 1521 1522static void 1523iir_shutdown( void *arg, int howto ) 1524{ 1525 struct gdt_softc *gdt; 1526 struct gdt_ccb *gccb; 1527 gdt_ucmd_t *ucmd; 1528 int lock, i; 1529 1530 gdt = (struct gdt_softc *)arg; 1531 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto)); 1532 1533 printf("iir%d: Flushing all Host Drives. Please wait ... ", 1534 gdt->sc_hanum); 1535 1536 /* allocate ucmd buffer */ 1537 ucmd = malloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_NOWAIT); 1538 if (ucmd == NULL) { 1539 printf("iir%d: iir_shutdown(): Cannot allocate resource\n", 1540 gdt->sc_hanum); 1541 return; 1542 } 1543 bzero(ucmd, sizeof(gdt_ucmd_t)); 1544 1545 /* wait for pending IOs */ 1546 lock = splcam(); 1547 gdt->sc_state = GDT_SHUTDOWN; 1548 splx(lock); 1549 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL) 1550 (void) tsleep((void *)gccb, PCATCH | PRIBIO, "iirshw", 100 * hz); 1551 1552 /* flush */ 1553 for (i = 0; i < GDT_MAX_HDRIVES; ++i) { 1554 if (gdt->sc_hdr[i].hd_present) { 1555 ucmd->service = GDT_CACHESERVICE; 1556 ucmd->OpCode = GDT_FLUSH; 1557 ucmd->u.cache.DeviceNo = i; 1558 lock = splcam(); 1559 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links); 1560 ucmd->complete_flag = FALSE; 1561 splx(lock); 1562 gdt_next(gdt); 1563 if (!ucmd->complete_flag) 1564 (void) tsleep((void *)ucmd, PCATCH|PRIBIO, "iirshw", 10*hz); 1565 } 1566 } 1567 1568 free(ucmd, M_DEVBUF); 1569 printf("Done.\n"); 1570} 1571 1572void 1573iir_intr(void *arg) 1574{ 1575 struct gdt_softc *gdt = arg; 1576 struct gdt_intr_ctx ctx; 1577 int lock = 0; 1578 struct gdt_ccb *gccb; 1579 gdt_ucmd_t *ucmd; 1580 u_int32_t cnt; 1581 1582 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt)); 1583 1584 /* If polling and we were not called from gdt_wait, just return */ 1585 if ((gdt->sc_state & GDT_POLLING) && 1586 !(gdt->sc_state & GDT_POLL_WAIT)) 1587 return; 1588 1589 if (!(gdt->sc_state & GDT_POLLING)) 1590 lock = splcam(); 1591 gdt_wait_index = 0; 1592 1593 ctx.istatus = gdt->sc_get_status(gdt); 1594 if (ctx.istatus == 0x00) { 1595 if (!(gdt->sc_state & GDT_POLLING)) 1596 splx(lock); 1597 gdt->sc_status = GDT_S_NO_STATUS; 1598 return; 1599 } 1600 1601 gdt->sc_intr(gdt, &ctx); 1602 1603 gdt->sc_status = ctx.cmd_status; 1604 gdt->sc_service = ctx.service; 1605 gdt->sc_info = ctx.info; 1606 gdt->sc_info2 = ctx.info2; 1607 1608 if (gdt->sc_state & GDT_POLL_WAIT) { 1609 gdt_wait_gdt = gdt; 1610 gdt_wait_index = ctx.istatus; 1611 } 1612 1613 if (ctx.istatus == GDT_ASYNCINDEX) { 1614 gdt_async_event(gdt, ctx.service); 1615 if (!(gdt->sc_state & GDT_POLLING)) 1616 splx(lock); 1617 return; 1618 } 1619 if (ctx.istatus == GDT_SPEZINDEX) { 1620 GDT_DPRINTF(GDT_D_INVALID, 1621 ("iir%d: Service unknown or not initialized!\n", 1622 gdt->sc_hanum)); 1623 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1624 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1625 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr); 1626 if (!(gdt->sc_state & GDT_POLLING)) 1627 splx(lock); 1628 return; 1629 } 1630 1631 gccb = &gdt->sc_gccbs[ctx.istatus - 2]; 1632 ctx.service = gccb->gc_service; 1633 1634 switch (gccb->gc_flags) { 1635 case GDT_GCF_UNUSED: 1636 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n", 1637 gdt->sc_hanum, ctx.istatus)); 1638 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver); 1639 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum; 1640 gdt->sc_dvr.eu.driver.index = ctx.istatus; 1641 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr); 1642 gdt_free_ccb(gdt, gccb); 1643 /* fallthrough */ 1644 1645 case GDT_GCF_INTERNAL: 1646 if (!(gdt->sc_state & GDT_POLLING)) 1647 splx(lock); 1648 break; 1649 1650 case GDT_GCF_IOCTL: 1651 ucmd = gccb->gc_ucmd; 1652 if (gdt->sc_status == GDT_S_BSY) { 1653 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n", 1654 gdt, gccb)); 1655 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links); 1656 if (!(gdt->sc_state & GDT_POLLING)) 1657 splx(lock); 1658 } else { 1659 ucmd->status = gdt->sc_status; 1660 ucmd->info = gdt->sc_info; 1661 ucmd->complete_flag = TRUE; 1662 if (ucmd->service == GDT_CACHESERVICE) { 1663 if (ucmd->OpCode == GDT_IOCTL) { 1664 cnt = ucmd->u.ioctl.param_size; 1665 if (cnt != 0) 1666 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1667 } else { 1668 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE; 1669 if (cnt != 0) 1670 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1671 } 1672 } else { 1673 cnt = ucmd->u.raw.sdlen; 1674 if (cnt != 0) 1675 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1676 if (ucmd->u.raw.sense_len != 0) 1677 bcopy(gccb->gc_scratch, ucmd->data, cnt); 1678 } 1679 gdt_free_ccb(gdt, gccb); 1680 if (!(gdt->sc_state & GDT_POLLING)) 1681 splx(lock); 1682 /* wakeup */ 1683 wakeup(ucmd); 1684 } 1685 gdt_next(gdt); 1686 break; 1687 1688 default: 1689 gdt_free_ccb(gdt, gccb); 1690 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb); 1691 if (!(gdt->sc_state & GDT_POLLING)) 1692 splx(lock); 1693 gdt_next(gdt); 1694 break; 1695 } 1696} 1697 1698int 1699gdt_async_event(struct gdt_softc *gdt, int service) 1700{ 1701 struct gdt_ccb *gccb; 1702 1703 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service)); 1704 1705 if (service == GDT_SCREENSERVICE) { 1706 if (gdt->sc_status == GDT_MSG_REQUEST) { 1707 while (gdt->sc_test_busy(gdt)) 1708 DELAY(1); 1709 gccb = gdt_get_ccb(gdt); 1710 if (gccb == NULL) { 1711 printf("iir%d: No free command index found\n", 1712 gdt->sc_hanum); 1713 return (1); 1714 } 1715 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1716 gccb->gc_service = service; 1717 gccb->gc_flags = GDT_GCF_SCREEN; 1718 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1719 gccb->gc_cmd_index); 1720 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1721 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1722 GDT_MSG_INV_HANDLE); 1723 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1724 gccb->gc_scratch_busbase); 1725 gdt->sc_set_sema0(gdt); 1726 gdt->sc_cmd_off = 0; 1727 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1728 sizeof(u_int32_t)); 1729 gdt->sc_cmd_cnt = 0; 1730 gdt->sc_copy_cmd(gdt, gccb); 1731 printf("iir%d: [PCI %d/%d] ", 1732 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot); 1733 gdt->sc_release_event(gdt); 1734 } 1735 1736 } else { 1737 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) { 1738 gdt->sc_dvr.size = 0; 1739 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1740 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1741 /* severity and event_string already set! */ 1742 } else { 1743 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async); 1744 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum; 1745 gdt->sc_dvr.eu.async.service = service; 1746 gdt->sc_dvr.eu.async.status = gdt->sc_status; 1747 gdt->sc_dvr.eu.async.info = gdt->sc_info; 1748 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2; 1749 } 1750 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr); 1751 printf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string); 1752 } 1753 1754 return (0); 1755} 1756 1757int 1758gdt_sync_event(struct gdt_softc *gdt, int service, 1759 u_int8_t index, struct gdt_ccb *gccb) 1760{ 1761 union ccb *ccb; 1762 1763 GDT_DPRINTF(GDT_D_INTR, 1764 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb)); 1765 1766 ccb = gccb->gc_ccb; 1767 1768 if (service == GDT_SCREENSERVICE) { 1769 u_int32_t msg_len; 1770 1771 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN); 1772 if (msg_len) 1773 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1774 gccb->gc_scratch[GDT_SCR_MSG_EXT])) { 1775 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0'; 1776 printf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]); 1777 } 1778 1779 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] && 1780 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) { 1781 while (gdt->sc_test_busy(gdt)) 1782 DELAY(1); 1783 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1784 gccb = gdt_get_ccb(gdt); 1785 if (gccb == NULL) { 1786 printf("iir%d: No free command index found\n", 1787 gdt->sc_hanum); 1788 return (1); 1789 } 1790 gccb->gc_service = service; 1791 gccb->gc_flags = GDT_GCF_SCREEN; 1792 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1793 gccb->gc_cmd_index); 1794 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ); 1795 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1796 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1797 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1798 gccb->gc_scratch_busbase); 1799 gdt->sc_set_sema0(gdt); 1800 gdt->sc_cmd_off = 0; 1801 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1802 sizeof(u_int32_t)); 1803 gdt->sc_cmd_cnt = 0; 1804 gdt->sc_copy_cmd(gdt, gccb); 1805 gdt->sc_release_event(gdt); 1806 return (0); 1807 } 1808 1809 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] && 1810 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) { 1811 /* default answers (getchar() not possible) */ 1812 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) { 1813 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0); 1814 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1); 1815 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0; 1816 } else { 1817 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 1818 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2); 1819 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2); 1820 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1; 1821 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0; 1822 } 1823 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0; 1824 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0; 1825 while (gdt->sc_test_busy(gdt)) 1826 DELAY(1); 1827 bzero(gccb->gc_cmd, GDT_CMD_SZ); 1828 gccb = gdt_get_ccb(gdt); 1829 if (gccb == NULL) { 1830 printf("iir%d: No free command index found\n", 1831 gdt->sc_hanum); 1832 return (1); 1833 } 1834 gccb->gc_service = service; 1835 gccb->gc_flags = GDT_GCF_SCREEN; 1836 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX, 1837 gccb->gc_cmd_index); 1838 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE); 1839 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE, 1840 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]); 1841 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR, 1842 gccb->gc_scratch_busbase); 1843 gdt->sc_set_sema0(gdt); 1844 gdt->sc_cmd_off = 0; 1845 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ, 1846 sizeof(u_int32_t)); 1847 gdt->sc_cmd_cnt = 0; 1848 gdt->sc_copy_cmd(gdt, gccb); 1849 gdt->sc_release_event(gdt); 1850 return (0); 1851 } 1852 printf("\n"); 1853 return (0); 1854 } else { 1855 untimeout(iir_timeout, gccb, ccb->ccb_h.timeout_ch); 1856 if (gdt->sc_status == GDT_S_BSY) { 1857 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n", 1858 gdt, gccb)); 1859 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe); 1860 ++gdt_stat.req_queue_act; 1861 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max) 1862 gdt_stat.req_queue_max = gdt_stat.req_queue_act; 1863 return (2); 1864 } 1865 1866 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap, 1867 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ? 1868 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1869 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap); 1870 1871 ccb->csio.resid = 0; 1872 if (gdt->sc_status == GDT_S_OK) { 1873 ccb->ccb_h.status |= CAM_REQ_CMP; 1874 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1875 } else { 1876 /* error */ 1877 if (gccb->gc_service == GDT_CACHESERVICE) { 1878 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; 1879 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1880 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1881 bzero(&ccb->csio.sense_data, ccb->csio.sense_len); 1882 ccb->csio.sense_data.error_code = 1883 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID; 1884 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY; 1885 1886 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync); 1887 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum; 1888 gdt->sc_dvr.eu.sync.service = service; 1889 gdt->sc_dvr.eu.sync.status = gdt->sc_status; 1890 gdt->sc_dvr.eu.sync.info = gdt->sc_info; 1891 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id; 1892 if (gdt->sc_status >= 0x8000) 1893 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr); 1894 else 1895 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr); 1896 } else { 1897 /* raw service */ 1898 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) { 1899 ccb->ccb_h.status = CAM_DEV_NOT_THERE; 1900 } else { 1901 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID; 1902 ccb->ccb_h.status &= ~CAM_SIM_QUEUED; 1903 ccb->csio.scsi_status = gdt->sc_info; 1904 bcopy(gccb->gc_scratch, &ccb->csio.sense_data, 1905 ccb->csio.sense_len); 1906 } 1907 } 1908 } 1909 --gdt_stat.io_count_act; 1910 xpt_done(ccb); 1911 } 1912 return (0); 1913} 1914 1915/* Controller event handling functions */ 1916gdt_evt_str *gdt_store_event(u_int16_t source, u_int16_t idx, 1917 gdt_evt_data *evt) 1918{ 1919 gdt_evt_str *e; 1920 struct timeval tv; 1921 1922 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx)); 1923 if (source == 0) /* no source -> no event */ 1924 return 0; 1925 1926 if (ebuffer[elastidx].event_source == source && 1927 ebuffer[elastidx].event_idx == idx && 1928 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && 1929 !memcmp((char *)&ebuffer[elastidx].event_data.eu, 1930 (char *)&evt->eu, evt->size)) || 1931 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && 1932 !strcmp((char *)&ebuffer[elastidx].event_data.event_string, 1933 (char *)&evt->event_string)))) { 1934 e = &ebuffer[elastidx]; 1935 getmicrotime(&tv); 1936 e->last_stamp = tv.tv_sec; 1937 ++e->same_count; 1938 } else { 1939 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ 1940 ++elastidx; 1941 if (elastidx == GDT_MAX_EVENTS) 1942 elastidx = 0; 1943 if (elastidx == eoldidx) { /* reached mark ? */ 1944 ++eoldidx; 1945 if (eoldidx == GDT_MAX_EVENTS) 1946 eoldidx = 0; 1947 } 1948 } 1949 e = &ebuffer[elastidx]; 1950 e->event_source = source; 1951 e->event_idx = idx; 1952 getmicrotime(&tv); 1953 e->first_stamp = e->last_stamp = tv.tv_sec; 1954 e->same_count = 1; 1955 e->event_data = *evt; 1956 e->application = 0; 1957 } 1958 return e; 1959} 1960 1961int gdt_read_event(int handle, gdt_evt_str *estr) 1962{ 1963 gdt_evt_str *e; 1964 int eindex, lock; 1965 1966 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle)); 1967 lock = splcam(); 1968 if (handle == -1) 1969 eindex = eoldidx; 1970 else 1971 eindex = handle; 1972 estr->event_source = 0; 1973 1974 if (eindex >= GDT_MAX_EVENTS) { 1975 splx(lock); 1976 return eindex; 1977 } 1978 e = &ebuffer[eindex]; 1979 if (e->event_source != 0) { 1980 if (eindex != elastidx) { 1981 if (++eindex == GDT_MAX_EVENTS) 1982 eindex = 0; 1983 } else { 1984 eindex = -1; 1985 } 1986 memcpy(estr, e, sizeof(gdt_evt_str)); 1987 } 1988 splx(lock); 1989 return eindex; 1990} 1991 1992void gdt_readapp_event(u_int8_t application, gdt_evt_str *estr) 1993{ 1994 gdt_evt_str *e; 1995 int found = FALSE; 1996 int eindex, lock; 1997 1998 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application)); 1999 lock = splcam(); 2000 eindex = eoldidx; 2001 for (;;) { 2002 e = &ebuffer[eindex]; 2003 if (e->event_source == 0) 2004 break; 2005 if ((e->application & application) == 0) { 2006 e->application |= application; 2007 found = TRUE; 2008 break; 2009 } 2010 if (eindex == elastidx) 2011 break; 2012 if (++eindex == GDT_MAX_EVENTS) 2013 eindex = 0; 2014 } 2015 if (found) 2016 memcpy(estr, e, sizeof(gdt_evt_str)); 2017 else 2018 estr->event_source = 0; 2019 splx(lock); 2020} 2021 2022void gdt_clear_events() 2023{ 2024 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n")); 2025 2026 eoldidx = elastidx = 0; 2027 ebuffer[0].event_source = 0; 2028} 2029