iiconf.h revision 289726
155714Skris/*-
2280304Sjkim * Copyright (c) 1998, 2001 Nicolas Souchu
3280304Sjkim * All rights reserved.
4160814Ssimon *
555714Skris * Redistribution and use in source and binary forms, with or without
655714Skris * modification, are permitted provided that the following conditions
7160814Ssimon * are met:
855714Skris * 1. Redistributions of source code must retain the above copyright
955714Skris *    notice, this list of conditions and the following disclaimer.
1055714Skris * 2. Redistributions in binary form must reproduce the above copyright
1155714Skris *    notice, this list of conditions and the following disclaimer in the
1255714Skris *    documentation and/or other materials provided with the distribution.
1355714Skris *
14280304Sjkim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1555714Skris * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1655714Skris * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1755714Skris * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1855714Skris * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
1955714Skris * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2055714Skris * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2155714Skris * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2255714Skris * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2355714Skris * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2455714Skris * SUCH DAMAGE.
2555714Skris *
2655714Skris * $FreeBSD: head/sys/dev/iicbus/iiconf.h 289726 2015-10-22 00:54:59Z ian $
2755714Skris */
2855714Skris#ifndef __IICONF_H
2955714Skris#define __IICONF_H
3055714Skris
3155714Skris#include <sys/queue.h>
3255714Skris#include <dev/iicbus/iic.h>
3355714Skris
3455714Skris
3555714Skris#define IICPRI (PZERO+8)		/* XXX sleep/wakeup queue priority */
3655714Skris
3755714Skris#define LSB 0x1
3855714Skris
3955714Skris/*
4055714Skris * How tsleep() is called in iic_request_bus().
4155714Skris */
4255714Skris#define IIC_DONTWAIT	0
4355714Skris#define IIC_NOINTR	0
4455714Skris#define IIC_WAIT	0x1
4555714Skris#define IIC_INTR	0x2
4655714Skris#define IIC_INTRWAIT	(IIC_INTR | IIC_WAIT)
4755714Skris
4855714Skris/*
4955714Skris * i2c modes
5055714Skris */
5155714Skris#define IIC_MASTER	0x1
5255714Skris#define IIC_SLAVE	0x2
5355714Skris#define IIC_POLLED	0x4
5455714Skris
5555714Skris/*
5655714Skris * i2c speed
5755714Skris */
5855714Skris#define IIC_UNKNOWN	0x0
5955714Skris#define IIC_SLOW	0x1
6055714Skris#define IIC_FAST	0x2
6155714Skris#define IIC_FASTEST	0x3
6255714Skris
6355714Skris#define IIC_LAST_READ	0x1
6455714Skris
65280304Sjkim/*
66280304Sjkim * callback index
67280304Sjkim */
68280304Sjkim#define IIC_REQUEST_BUS	0x1
69280304Sjkim#define IIC_RELEASE_BUS	0x2
70280304Sjkim
71109998Smarkm/*
72109998Smarkm * interrupt events
73160814Ssimon */
74160814Ssimon#define INTR_GENERAL	0x1	/* general call received */
75160814Ssimon#define INTR_START	0x2	/* the I2C interface is addressed */
76167612Ssimon#define INTR_STOP	0x3	/* stop condition received */
77280304Sjkim#define INTR_RECEIVE	0x4	/* character received */
78280304Sjkim#define INTR_TRANSMIT	0x5	/* character to transmit */
79280304Sjkim#define INTR_ERROR	0x6	/* error */
80280304Sjkim#define INTR_NOACK	0x7	/* no ack from master receiver */
81280304Sjkim
82280304Sjkim/*
83109998Smarkm * adapter layer errors
84280304Sjkim */
85280304Sjkim#define IIC_NOERR	0x0	/* no error occured */
86280304Sjkim#define IIC_EBUSERR	0x1	/* bus error (hardware not in expected state) */
87280304Sjkim#define IIC_ENOACK	0x2	/* ack not received until timeout */
88280304Sjkim#define IIC_ETIMEOUT	0x3	/* timeout */
89280304Sjkim#define IIC_EBUSBSY	0x4	/* bus busy (reserved by another client) */
90238405Sjkim#define IIC_ESTATUS	0x5	/* status error */
91280304Sjkim#define IIC_EUNDERFLOW	0x6	/* slave ready for more data */
92280304Sjkim#define IIC_EOVERFLOW	0x7	/* too much data */
93280304Sjkim#define IIC_ENOTSUPP	0x8	/* request not supported */
94280304Sjkim#define IIC_ENOADDR	0x9	/* no address assigned to the interface */
95280304Sjkim#define IIC_ERESOURCE	0xa	/* resources (memory, whatever) unavailable */
9655714Skris
9755714Skris/*
9855714Skris * Note that all iicbus functions return IIC_Exxxxx status values,
99280304Sjkim * except iic2errno() (obviously) and iicbus_started() (returns bool).
100280304Sjkim */
10155714Skrisextern int iic2errno(int);
102280304Sjkimextern int iicbus_request_bus(device_t, device_t, int);
103280304Sjkimextern int iicbus_release_bus(device_t, device_t);
104280304Sjkimextern device_t iicbus_alloc_bus(device_t);
105280304Sjkim
106280304Sjkimextern void iicbus_intr(device_t, int, char *);
107280304Sjkim
108280304Sjkimextern int iicbus_null_repeated_start(device_t, u_char);
109280304Sjkimextern int iicbus_null_callback(device_t, int, caddr_t);
110280304Sjkim
11155714Skris#define iicbus_reset(bus,speed,addr,oldaddr) \
11255714Skris	(IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
11355714Skris
114280304Sjkim/* basic I2C operations */
115280304Sjkimextern int iicbus_started(device_t);
11655714Skrisextern int iicbus_start(device_t, u_char, int);
117280304Sjkimextern int iicbus_stop(device_t);
118280304Sjkimextern int iicbus_repeated_start(device_t, u_char, int);
119280304Sjkimextern int iicbus_write(device_t, const char *, int, int *, int);
120280304Sjkimextern int iicbus_read(device_t, char *, int, int *, int, int);
121280304Sjkim
122280304Sjkim/* single byte read/write functions, start/stop not managed */
123280304Sjkimextern int iicbus_write_byte(device_t, char, int);
12455714Skrisextern int iicbus_read_byte(device_t, char *, int);
125280304Sjkim
126280304Sjkim/* Read/write operations with start/stop conditions managed */
127280304Sjkimextern int iicbus_block_write(device_t, u_char, char *, int, int *);
12855714Skrisextern int iicbus_block_read(device_t, u_char, char *, int, int *);
129280304Sjkim
130280304Sjkim/* vectors of iic operations to pass to bridge */
131280304Sjkimint iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
13255714Skrisint iicbus_transfer_excl(device_t bus, struct iic_msg *msgs, uint32_t nmsgs,
133280304Sjkim    int how);
134280304Sjkimint iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
135280304Sjkim
13655714Skris#define IICBUS_MODVER	1
137280304Sjkim#define IICBUS_MINVER	1
138280304Sjkim#define IICBUS_MAXVER	1
139280304Sjkim#define IICBUS_PREFVER	IICBUS_MODVER
14055714Skris
141280304Sjkimextern driver_t iicbb_driver;
142280304Sjkimextern devclass_t iicbb_devclass;
143280304Sjkim
14455714Skris#define IICBB_MODVER	1
145280304Sjkim#define IICBB_MINVER	1
146280304Sjkim#define IICBB_MAXVER	1
147280304Sjkim#define IICBB_PREFVER	IICBB_MODVER
148280304Sjkim
14955714Skris#endif
150280304Sjkim