ichsmb_reg.h revision 66703
166703Sarchie 266703Sarchie/* 366703Sarchie * ichsmb_reg.h 466703Sarchie * 566703Sarchie * Copyright (c) 2000 Whistle Communications, Inc. 666703Sarchie * All rights reserved. 766703Sarchie * 866703Sarchie * Subject to the following obligations and disclaimer of warranty, use and 966703Sarchie * redistribution of this software, in source or object code forms, with or 1066703Sarchie * without modifications are expressly permitted by Whistle Communications; 1166703Sarchie * provided, however, that: 1266703Sarchie * 1. Any and all reproductions of the source or object code must include the 1366703Sarchie * copyright notice above and the following disclaimer of warranties; and 1466703Sarchie * 2. No rights are granted, in any manner or form, to use Whistle 1566703Sarchie * Communications, Inc. trademarks, including the mark "WHISTLE 1666703Sarchie * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 1766703Sarchie * such appears in the above copyright notice or in the software. 1866703Sarchie * 1966703Sarchie * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 2066703Sarchie * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 2166703Sarchie * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 2266703Sarchie * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 2366703Sarchie * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 2466703Sarchie * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 2566703Sarchie * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 2666703Sarchie * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 2766703Sarchie * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 2866703Sarchie * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 2966703Sarchie * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 3066703Sarchie * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 3166703Sarchie * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 3266703Sarchie * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3366703Sarchie * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 3466703Sarchie * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 3566703Sarchie * OF SUCH DAMAGE. 3666703Sarchie * 3766703Sarchie * Author: Archie Cobbs <archie@freebsd.org> 3866703Sarchie * 3966703Sarchie * $FreeBSD: head/sys/dev/ichsmb/ichsmb_reg.h 66703 2000-10-06 00:09:46Z archie $ 4066703Sarchie */ 4166703Sarchie 4266703Sarchie#ifndef _DEV_ICHSMB_ICHSMB_REG_H_ 4366703Sarchie#define _DEV_ICHSMB_ICHSMB_REG_H_ 4466703Sarchie 4566703Sarchie/* 4666703Sarchie * Definitions for the SMBus controller logical device which is part of the 4766703Sarchie * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips. 4866703Sarchie */ 4966703Sarchie 5066703Sarchie/* 5166703Sarchie * PCI configuration registers 5266703Sarchie */ 5366703Sarchie#define ICH_SMB_BASE 0x20 /* base address register */ 5466703Sarchie#define ICH_HOSTC 0x40 /* host config register */ 5566703Sarchie#define ICH_HOSTC_I2C_EN 0x04 /* enable i2c mode */ 5666703Sarchie#define ICH_HOSTC_SMB_SMI_EN 0x02 /* SMI# instead of irq */ 5766703Sarchie#define ICH_HOSTC_HST_EN 0x01 /* enable host cntrlr */ 5866703Sarchie 5966703Sarchie/* 6066703Sarchie * I/O registers 6166703Sarchie */ 6266703Sarchie#define ICH_HST_STA 0x00 /* host status */ 6366703Sarchie#define ICH_HST_STA_BYTE_DONE_STS 0x80 /* byte send/rec'd */ 6466703Sarchie#define ICH_HST_STA_INUSE_STS 0x40 /* device access mutex */ 6566703Sarchie#define ICH_HST_STA_SMBALERT_STS 0x20 /* SMBALERT# signal */ 6666703Sarchie#define ICH_HST_STA_FAILED 0x10 /* failed bus transaction */ 6766703Sarchie#define ICH_HST_STA_BUS_ERR 0x08 /* transaction collision */ 6866703Sarchie#define ICH_HST_STA_DEV_ERR 0x04 /* misc. smb device error */ 6966703Sarchie#define ICH_HST_STA_INTR 0x02 /* command completed ok */ 7066703Sarchie#define ICH_HST_STA_HOST_BUSY 0x01 /* command is running */ 7166703Sarchie#define ICH_HST_CNT 0x02 /* host control */ 7266703Sarchie#define ICH_HST_CNT_START 0x40 /* start command */ 7366703Sarchie#define ICH_HST_CNT_LAST_BYTE 0x20 /* indicate last byte */ 7466703Sarchie#define ICH_HST_CNT_SMB_CMD_QUICK 0x00 /* command: quick */ 7566703Sarchie#define ICH_HST_CNT_SMB_CMD_BYTE 0x04 /* command: byte */ 7666703Sarchie#define ICH_HST_CNT_SMB_CMD_BYTE_DATA 0x08 /* command: byte data */ 7766703Sarchie#define ICH_HST_CNT_SMB_CMD_WORD_DATA 0x0c /* command: word data */ 7866703Sarchie#define ICH_HST_CNT_SMB_CMD_PROC_CALL 0x10 /* command: process call */ 7966703Sarchie#define ICH_HST_CNT_SMB_CMD_BLOCK 0x14 /* command: block */ 8066703Sarchie#define ICH_HST_CNT_SMB_CMD_I2C_READ 0x18 /* command: i2c read */ 8166703Sarchie#define ICH_HST_CNT_KILL 0x02 /* kill current transaction */ 8266703Sarchie#define ICH_HST_CNT_INTREN 0x01 /* enable interrupt */ 8366703Sarchie#define ICH_HST_CMD 0x03 /* host command */ 8466703Sarchie#define ICH_XMIT_SLVA 0x04 /* transmit slave address */ 8566703Sarchie#define ICH_XMIT_SLVA_READ 0x01 /* direction: read */ 8666703Sarchie#define ICH_XMIT_SLVA_WRITE 0x00 /* direction: write */ 8766703Sarchie#define ICH_D0 0x05 /* host data 0 */ 8866703Sarchie#define ICH_D1 0x06 /* host data 1 */ 8966703Sarchie#define ICH_BLOCK_DB 0x07 /* block data byte */ 9066703Sarchie 9166703Sarchie#endif /* _DEV_ICHSMB_ICHSMB_REG_H_ */ 9266703Sarchie 93