ichsmb_pci.c revision 302408
1/*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * 9 * Subject to the following obligations and disclaimer of warranty, use and 10 * redistribution of this software, in source or object code forms, with or 11 * without modifications are expressly permitted by Whistle Communications; 12 * provided, however, that: 13 * 1. Any and all reproductions of the source or object code must include the 14 * copyright notice above and the following disclaimer of warranties; and 15 * 2. No rights are granted, in any manner or form, to use Whistle 16 * Communications, Inc. trademarks, including the mark "WHISTLE 17 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 18 * such appears in the above copyright notice or in the software. 19 * 20 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 21 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 22 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 23 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 25 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 26 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 27 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 28 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 29 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 30 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 31 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__FBSDID("$FreeBSD: stable/11/sys/dev/ichsmb/ichsmb_pci.c 296137 2016-02-27 03:38:01Z jhibbits $"); 41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/errno.h> 52#include <sys/lock.h> 53#include <sys/mutex.h> 54#include <sys/syslog.h> 55#include <sys/bus.h> 56 57#include <machine/bus.h> 58#include <sys/rman.h> 59#include <machine/resource.h> 60 61#include <dev/pci/pcivar.h> 62#include <dev/pci/pcireg.h> 63 64#include <dev/smbus/smbconf.h> 65 66#include <dev/ichsmb/ichsmb_var.h> 67#include <dev/ichsmb/ichsmb_reg.h> 68 69/* PCI unique identifiers */ 70#define ID_82801AA 0x24138086 71#define ID_82801AB 0x24238086 72#define ID_82801BA 0x24438086 73#define ID_82801CA 0x24838086 74#define ID_82801DC 0x24C38086 75#define ID_82801EB 0x24D38086 76#define ID_82801FB 0x266A8086 77#define ID_82801GB 0x27da8086 78#define ID_82801H 0x283e8086 79#define ID_82801I 0x29308086 80#define ID_82801JI 0x3a308086 81#define ID_PCH 0x3b308086 82#define ID_6300ESB 0x25a48086 83#define ID_631xESB 0x269b8086 84#define ID_DH89XXCC 0x23308086 85#define ID_PATSBURG 0x1d228086 86#define ID_CPT 0x1c228086 87#define ID_PPT 0x1e228086 88#define ID_AVOTON 0x1f3c8086 89#define ID_COLETOCRK 0x23B08086 90#define ID_LPT 0x8c228086 91#define ID_LPTLP 0x9c228086 92#define ID_WCPT 0x8ca28086 93#define ID_WCPTLP 0x9ca28086 94#define ID_WELLSBURG 0x8d228086 95#define ID_SRPT 0xa1238086 96 97#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 98 99/* Internal functions */ 100static int ichsmb_pci_probe(device_t dev); 101static int ichsmb_pci_attach(device_t dev); 102/*Use generic one for now*/ 103#if 0 104static int ichsmb_pci_detach(device_t dev); 105#endif 106 107/* Device methods */ 108static device_method_t ichsmb_pci_methods[] = { 109 /* Device interface */ 110 DEVMETHOD(device_probe, ichsmb_pci_probe), 111 DEVMETHOD(device_attach, ichsmb_pci_attach), 112 DEVMETHOD(device_detach, ichsmb_detach), 113 114 /* SMBus methods */ 115 DEVMETHOD(smbus_callback, ichsmb_callback), 116 DEVMETHOD(smbus_quick, ichsmb_quick), 117 DEVMETHOD(smbus_sendb, ichsmb_sendb), 118 DEVMETHOD(smbus_recvb, ichsmb_recvb), 119 DEVMETHOD(smbus_writeb, ichsmb_writeb), 120 DEVMETHOD(smbus_writew, ichsmb_writew), 121 DEVMETHOD(smbus_readb, ichsmb_readb), 122 DEVMETHOD(smbus_readw, ichsmb_readw), 123 DEVMETHOD(smbus_pcall, ichsmb_pcall), 124 DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 125 DEVMETHOD(smbus_bread, ichsmb_bread), 126 127 DEVMETHOD_END 128}; 129 130static driver_t ichsmb_pci_driver = { 131 "ichsmb", 132 ichsmb_pci_methods, 133 sizeof(struct ichsmb_softc) 134}; 135 136static devclass_t ichsmb_pci_devclass; 137 138DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 139 140static int 141ichsmb_pci_probe(device_t dev) 142{ 143 /* Check PCI identifier */ 144 switch (pci_get_devid(dev)) { 145 case ID_82801AA: 146 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 147 break; 148 case ID_82801AB: 149 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 150 break; 151 case ID_82801BA: 152 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 153 break; 154 case ID_82801CA: 155 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 156 break; 157 case ID_82801DC: 158 device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 159 break; 160 case ID_82801EB: 161 device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller"); 162 break; 163 case ID_82801FB: 164 device_set_desc(dev, "Intel 82801FB (ICH6) SMBus controller"); 165 break; 166 case ID_82801GB: 167 device_set_desc(dev, "Intel 82801GB (ICH7) SMBus controller"); 168 break; 169 case ID_82801H: 170 device_set_desc(dev, "Intel 82801H (ICH8) SMBus controller"); 171 break; 172 case ID_82801I: 173 device_set_desc(dev, "Intel 82801I (ICH9) SMBus controller"); 174 break; 175 case ID_82801JI: 176 device_set_desc(dev, "Intel 82801JI (ICH10) SMBus controller"); 177 break; 178 case ID_PCH: 179 device_set_desc(dev, "Intel PCH SMBus controller"); 180 break; 181 case ID_6300ESB: 182 device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller"); 183 break; 184 case ID_631xESB: 185 device_set_desc(dev, "Intel 631xESB/6321ESB (ESB2) SMBus controller"); 186 break; 187 case ID_DH89XXCC: 188 device_set_desc(dev, "Intel DH89xxCC SMBus controller"); 189 break; 190 case ID_PATSBURG: 191 device_set_desc(dev, "Intel Patsburg SMBus controller"); 192 break; 193 case ID_CPT: 194 device_set_desc(dev, "Intel Cougar Point SMBus controller"); 195 break; 196 case ID_PPT: 197 device_set_desc(dev, "Intel Panther Point SMBus controller"); 198 break; 199 case ID_AVOTON: 200 device_set_desc(dev, "Intel Avoton SMBus controller"); 201 break; 202 case ID_LPT: 203 device_set_desc(dev, "Intel Lynx Point SMBus controller"); 204 break; 205 case ID_LPTLP: 206 device_set_desc(dev, "Intel Lynx Point-LP SMBus controller"); 207 break; 208 case ID_WCPT: 209 device_set_desc(dev, "Intel Wildcat Point SMBus controller"); 210 break; 211 case ID_WCPTLP: 212 device_set_desc(dev, "Intel Wildcat Point-LP SMBus controller"); 213 break; 214 case ID_COLETOCRK: 215 device_set_desc(dev, "Intel Coleto Creek SMBus controller"); 216 break; 217 case ID_WELLSBURG: 218 device_set_desc(dev, "Intel Wellsburg SMBus controller"); 219 break; 220 case ID_SRPT: 221 device_set_desc(dev, "Intel Sunrise Point-H SMBus controller"); 222 break; 223 default: 224 return (ENXIO); 225 } 226 227 /* Done */ 228 return (ichsmb_probe(dev)); 229} 230 231static int 232ichsmb_pci_attach(device_t dev) 233{ 234 const sc_p sc = device_get_softc(dev); 235 int error; 236 237 /* Initialize private state */ 238 bzero(sc, sizeof(*sc)); 239 sc->ich_cmd = -1; 240 sc->dev = dev; 241 242 /* Allocate an I/O range */ 243 sc->io_rid = ICH_SMB_BASE; 244 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, 245 &sc->io_rid, 16, RF_ACTIVE); 246 if (sc->io_res == NULL) 247 sc->io_res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, 248 &sc->io_rid, 32, RF_ACTIVE); 249 if (sc->io_res == NULL) { 250 device_printf(dev, "can't map I/O\n"); 251 error = ENXIO; 252 goto fail; 253 } 254 255 /* Allocate interrupt */ 256 sc->irq_rid = 0; 257 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 258 &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE); 259 if (sc->irq_res == NULL) { 260 device_printf(dev, "can't get IRQ\n"); 261 error = ENXIO; 262 goto fail; 263 } 264 265 /* Enable device */ 266 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 267 268 /* Done */ 269 error = ichsmb_attach(dev); 270 if (error) 271 goto fail; 272 return (0); 273 274fail: 275 /* Attach failed, release resources */ 276 ichsmb_release_resources(sc); 277 return (error); 278} 279 280 281MODULE_DEPEND(ichsmb, pci, 1, 1, 1); 282MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER); 283MODULE_VERSION(ichsmb, 1); 284