ichsmb_pci.c revision 127135
1/*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * 9 * Subject to the following obligations and disclaimer of warranty, use and 10 * redistribution of this software, in source or object code forms, with or 11 * without modifications are expressly permitted by Whistle Communications; 12 * provided, however, that: 13 * 1. Any and all reproductions of the source or object code must include the 14 * copyright notice above and the following disclaimer of warranties; and 15 * 2. No rights are granted, in any manner or form, to use Whistle 16 * Communications, Inc. trademarks, including the mark "WHISTLE 17 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 18 * such appears in the above copyright notice or in the software. 19 * 20 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 21 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 22 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 23 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 25 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 26 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 27 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 28 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 29 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 30 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 31 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb_pci.c 127135 2004-03-17 17:50:55Z njl $"); 41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/kernel.h> 50#include <sys/errno.h> 51#include <sys/lock.h> 52#include <sys/mutex.h> 53#include <sys/syslog.h> 54#include <sys/bus.h> 55 56#include <machine/bus.h> 57#include <sys/rman.h> 58#include <machine/resource.h> 59 60#include <dev/pci/pcivar.h> 61#include <dev/pci/pcireg.h> 62 63#include <dev/smbus/smbconf.h> 64 65#include <dev/ichsmb/ichsmb_var.h> 66#include <dev/ichsmb/ichsmb_reg.h> 67 68/* PCI unique identifiers */ 69#define ID_82801AA 0x24138086 70#define ID_82801AB 0x24238086 71#define ID_82801BA 0x24438086 72#define ID_82801CA 0x24838086 73#define ID_82801DC 0x24C38086 74#define ID_82801EB 0x24D38086 75 76#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 77 78/* Internal functions */ 79static int ichsmb_pci_probe(device_t dev); 80static int ichsmb_pci_attach(device_t dev); 81 82/* Device methods */ 83static device_method_t ichsmb_pci_methods[] = { 84 /* Device interface */ 85 DEVMETHOD(device_probe, ichsmb_pci_probe), 86 DEVMETHOD(device_attach, ichsmb_pci_attach), 87 88 /* Bus methods */ 89 DEVMETHOD(bus_print_child, bus_generic_print_child), 90 91 /* SMBus methods */ 92 DEVMETHOD(smbus_callback, ichsmb_callback), 93 DEVMETHOD(smbus_quick, ichsmb_quick), 94 DEVMETHOD(smbus_sendb, ichsmb_sendb), 95 DEVMETHOD(smbus_recvb, ichsmb_recvb), 96 DEVMETHOD(smbus_writeb, ichsmb_writeb), 97 DEVMETHOD(smbus_writew, ichsmb_writew), 98 DEVMETHOD(smbus_readb, ichsmb_readb), 99 DEVMETHOD(smbus_readw, ichsmb_readw), 100 DEVMETHOD(smbus_pcall, ichsmb_pcall), 101 DEVMETHOD(smbus_bwrite, ichsmb_bwrite), 102 DEVMETHOD(smbus_bread, ichsmb_bread), 103 { 0, 0 } 104}; 105 106static driver_t ichsmb_pci_driver = { 107 "ichsmb", 108 ichsmb_pci_methods, 109 sizeof(struct ichsmb_softc) 110}; 111 112static devclass_t ichsmb_pci_devclass; 113 114DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0); 115 116static int 117ichsmb_pci_probe(device_t dev) 118{ 119 /* Check PCI identifier */ 120 switch (pci_get_devid(dev)) { 121 case ID_82801AA: 122 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller"); 123 break; 124 case ID_82801AB: 125 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller"); 126 break; 127 case ID_82801BA: 128 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller"); 129 break; 130 case ID_82801CA: 131 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller"); 132 break; 133 case ID_82801DC: 134 device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller"); 135 break; 136 case ID_82801EB: 137 device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller"); 138 break; 139 default: 140 if (pci_get_class(dev) == PCIC_SERIALBUS 141 && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS 142 && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) { 143 device_set_desc(dev, "SMBus controller"); 144 return (-2); /* XXX */ 145 } 146 return (ENXIO); 147 } 148 149 /* Done */ 150 return (ichsmb_probe(dev)); 151} 152 153static int 154ichsmb_pci_attach(device_t dev) 155{ 156 const sc_p sc = device_get_softc(dev); 157 u_int32_t cmd; 158 int error; 159 160 /* Initialize private state */ 161 bzero(sc, sizeof(*sc)); 162 sc->ich_cmd = -1; 163 sc->dev = dev; 164 165 /* Allocate an I/O range */ 166 sc->io_rid = ICH_SMB_BASE; 167 sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 168 &sc->io_rid, 0, ~0, 16, RF_ACTIVE); 169 if (sc->io_res == NULL) { 170 log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev)); 171 error = ENXIO; 172 goto fail; 173 } 174 sc->io_bst = rman_get_bustag(sc->io_res); 175 sc->io_bsh = rman_get_bushandle(sc->io_res); 176 177 /* Allocate interrupt */ 178 sc->irq_rid = 0; 179 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 180 &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE); 181 if (sc->irq_res == NULL) { 182 log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev)); 183 error = ENXIO; 184 goto fail; 185 } 186 187 /* Set up interrupt handler */ 188 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC, 189 ichsmb_device_intr, sc, &sc->irq_handle); 190 if (error != 0) { 191 log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev)); 192 goto fail; 193 } 194 195 /* Enable I/O mapping */ 196 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 197 cmd |= PCIM_CMD_PORTEN; 198 pci_write_config(dev, PCIR_COMMAND, cmd, 4); 199 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 200 if ((cmd & PCIM_CMD_PORTEN) == 0) { 201 log(LOG_ERR, "%s: can't enable memory map\n", 202 device_get_nameunit(dev)); 203 error = ENXIO; 204 goto fail; 205 } 206 207 /* Enable device */ 208 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1); 209 210 /* Done */ 211 return (ichsmb_attach(dev)); 212 213fail: 214 /* Attach failed, release resources */ 215 ichsmb_release_resources(sc); 216 return (error); 217} 218 219