hptrr_os_bsd.c revision 296135
1185377Ssam/* 2185377Ssam * Copyright (c) HighPoint Technologies, Inc. 3185377Ssam * All rights reserved. 4185377Ssam * 5185377Ssam * Redistribution and use in source and binary forms, with or without 6185377Ssam * modification, are permitted provided that the following conditions 7185377Ssam * are met: 8185377Ssam * 1. Redistributions of source code must retain the above copyright 9185377Ssam * notice, this list of conditions and the following disclaimer. 10185377Ssam * 2. Redistributions in binary form must reproduce the above copyright 11185377Ssam * notice, this list of conditions and the following disclaimer in the 12185377Ssam * documentation and/or other materials provided with the distribution. 13185377Ssam * 14185377Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15185377Ssam * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16185377Ssam * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17185377Ssam * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18185377Ssam * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19185377Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20185377Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21185377Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22185377Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23185377Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24185377Ssam * SUCH DAMAGE. 25185377Ssam * 26185377Ssam * $FreeBSD: head/sys/dev/hptrr/hptrr_os_bsd.c 296135 2016-02-27 03:34:01Z jhibbits $ 27185377Ssam */ 28185377Ssam#include <dev/hptrr/hptrr_config.h> 29185377Ssam/* $Id: os_bsd.c,v 1.11 2005/06/03 14:06:38 kdh Exp $ 30185377Ssam * 31185377Ssam * HighPoint RAID Driver for FreeBSD 32185377Ssam * Copyright (C) 2005 HighPoint Technologies, Inc. All Rights Reserved. 33185377Ssam */ 34185377Ssam 35185377Ssam#include <dev/hptrr/os_bsd.h> 36185377Ssam 37185377Ssam/* hardware access */ 38185377SsamHPT_U8 os_inb (void *port) { return inb((unsigned)(HPT_UPTR)port); } 39185377SsamHPT_U16 os_inw (void *port) { return inw((unsigned)(HPT_UPTR)port); } 40185377SsamHPT_U32 os_inl (void *port) { return inl((unsigned)(HPT_UPTR)port); } 41185377Ssam 42185377Ssamvoid os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); } 43185377Ssamvoid os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); } 44185377Ssamvoid os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); } 45185377Ssam 46185377Ssamvoid os_insw (void *port, HPT_U16 *buffer, HPT_U32 count) 47185377Ssam{ insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 48185377Ssam 49185377Ssamvoid os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count) 50185377Ssam{ outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 51185377Ssam 52185377SsamHPT_U32 __dummy_reg = 0; 53185377Ssam 54185377Ssam/* PCI configuration space */ 55185377SsamHPT_U8 os_pci_readb (void *osext, HPT_U8 offset) 56185377Ssam{ 57185377Ssam return pci_read_config(((PHBA)osext)->pcidev, offset, 1); 58185377Ssam} 59185377Ssam 60185377SsamHPT_U16 os_pci_readw (void *osext, HPT_U8 offset) 61185377Ssam{ 62185377Ssam return pci_read_config(((PHBA)osext)->pcidev, offset, 2); 63185377Ssam} 64185377Ssam 65185377SsamHPT_U32 os_pci_readl (void *osext, HPT_U8 offset) 66185377Ssam{ 67185377Ssam return pci_read_config(((PHBA)osext)->pcidev, offset, 4); 68185377Ssam} 69185377Ssam 70185377Ssamvoid os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value) 71185377Ssam{ 72185377Ssam pci_write_config(((PHBA)osext)->pcidev, offset, value, 1); 73185377Ssam} 74185377Ssam 75185377Ssamvoid os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value) 76185377Ssam{ 77185377Ssam pci_write_config(((PHBA)osext)->pcidev, offset, value, 2); 78185377Ssam} 79185377Ssam 80185377Ssamvoid os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value) 81185377Ssam{ 82185377Ssam pci_write_config(((PHBA)osext)->pcidev, offset, value, 4); 83185377Ssam} 84185377Ssam 85185377Ssamvoid *os_map_pci_bar( 86185377Ssam void *osext, 87185377Ssam int index, 88185377Ssam HPT_U32 offset, 89185377Ssam HPT_U32 length 90185377Ssam) 91185377Ssam{ 92185377Ssam PHBA hba = (PHBA)osext; 93185377Ssam 94185377Ssam hba->pcibar[index].rid = 0x10 + index * 4; 95185377Ssam 96185377Ssam if (pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4) & 1) 97185377Ssam hba->pcibar[index].type = SYS_RES_IOPORT; 98185377Ssam else 99185377Ssam hba->pcibar[index].type = SYS_RES_MEMORY; 100185377Ssam 101185377Ssam hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev, 102185377Ssam hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE); 103185377Ssam 104185377Ssam hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset; 105185377Ssam return hba->pcibar[index].base; 106185377Ssam} 107185377Ssam 108185377Ssamvoid os_unmap_pci_bar(void *osext, void *base) 109185377Ssam{ 110185377Ssam PHBA hba = (PHBA)osext; 111185377Ssam int index; 112185377Ssam 113185377Ssam for (index=0; index<6; index++) { 114185377Ssam if (hba->pcibar[index].base==base) { 115185377Ssam bus_release_resource(hba->pcidev, hba->pcibar[index].type, 116185377Ssam hba->pcibar[index].rid, hba->pcibar[index].res); 117185377Ssam hba->pcibar[index].base = 0; 118185377Ssam return; 119185377Ssam } 120185377Ssam } 121185377Ssam} 122185377Ssam 123185377Ssamvoid freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count) 124185377Ssam{ 125185377Ssam PVBUS_EXT vbus_ext = osext; 126185377Ssam 127185377Ssam if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 128185377Ssam vbus_ext = ((PHBA)osext)->vbus_ext; 129185377Ssam 130185377Ssam list->next = vbus_ext->freelist_head; 131185377Ssam vbus_ext->freelist_head = list; 132185377Ssam list->dma = 0; 133185377Ssam list->size = size; 134185377Ssam list->head = 0; 135185377Ssam#if DBG 136185377Ssam list->reserved_count = 137185377Ssam#endif 138 list->count = count; 139} 140 141void *freelist_get(struct freelist *list) 142{ 143 void * result; 144 if (list->count) { 145 HPT_ASSERT(list->head); 146 result = list->head; 147 list->head = *(void **)result; 148 list->count--; 149 return result; 150 } 151 return 0; 152} 153 154void freelist_put(struct freelist * list, void *p) 155{ 156 HPT_ASSERT(list->dma==0); 157 list->count++; 158 *(void **)p = list->head; 159 list->head = p; 160} 161 162void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count) 163{ 164 PVBUS_EXT vbus_ext = osext; 165 166 if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 167 vbus_ext = ((PHBA)osext)->vbus_ext; 168 169 list->next = vbus_ext->freelist_dma_head; 170 vbus_ext->freelist_dma_head = list; 171 list->dma = 1; 172 list->alignment = alignment; 173 list->size = size; 174 list->head = 0; 175#if DBG 176 list->reserved_count = 177#endif 178 list->count = count; 179} 180 181void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr) 182{ 183 void *result; 184 HPT_ASSERT(list->dma); 185 result = freelist_get(list); 186 if (result) 187 *busaddr = *(BUS_ADDRESS *)((void **)result+1); 188 return result; 189} 190 191void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr) 192{ 193 HPT_ASSERT(list->dma); 194 list->count++; 195 *(void **)p = list->head; 196 *(BUS_ADDRESS *)((void **)p+1) = busaddr; 197 list->head = p; 198} 199 200HPT_U32 os_get_stamp(void) 201{ 202 HPT_U32 stamp; 203 do { stamp = random(); } while (stamp==0); 204 return stamp; 205} 206 207void os_stallexec(HPT_U32 microseconds) 208{ 209 DELAY(microseconds); 210} 211 212static void os_timer_for_ldm(void *arg) 213{ 214 PVBUS_EXT vbus_ext = (PVBUS_EXT)arg; 215 ldm_on_timer((PVBUS)vbus_ext->vbus); 216} 217 218void os_request_timer(void * osext, HPT_U32 interval) 219{ 220 PVBUS_EXT vbus_ext = osext; 221 222 HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS); 223 224 callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0, 225 os_timer_for_ldm, vbus_ext, 0); 226} 227 228HPT_TIME os_query_time(void) 229{ 230 return ticks * (1000000 / hz); 231} 232 233void os_schedule_task(void *osext, OSM_TASK *task) 234{ 235 PVBUS_EXT vbus_ext = osext; 236 237 HPT_ASSERT(task->next==0); 238 239 if (vbus_ext->tasks==0) 240 vbus_ext->tasks = task; 241 else { 242 OSM_TASK *t = vbus_ext->tasks; 243 while (t->next) t = t->next; 244 t->next = task; 245 } 246 247 if (vbus_ext->worker.ta_context) 248 TASK_ENQUEUE(&vbus_ext->worker); 249} 250 251int os_revalidate_device(void *osext, int id) 252{ 253 254 return 0; 255} 256 257int os_query_remove_device(void *osext, int id) 258{ 259 return 0; 260} 261 262HPT_U8 os_get_vbus_seq(void *osext) 263{ 264 return ((PVBUS_EXT)osext)->sim->path_id; 265} 266 267int os_printk(char *fmt, ...) 268{ 269 va_list args; 270 static char buf[512]; 271 272 va_start(args, fmt); 273 vsnprintf(buf, sizeof(buf), fmt, args); 274 va_end(args); 275 return printf("%s: %s\n", driver_name, buf); 276} 277 278#if DBG 279void os_check_stack(const char *location, int size){} 280 281void __os_dbgbreak(const char *file, int line) 282{ 283 printf("*** break at %s:%d ***", file, line); 284 while (1); 285} 286 287int hptrr_dbg_level = 1; 288#endif 289