1136849Sscottl/* 2149871Sscottl * Copyright (c) 2004-2005 MARVELL SEMICONDUCTOR ISRAEL, LTD. 3136849Sscottl * All rights reserved. 4136849Sscottl * 5136849Sscottl * Redistribution and use in source and binary forms, with or without 6136849Sscottl * modification, are permitted provided that the following conditions 7136849Sscottl * are met: 8136849Sscottl * 1. Redistributions of source code must retain the above copyright 9136849Sscottl * notice, this list of conditions and the following disclaimer. 10136849Sscottl * 2. Redistributions in binary form must reproduce the above copyright 11136849Sscottl * notice, this list of conditions and the following disclaimer in the 12136849Sscottl * documentation and/or other materials provided with the distribution. 13136849Sscottl * 14136849Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15136849Sscottl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16136849Sscottl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17136849Sscottl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18136849Sscottl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19136849Sscottl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20136849Sscottl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21136849Sscottl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22136849Sscottl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23136849Sscottl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24136849Sscottl * SUCH DAMAGE. 25142988Sscottl * 26142988Sscottl * $FreeBSD: releng/11.0/sys/dev/hptmv/mvStorageDev.h 190809 2009-04-07 16:38:25Z delphij $ 27143039Sscottl */ 28136849Sscottl#ifndef __INCmvStorageDevh 29136849Sscottl#define __INCmvStorageDevh 30136849Sscottl 31136849Sscottl/* Definitions */ 32136849Sscottl 33136849Sscottl/* ATA register on the ATA drive*/ 34136849Sscottl 35136849Sscottl#define MV_EDMA_ATA_FEATURES_ADDR 0x11 36136849Sscottl#define MV_EDMA_ATA_SECTOR_COUNT_ADDR 0x12 37136849Sscottl#define MV_EDMA_ATA_LBA_LOW_ADDR 0x13 38136849Sscottl#define MV_EDMA_ATA_LBA_MID_ADDR 0x14 39136849Sscottl#define MV_EDMA_ATA_LBA_HIGH_ADDR 0x15 40136849Sscottl#define MV_EDMA_ATA_DEVICE_ADDR 0x16 41136849Sscottl#define MV_EDMA_ATA_COMMAND_ADDR 0x17 42136849Sscottl 43136849Sscottl#define MV_ATA_ERROR_STATUS 0x00000001 /* MV_BIT0 */ 44136849Sscottl#define MV_ATA_DATA_REQUEST_STATUS 0x00000008 /* MV_BIT3 */ 45136849Sscottl#define MV_ATA_SERVICE_STATUS 0x00000010 /* MV_BIT4 */ 46136849Sscottl#define MV_ATA_DEVICE_FAULT_STATUS 0x00000020 /* MV_BIT5 */ 47136849Sscottl#define MV_ATA_READY_STATUS 0x00000040 /* MV_BIT6 */ 48136849Sscottl#define MV_ATA_BUSY_STATUS 0x00000080 /* MV_BIT7 */ 49136849Sscottl 50136849Sscottl 51136849Sscottl#define MV_ATA_COMMAND_READ_SECTORS 0x20 52136849Sscottl#define MV_ATA_COMMAND_READ_SECTORS_EXT 0x24 53136849Sscottl#define MV_ATA_COMMAND_READ_VERIFY_SECTORS 0x40 54136849Sscottl#define MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT 0x42 55136849Sscottl#define MV_ATA_COMMAND_READ_BUFFER 0xE4 56136849Sscottl#define MV_ATA_COMMAND_WRITE_BUFFER 0xE8 57136849Sscottl#define MV_ATA_COMMAND_WRITE_SECTORS 0x30 58136849Sscottl#define MV_ATA_COMMAND_WRITE_SECTORS_EXT 0x34 59136849Sscottl#define MV_ATA_COMMAND_DIAGNOSTIC 0x90 60136849Sscottl#define MV_ATA_COMMAND_SMART 0xb0 61136849Sscottl#define MV_ATA_COMMAND_READ_MULTIPLE 0xc4 62136849Sscottl#define MV_ATA_COMMAND_WRITE_MULTIPLE 0xc5 63136849Sscottl#define MV_ATA_COMMAND_STANDBY_IMMEDIATE 0xe0 64136849Sscottl#define MV_ATA_COMMAND_IDLE_IMMEDIATE 0xe1 65136849Sscottl#define MV_ATA_COMMAND_STANDBY 0xe2 66136849Sscottl#define MV_ATA_COMMAND_IDLE 0xe3 67136849Sscottl#define MV_ATA_COMMAND_SLEEP 0xe6 68136849Sscottl#define MV_ATA_COMMAND_IDENTIFY 0xec 69136849Sscottl#define MV_ATA_COMMAND_DEVICE_CONFIG 0xb1 70136849Sscottl#define MV_ATA_COMMAND_SET_FEATURES 0xef 71136849Sscottl#define MV_ATA_COMMAND_WRITE_DMA 0xca 72136849Sscottl#define MV_ATA_COMMAND_WRITE_DMA_EXT 0x35 73136849Sscottl#define MV_ATA_COMMAND_WRITE_DMA_QUEUED 0xcc 74136849Sscottl#define MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT 0x36 75136849Sscottl#define MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT 0x61 76136849Sscottl#define MV_ATA_COMMAND_READ_DMA 0xc8 77136849Sscottl#define MV_ATA_COMMAND_READ_DMA_EXT 0x25 78136849Sscottl#define MV_ATA_COMMAND_READ_DMA_QUEUED 0xc7 79136849Sscottl#define MV_ATA_COMMAND_READ_DMA_QUEUED_EXT 0x26 80136849Sscottl#define MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT 0x60 81136849Sscottl#define MV_ATA_COMMAND_FLUSH_CACHE 0xe7 82136849Sscottl#define MV_ATA_COMMAND_FLUSH_CACHE_EXT 0xea 83136849Sscottl 84136849Sscottl 85136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO 0x01 86136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_WCACHE 0x02 /* Enable write cache */ 87136849Sscottl#define MV_ATA_SET_FEATURES_TRANSFER 0x03 /* Set transfer mode */ 88136849Sscottl#define MV_ATA_TRANSFER_UDMA_0 0x40 89136849Sscottl#define MV_ATA_TRANSFER_UDMA_1 0x41 90136849Sscottl#define MV_ATA_TRANSFER_UDMA_2 0x42 91136849Sscottl#define MV_ATA_TRANSFER_UDMA_3 0x43 92136849Sscottl#define MV_ATA_TRANSFER_UDMA_4 0x44 93136849Sscottl#define MV_ATA_TRANSFER_UDMA_5 0x45 94136849Sscottl#define MV_ATA_TRANSFER_UDMA_6 0x46 95136849Sscottl#define MV_ATA_TRANSFER_UDMA_7 0x47 96136849Sscottl#define MV_ATA_TRANSFER_PIO_SLOW 0x00 97136849Sscottl#define MV_ATA_TRANSFER_PIO_0 0x08 98136849Sscottl#define MV_ATA_TRANSFER_PIO_1 0x09 99136849Sscottl#define MV_ATA_TRANSFER_PIO_2 0x0A 100136849Sscottl#define MV_ATA_TRANSFER_PIO_3 0x0B 101136849Sscottl#define MV_ATA_TRANSFER_PIO_4 0x0C 102136849Sscottl/* Enable advanced power management */ 103136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_APM 0x05 104136849Sscottl/* Disable media status notification*/ 105136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_MSN 0x31 106136849Sscottl/* Disable read look-ahead */ 107136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_RLA 0x55 108136849Sscottl/* Enable release interrupt */ 109136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_RI 0x5D 110136849Sscottl/* Enable SERVICE interrupt */ 111136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_SI 0x5E 112136849Sscottl/* Disable revert power-on defaults */ 113136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_RPOD 0x66 114136849Sscottl/* Disable write cache */ 115136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_WCACHE 0x82 116136849Sscottl/* Disable advanced power management*/ 117136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_APM 0x85 118136849Sscottl/* Enable media status notification */ 119136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_MSN 0x95 120136849Sscottl/* Enable read look-ahead */ 121136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_RLA 0xAA 122136849Sscottl/* Enable revert power-on defaults */ 123136849Sscottl#define MV_ATA_SET_FEATURES_ENABLE_RPOD 0xCC 124136849Sscottl/* Disable release interrupt */ 125136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_RI 0xDD 126136849Sscottl/* Disable SERVICE interrupt */ 127136849Sscottl#define MV_ATA_SET_FEATURES_DISABLE_SI 0xDE 128136849Sscottl 129136849Sscottl/* Defines for parsing the IDENTIFY command results*/ 130136849Sscottl#define IDEN_SERIAL_NUM_OFFSET 10 131136849Sscottl#define IDEN_SERIAL_NUM_SIZE 19-10 132136849Sscottl#define IDEN_FIRMWARE_OFFSET 23 133136849Sscottl#define IDEN_FIRMWARE_SIZE 26-23 134136849Sscottl#define IDEN_MODEL_OFFSET 27 135136849Sscottl#define IDEN_MODEL_SIZE 46-27 136136849Sscottl#define IDEN_CAPACITY_1_OFFSET 49 137136849Sscottl#define IDEN_VALID 53 138136849Sscottl#define IDEN_NUM_OF_ADDRESSABLE_SECTORS 60 139136849Sscottl#define IDEN_PIO_MODE_SPPORTED 64 140136849Sscottl#define IDEN_QUEUE_DEPTH 75 141136849Sscottl#define IDEN_SATA_CAPABILITIES 76 142136849Sscottl#define IDEN_SATA_FEATURES_SUPPORTED 78 143136849Sscottl#define IDEN_SATA_FEATURES_ENABLED 79 144136849Sscottl#define IDEN_ATA_VERSION 80 145136849Sscottl#define IDEN_SUPPORTED_COMMANDS1 82 146136849Sscottl#define IDEN_SUPPORTED_COMMANDS2 83 147136849Sscottl#define IDEN_ENABLED_COMMANDS1 85 148136849Sscottl#define IDEN_ENABLED_COMMANDS2 86 149136849Sscottl#define IDEN_UDMA_MODE 88 150136849Sscottl#define IDEN_SATA_CAPABILITY 76 151136849Sscottl 152136849Sscottl 153136849Sscottl/* Typedefs */ 154136849Sscottl 155136849Sscottl/* Structures */ 156136849Sscottltypedef struct mvStorageDevRegisters 157136849Sscottl{ 158136849Sscottl /* Fields set by CORE driver */ 159136849Sscottl MV_U8 errorRegister; 160136849Sscottl MV_U16 sectorCountRegister; 161136849Sscottl MV_U16 lbaLowRegister; 162136849Sscottl MV_U16 lbaMidRegister; 163136849Sscottl MV_U16 lbaHighRegister; 164136849Sscottl MV_U8 deviceRegister; 165136849Sscottl MV_U8 statusRegister; 166136849Sscottl} MV_STORAGE_DEVICE_REGISTERS; 167136849Sscottl 168136849Sscottl/* Bits for HD_ERROR */ 169136849Sscottl#define NM_ERR 0x02 /* media present */ 170136849Sscottl#define ABRT_ERR 0x04 /* Command aborted */ 171136849Sscottl#define MCR_ERR 0x08 /* media change request */ 172136849Sscottl#define IDNF_ERR 0x10 /* ID field not found */ 173136849Sscottl#define MC_ERR 0x20 /* media changed */ 174136849Sscottl#define UNC_ERR 0x40 /* Uncorrect data */ 175136849Sscottl#define WP_ERR 0x40 /* write protect */ 176136849Sscottl#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */ 177136849Sscottl 178136849Sscottl/* Function */ 179136849Sscottl 180136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATAExecuteNonUDMACommand(MV_SATA_ADAPTER *pAdapter, 181136849Sscottl MV_U8 channelIndex, 182136849Sscottl MV_NON_UDMA_PROTOCOL protocolType, 183136849Sscottl MV_BOOLEAN isEXT, 184136849Sscottl MV_U16 FAR *bufPtr, MV_U32 count, 185136849Sscottl MV_U16 features, 186136849Sscottl MV_U16 sectorCount, 187136849Sscottl MV_U16 lbaLow, MV_U16 lbaMid, 188136849Sscottl MV_U16 lbaHigh, MV_U8 device, 189136849Sscottl MV_U8 command); 190136849Sscottl 191136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATAIdentifyDevice(MV_SATA_ADAPTER *pAdapter, 192136849Sscottl MV_U8 channelIndex); 193136849Sscottl 194136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATASetFeatures(MV_SATA_ADAPTER *pAdapter, 195136849Sscottl MV_U8 channelIndex, MV_U8 subCommand, 196136849Sscottl MV_U8 subCommandSpecific1, 197136849Sscottl MV_U8 subCommandSpecific2, 198136849Sscottl MV_U8 subCommandSpecific3, 199136849Sscottl MV_U8 subCommandSpecific4); 200136849Sscottl 201136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATAIdleImmediate(MV_SATA_ADAPTER *pAdapter, 202136849Sscottl MV_U8 channelIndex); 203136849Sscottl 204136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATAFlushWriteCache(MV_SATA_ADAPTER *pAdapter, 205136849Sscottl MV_U8 channelIndex); 206136849Sscottl 207136849SscottlMV_BOOLEAN HPTLIBAPI mvStorageDevATASoftResetDevice(MV_SATA_ADAPTER *pAdapter, 208136849Sscottl MV_U8 channelIndex); 209136849Sscottl 210190809SdelphijMV_BOOLEAN HPTLIBAPI mvStorageDevWaitStat(MV_SATA_CHANNEL *pSataChannel, 211190809Sdelphij MV_U8 good, MV_U8 bad, MV_U32 loops, MV_U32 delay); 212190809Sdelphij 213136849SscottlMV_BOOLEAN HPTLIBAPI mvReadWrite(MV_SATA_CHANNEL *pSataChannel, LBA_T Lba, UCHAR Cmd, void *tmpBuffer); 214136849Sscottl 215136849Sscottl#endif 216