mvSata.h revision 136849
1136849Sscottl/*
2136849Sscottl * Copyright (c) 2003-2004 MARVELL SEMICONDUCTOR ISRAEL, LTD.
3136849Sscottl * All rights reserved.
4136849Sscottl *
5136849Sscottl * Redistribution and use in source and binary forms, with or without
6136849Sscottl * modification, are permitted provided that the following conditions
7136849Sscottl * are met:
8136849Sscottl * 1. Redistributions of source code must retain the above copyright
9136849Sscottl *    notice, this list of conditions and the following disclaimer.
10136849Sscottl * 2. Redistributions in binary form must reproduce the above copyright
11136849Sscottl *    notice, this list of conditions and the following disclaimer in the
12136849Sscottl *    documentation and/or other materials provided with the distribution.
13136849Sscottl *
14136849Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15136849Sscottl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16136849Sscottl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17136849Sscottl * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18136849Sscottl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19136849Sscottl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20136849Sscottl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21136849Sscottl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22136849Sscottl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23136849Sscottl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24136849Sscottl * SUCH DAMAGE.
25136849Sscottl */
26136849Sscottl#ifndef __INCmvSatah
27136849Sscottl#define __INCmvSatah
28136849Sscottl
29136849Sscottl#ifndef SUPPORT_MV_SATA_GEN_1
30136849Sscottl#define SUPPORT_MV_SATA_GEN_1 1
31136849Sscottl#endif
32136849Sscottl
33136849Sscottl#ifndef SUPPORT_MV_SATA_GEN_2
34136849Sscottl#define SUPPORT_MV_SATA_GEN_2 0
35136849Sscottl#endif
36136849Sscottl
37136849Sscottl#if SUPPORT_MV_SATA_GEN_1==1 && SUPPORT_MV_SATA_GEN_2==1
38136849Sscottl#define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
39136849Sscottl#define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration==2)
40136849Sscottl#elif SUPPORT_MV_SATA_GEN_1==1
41136849Sscottl#define MV_SATA_GEN_1(x) 1
42136849Sscottl#define MV_SATA_GEN_2(x) 0
43136849Sscottl#elif SUPPORT_MV_SATA_GEN_2==1
44136849Sscottl#define MV_SATA_GEN_1(x) 0
45136849Sscottl#define MV_SATA_GEN_2(x) 1
46136849Sscottl#else
47136849Sscottl#error "Which IC do you support?"
48136849Sscottl#endif
49136849Sscottl
50136849Sscottl/* Definitions */
51136849Sscottl/* MV88SX50XX specific defines */
52136849Sscottl#define MV_SATA_VENDOR_ID		   				0x11AB
53136849Sscottl#define MV_SATA_DEVICE_ID_5080			   		0x5080
54136849Sscottl#define MV_SATA_DEVICE_ID_5081			   		0x5081
55136849Sscottl#define MV_SATA_DEVICE_ID_6080			   		0x6080
56136849Sscottl#define MV_SATA_DEVICE_ID_6081			   		0x6081
57136849Sscottl#define MV_SATA_CHANNELS_NUM					8
58136849Sscottl#define MV_SATA_UNITS_NUM						2
59136849Sscottl#define MV_SATA_PCI_BAR0_SPACE_SIZE				(1<<18) /* 256 Kb*/
60136849Sscottl
61136849Sscottl#define CHANNEL_QUEUE_LENGTH					32
62136849Sscottl#define CHANNEL_QUEUE_MASK					    0x1F
63136849Sscottl
64136849Sscottl#define MV_EDMA_QUEUE_LENGTH					32	/* Up to 32 outstanding	 */
65136849Sscottl                        							/* commands per SATA channel*/
66136849Sscottl#define MV_EDMA_QUEUE_MASK                      0x1F
67136849Sscottl#define MV_EDMA_REQUEST_QUEUE_SIZE				1024 /* 32*32 = 1KBytes */
68136849Sscottl#define MV_EDMA_RESPONSE_QUEUE_SIZE				256  /* 32*8 = 256 Bytes */
69136849Sscottl
70136849Sscottl#define MV_EDMA_REQUEST_ENTRY_SIZE				32
71136849Sscottl#define MV_EDMA_RESPONSE_ENTRY_SIZE				8
72136849Sscottl
73136849Sscottl#define MV_EDMA_PRD_ENTRY_SIZE					16		/* 16Bytes*/
74136849Sscottl#define MV_EDMA_PRD_NO_SNOOP_FLAG				0x00000001 /* MV_BIT0 */
75136849Sscottl#define MV_EDMA_PRD_EOT_FLAG					0x00008000 /* MV_BIT15 */
76136849Sscottl
77136849Sscottl#define MV_ATA_IDENTIFY_DEV_DATA_LENGTH  		256	/* number of words(2 byte)*/
78136849Sscottl#define MV_ATA_MODEL_NUMBER_LEN					40
79136849Sscottl#define ATA_SECTOR_SIZE							512
80136849Sscottl/* Log messages level defines */
81136849Sscottl#define MV_DEBUG								0x1
82136849Sscottl#define MV_DEBUG_INIT							0x2
83136849Sscottl#define MV_DEBUG_INTERRUPTS						0x4
84136849Sscottl#define MV_DEBUG_SATA_LINK						0x8
85136849Sscottl#define MV_DEBUG_UDMA_COMMAND					0x10
86136849Sscottl#define MV_DEBUG_NON_UDMA_COMMAND				0x20
87136849Sscottl#define MV_DEBUG_ERROR							0x40
88136849Sscottl
89136849Sscottl
90136849Sscottl/* Typedefs    */
91136849Sscottltypedef enum mvUdmaType
92136849Sscottl{
93136849Sscottl	MV_UDMA_TYPE_READ, MV_UDMA_TYPE_WRITE
94136849Sscottl} MV_UDMA_TYPE;
95136849Sscottl
96136849Sscottltypedef enum mvFlushType
97136849Sscottl{
98136849Sscottl	MV_FLUSH_TYPE_CALLBACK, MV_FLUSH_TYPE_NONE
99136849Sscottl} MV_FLUSH_TYPE;
100136849Sscottl
101136849Sscottltypedef enum mvCompletionType
102136849Sscottl{
103136849Sscottl	MV_COMPLETION_TYPE_NORMAL, MV_COMPLETION_TYPE_ERROR,
104136849Sscottl	MV_COMPLETION_TYPE_ABORT
105136849Sscottl} MV_COMPLETION_TYPE;
106136849Sscottl
107136849Sscottltypedef enum mvEventType
108136849Sscottl{
109136849Sscottl	MV_EVENT_TYPE_ADAPTER_ERROR, MV_EVENT_TYPE_SATA_CABLE
110136849Sscottl} MV_EVENT_TYPE;
111136849Sscottl
112136849Sscottltypedef enum mvEdmaMode
113136849Sscottl{
114136849Sscottl	MV_EDMA_MODE_QUEUED,
115136849Sscottl	MV_EDMA_MODE_NOT_QUEUED,
116136849Sscottl	MV_EDMA_MODE_NATIVE_QUEUING
117136849Sscottl} MV_EDMA_MODE;
118136849Sscottl
119136849Sscottltypedef enum mvEdmaQueueResult
120136849Sscottl{
121136849Sscottl	MV_EDMA_QUEUE_RESULT_OK = 0,
122136849Sscottl	MV_EDMA_QUEUE_RESULT_EDMA_DISABLED,
123136849Sscottl	MV_EDMA_QUEUE_RESULT_FULL,
124136849Sscottl	MV_EDMA_QUEUE_RESULT_BAD_LBA_ADDRESS,
125136849Sscottl	MV_EDMA_QUEUE_RESULT_BAD_PARAMS
126136849Sscottl} MV_EDMA_QUEUE_RESULT;
127136849Sscottl
128136849Sscottltypedef enum mvQueueCommandResult
129136849Sscottl{
130136849Sscottl	MV_QUEUE_COMMAND_RESULT_OK = 0,
131136849Sscottl	MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED,
132136849Sscottl	MV_QUEUE_COMMAND_RESULT_FULL,
133136849Sscottl	MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS,
134136849Sscottl	MV_QUEUE_COMMAND_RESULT_BAD_PARAMS
135136849Sscottl} MV_QUEUE_COMMAND_RESULT;
136136849Sscottl
137136849Sscottltypedef enum mvNonUdmaProtocol
138136849Sscottl{
139136849Sscottl    MV_NON_UDMA_PROTOCOL_NON_DATA,
140136849Sscottl    MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
141136849Sscottl    MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT
142136849Sscottl} MV_NON_UDMA_PROTOCOL;
143136849Sscottl
144136849Sscottl
145136849Sscottlstruct mvDmaRequestQueueEntry;
146136849Sscottlstruct mvDmaResponseQueueEntry;
147136849Sscottlstruct mvDmaCommandEntry;
148136849Sscottl
149136849Sscottlstruct mvSataAdapter;
150136849Sscottlstruct mvStorageDevRegisters;
151136849Sscottl
152136849Sscottltypedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
153136849Sscottl														 MV_U8,
154136849Sscottl                                                         MV_COMPLETION_TYPE,
155136849Sscottl														 MV_VOID_PTR, MV_U16,
156136849Sscottl														 MV_U32,
157136849Sscottl											    struct mvStorageDevRegisters FAR*);
158136849Sscottl
159136849Sscottltypedef enum mvQueuedCommandType
160136849Sscottl{
161136849Sscottl	MV_QUEUED_COMMAND_TYPE_UDMA,
162136849Sscottl	MV_QUEUED_COMMAND_TYPE_NONE_UDMA
163136849Sscottl} MV_QUEUED_COMMAND_TYPE;
164136849Sscottl
165136849Sscottltypedef struct mvUdmaCommandParams
166136849Sscottl{
167136849Sscottl	MV_UDMA_TYPE readWrite;
168136849Sscottl	MV_BOOLEAN   isEXT;
169136849Sscottl	MV_U32       lowLBAAddress;
170136849Sscottl	MV_U16       highLBAAddress;
171136849Sscottl	MV_U16       numOfSectors;
172136849Sscottl	MV_U32       prdLowAddr;
173136849Sscottl	MV_U32       prdHighAddr;
174136849Sscottl	mvSataCommandCompletionCallBack_t callBack;
175136849Sscottl	MV_VOID_PTR  commandId;
176136849Sscottl} MV_UDMA_COMMAND_PARAMS;
177136849Sscottl
178136849Sscottltypedef struct mvNoneUdmaCommandParams
179136849Sscottl{
180136849Sscottl  	MV_NON_UDMA_PROTOCOL protocolType;
181136849Sscottl	MV_BOOLEAN  isEXT;
182136849Sscottl	MV_U16_PTR	bufPtr;
183136849Sscottl	MV_U32		count;
184136849Sscottl	MV_U16		features;
185136849Sscottl	MV_U16		sectorCount;
186136849Sscottl	MV_U16		lbaLow;
187136849Sscottl	MV_U16		lbaMid;
188136849Sscottl	MV_U16		lbaHigh;
189136849Sscottl	MV_U8		device;
190136849Sscottl	MV_U8		command;
191136849Sscottl    mvSataCommandCompletionCallBack_t callBack;
192136849Sscottl	MV_VOID_PTR  commandId;
193136849Sscottl} MV_NONE_UDMA_COMMAND_PARAMS;
194136849Sscottl
195136849Sscottltypedef struct mvQueueCommandInfo
196136849Sscottl{
197136849Sscottl	MV_QUEUED_COMMAND_TYPE	type;
198136849Sscottl	union
199136849Sscottl	{
200136849Sscottl		MV_UDMA_COMMAND_PARAMS		udmaCommand;
201136849Sscottl		MV_NONE_UDMA_COMMAND_PARAMS	NoneUdmaCommand;
202136849Sscottl    } commandParams;
203136849Sscottl} MV_QUEUE_COMMAND_INFO;
204136849Sscottl
205136849Sscottl/* The following structure is for the Core Driver internal usage */
206136849Sscottltypedef struct mvQueuedCommandEntry
207136849Sscottl{
208136849Sscottl    MV_BOOLEAN   isFreeEntry;
209136849Sscottl    MV_U8        commandTag;
210136849Sscottl	struct mvQueuedCommandEntry	*next;
211136849Sscottl	struct mvQueuedCommandEntry	*prev;
212136849Sscottl	MV_QUEUE_COMMAND_INFO	commandInfo;
213136849Sscottl} MV_QUEUED_COMMAND_ENTRY;
214136849Sscottl
215136849Sscottl/* The following structures are part of the Core Driver API */
216136849Sscottltypedef struct mvSataChannel
217136849Sscottl{
218136849Sscottl	/* Fields set by Intermediate Application Layer */
219136849Sscottl	MV_U8                       channelNumber;
220136849Sscottl	MV_BOOLEAN                  waitingForInterrupt;
221136849Sscottl	MV_BOOLEAN                  lba48Address;
222136849Sscottl	MV_BOOLEAN                  maxReadTransfer;
223136849Sscottl	struct mvDmaRequestQueueEntry FAR *requestQueue;
224136849Sscottl	struct mvDmaResponseQueueEntry FAR *responseQueue;
225136849Sscottl	MV_U32                      requestQueuePciHiAddress;
226136849Sscottl	MV_U32                      requestQueuePciLowAddress;
227136849Sscottl	MV_U32                      responseQueuePciHiAddress;
228136849Sscottl	MV_U32                      responseQueuePciLowAddress;
229136849Sscottl	/* Fields set by CORE driver */
230136849Sscottl	struct mvSataAdapter        *mvSataAdapter;
231136849Sscottl	MV_OS_SEMAPHORE             semaphore;
232136849Sscottl	MV_U32                      eDmaRegsOffset;
233136849Sscottl	MV_U16                      identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
234136849Sscottl	MV_BOOLEAN                  EdmaActive;
235136849Sscottl	MV_EDMA_MODE                queuedDMA;
236136849Sscottl	MV_U8                       outstandingCommands;
237136849Sscottl	MV_BOOLEAN					workAroundDone;
238136849Sscottl	struct mvQueuedCommandEntry	commandsQueue[CHANNEL_QUEUE_LENGTH];
239136849Sscottl	struct mvQueuedCommandEntry	*commandsQueueHead;
240136849Sscottl	struct mvQueuedCommandEntry	*commandsQueueTail;
241136849Sscottl	MV_BOOLEAN					queueCommandsEnabled;
242136849Sscottl	MV_U8                       noneUdmaOutstandingCommands;
243136849Sscottl	MV_U8                       EdmaQueuedCommands;
244136849Sscottl    MV_U32                      freeIDsStack[MV_EDMA_QUEUE_LENGTH];
245136849Sscottl	MV_U32                      freeIDsNum;
246136849Sscottl	MV_U32                      reqInPtr;
247136849Sscottl	MV_U32                      rspOutPtr;
248136849Sscottl} MV_SATA_CHANNEL;
249136849Sscottl
250136849Sscottltypedef struct mvSataAdapter
251136849Sscottl{
252136849Sscottl	/* Fields set by Intermediate Application Layer */
253136849Sscottl	MV_U32            adapterId;
254136849Sscottl	MV_U8             pcbVersion;
255136849Sscottl    MV_U8             pciConfigRevisionId;
256136849Sscottl    MV_U16            pciConfigDeviceId;
257136849Sscottl	MV_VOID_PTR		  IALData;
258136849Sscottl	MV_BUS_ADDR_T     adapterIoBaseAddress;
259136849Sscottl	MV_U32            intCoalThre[MV_SATA_UNITS_NUM];
260136849Sscottl	MV_U32            intTimeThre[MV_SATA_UNITS_NUM];
261136849Sscottl	MV_BOOLEAN        (* HPTLIBAPI mvSataEventNotify)(struct mvSataAdapter *,
262136849Sscottl										   MV_EVENT_TYPE,
263136849Sscottl										   MV_U32, MV_U32);
264136849Sscottl	MV_SATA_CHANNEL   *sataChannel[MV_SATA_CHANNELS_NUM];
265136849Sscottl	MV_U32            pciCommand;
266136849Sscottl	MV_U32            pciSerrMask;
267136849Sscottl	MV_U32            pciInterruptMask;
268136849Sscottl
269136849Sscottl	/* Fields set by CORE driver */
270136849Sscottl	MV_OS_SEMAPHORE   semaphore;
271136849Sscottl	MV_U32			  mainMask;
272136849Sscottl	MV_OS_SEMAPHORE	  interruptsMaskSem;
273136849Sscottl    MV_BOOLEAN        implementA0Workarounds;
274136849Sscottl    MV_BOOLEAN        implement50XXB0Workarounds;
275136849Sscottl	MV_BOOLEAN        implement50XXB1Workarounds;
276136849Sscottl	MV_BOOLEAN        implement50XXB2Workarounds;
277136849Sscottl	MV_BOOLEAN        implement60X1A0Workarounds;
278136849Sscottl	MV_BOOLEAN        implement60X1A1Workarounds;
279136849Sscottl	MV_BOOLEAN        implement60X1B0Workarounds;
280136849Sscottl	MV_U8			  sataAdapterGeneration;
281136849Sscottl	MV_U8             failLEDMask;
282136849Sscottl    MV_U8			  signalAmps[MV_SATA_CHANNELS_NUM];
283136849Sscottl	MV_U8			  pre[MV_SATA_CHANNELS_NUM];
284136849Sscottl    MV_BOOLEAN        staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
285136849Sscottl} MV_SATA_ADAPTER;
286136849Sscottl
287136849Sscottltypedef struct mvSataAdapterStatus
288136849Sscottl{
289136849Sscottl	/* Fields set by CORE driver */
290136849Sscottl	MV_BOOLEAN		channelConnected[MV_SATA_CHANNELS_NUM];
291136849Sscottl	MV_U32			pciDLLStatusAndControlRegister;
292136849Sscottl	MV_U32			pciCommandRegister;
293136849Sscottl	MV_U32			pciModeRegister;
294136849Sscottl	MV_U32			pciSERRMaskRegister;
295136849Sscottl	MV_U32			intCoalThre[MV_SATA_UNITS_NUM];
296136849Sscottl	MV_U32			intTimeThre[MV_SATA_UNITS_NUM];
297136849Sscottl	MV_U32			R00StatusBridgePortRegister[MV_SATA_CHANNELS_NUM];
298136849Sscottl}MV_SATA_ADAPTER_STATUS;
299136849Sscottl
300136849Sscottl
301136849Sscottltypedef struct mvSataChannelStatus
302136849Sscottl{
303136849Sscottl	/* Fields set by CORE driver */
304136849Sscottl	MV_BOOLEAN		isConnected;
305136849Sscottl	MV_U8			modelNumber[MV_ATA_MODEL_NUMBER_LEN];
306136849Sscottl	MV_BOOLEAN		DMAEnabled;
307136849Sscottl	MV_EDMA_MODE	queuedDMA;
308136849Sscottl	MV_U8			outstandingCommands;
309136849Sscottl	MV_U32			EdmaConfigurationRegister;
310136849Sscottl	MV_U32			EdmaRequestQueueBaseAddressHighRegister;
311136849Sscottl	MV_U32			EdmaRequestQueueInPointerRegister;
312136849Sscottl	MV_U32			EdmaRequestQueueOutPointerRegister;
313136849Sscottl	MV_U32			EdmaResponseQueueBaseAddressHighRegister;
314136849Sscottl	MV_U32			EdmaResponseQueueInPointerRegister;
315136849Sscottl	MV_U32			EdmaResponseQueueOutPointerRegister;
316136849Sscottl	MV_U32			EdmaCommandRegister;
317136849Sscottl	MV_U32			PHYModeRegister;
318136849Sscottl}MV_SATA_CHANNEL_STATUS;
319136849Sscottl
320136849Sscottl/* this structure used by the IAL defines the PRD entries used by the EDMA HW */
321136849Sscottltypedef struct mvSataEdmaPRDEntry
322136849Sscottl{
323136849Sscottl	volatile MV_U32	lowBaseAddr;
324136849Sscottl	volatile MV_U16	byteCount;
325136849Sscottl	volatile MV_U16	flags;
326136849Sscottl	volatile MV_U32 highBaseAddr;
327136849Sscottl	volatile MV_U32 reserved;
328136849Sscottl}MV_SATA_EDMA_PRD_ENTRY;
329136849Sscottl
330136849Sscottl/* API Functions */
331136849Sscottl
332136849Sscottl/* CORE driver Adapter Management */
333136849SscottlMV_BOOLEAN HPTLIBAPI mvSataInitAdapter(MV_SATA_ADAPTER *pAdapter);
334136849Sscottl
335136849SscottlMV_BOOLEAN HPTLIBAPI mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter);
336136849Sscottl
337136849SscottlMV_BOOLEAN HPTLIBAPI mvSataGetAdapterStatus(MV_SATA_ADAPTER *pAdapter,
338136849Sscottl								  MV_SATA_ADAPTER_STATUS *pAdapterStatus);
339136849Sscottl
340136849SscottlMV_U32  HPTLIBAPI mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset);
341136849Sscottl
342136849SscottlMV_VOID HPTLIBAPI mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
343136849Sscottl					   MV_U32 regValue);
344136849Sscottl
345136849SscottlMV_VOID HPTLIBAPI mvEnableAutoFlush(MV_VOID);
346136849SscottlMV_VOID HPTLIBAPI mvDisableAutoFlush(MV_VOID);
347136849Sscottl
348136849Sscottl
349136849Sscottl/* CORE driver SATA Channel Management */
350136849SscottlMV_BOOLEAN HPTLIBAPI mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter,
351136849Sscottl								  MV_U8 channelIndex);
352136849Sscottl
353136849SscottlMV_BOOLEAN HPTLIBAPI mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
354136849Sscottl
355136849SscottlMV_BOOLEAN HPTLIBAPI mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
356136849Sscottl										  MV_U8 channelIndex);
357136849Sscottl
358136849SscottlMV_BOOLEAN HPTLIBAPI mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
359136849Sscottl								  MV_U8 channelIndex);
360136849Sscottl
361136849SscottlMV_BOOLEAN HPTLIBAPI mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
362136849Sscottl								MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth);
363136849Sscottl
364136849SscottlMV_BOOLEAN HPTLIBAPI mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter,
365136849Sscottl								  MV_U8 channelIndex);
366136849Sscottl
367136849SscottlMV_BOOLEAN HPTLIBAPI mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
368136849Sscottl								   MV_U8 channelIndex);
369136849Sscottl
370136849SscottlMV_BOOLEAN HPTLIBAPI mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
371136849Sscottl							   MV_FLUSH_TYPE flushType);
372136849Sscottl
373136849SscottlMV_U8 HPTLIBAPI mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
374136849Sscottl
375136849SscottlMV_BOOLEAN HPTLIBAPI mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
376136849Sscottl								   MV_U32 intCoalThre, MV_U32 intTimeThre);
377136849Sscottl
378136849SscottlMV_BOOLEAN HPTLIBAPI mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
379136849Sscottl									 MV_U8 channelIndex,
380136849Sscottl									 MV_U8 signalAmps, MV_U8 pre);
381136849Sscottl
382136849SscottlMV_BOOLEAN HPTLIBAPI mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
383136849Sscottl									MV_U8 channelIndex);
384136849Sscottl
385136849SscottlMV_BOOLEAN HPTLIBAPI mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
386136849Sscottl									MV_U8 channelIndex);
387136849Sscottl
388136849SscottlMV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
389136849Sscottl											MV_U8 channelIndex,
390136849Sscottl											MV_BOOLEAN loopBackOn);
391136849Sscottl
392136849SscottlMV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
393136849Sscottl								  MV_SATA_CHANNEL_STATUS *pChannelStatus);
394136849Sscottl
395136849Sscottl/* Execute UDMA ATA commands */
396136849SscottlMV_EDMA_QUEUE_RESULT HPTLIBAPI mvSataQueueUDmaCommand(MV_SATA_ADAPTER *pAdapter,
397136849Sscottl											MV_U8 channelIndex,
398136849Sscottl											MV_UDMA_TYPE readWrite,
399136849Sscottl											MV_U32 lowLBAAddr,
400136849Sscottl											MV_U16 highLBAAddr,
401136849Sscottl											MV_U16 sectorCount,
402136849Sscottl											MV_U32 prdLowAddr,
403136849Sscottl											MV_U32 prdHighAddr,
404136849Sscottl									mvSataCommandCompletionCallBack_t callBack,
405136849Sscottl											MV_VOID_PTR commandId);
406136849Sscottl
407136849SscottlMV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
408136849Sscottl										   MV_U8 channelIndex,
409136849Sscottl										   MV_QUEUE_COMMAND_INFO FAR *pCommandParams);
410136849Sscottl
411136849Sscottl/* Interrupt Service Routine */
412136849SscottlMV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
413136849Sscottl
414136849SscottlMV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
415136849Sscottl
416136849SscottlMV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
417136849Sscottl
418136849Sscottl/* Command Completion and Event Notification (user implemented) */
419136849SscottlMV_BOOLEAN HPTLIBAPI mvSataEventNotify(MV_SATA_ADAPTER *, MV_EVENT_TYPE ,
420136849Sscottl							 MV_U32, MV_U32);
421136849Sscottl
422136849Sscottl/*
423136849Sscottl * Staggered spin-ip support and SATA interface speed control
424136849Sscottl * (relevant for 60x1 adapters)
425136849Sscottl */
426136849SscottlMV_BOOLEAN HPTLIBAPI mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
427136849SscottlMV_BOOLEAN HPTLIBAPI mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
428136849Sscottl
429136849Sscottl#endif
430