1136849Sscottl/* 2149871Sscottl * Copyright (c) 2004-2005 HighPoint Technologies, Inc. 3136849Sscottl * All rights reserved. 4136849Sscottl * 5136849Sscottl * Redistribution and use in source and binary forms, with or without 6136849Sscottl * modification, are permitted provided that the following conditions 7136849Sscottl * are met: 8136849Sscottl * 1. Redistributions of source code must retain the above copyright 9136849Sscottl * notice, this list of conditions and the following disclaimer. 10136849Sscottl * 2. Redistributions in binary form must reproduce the above copyright 11136849Sscottl * notice, this list of conditions and the following disclaimer in the 12136849Sscottl * documentation and/or other materials provided with the distribution. 13136849Sscottl * 14136849Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15136849Sscottl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16136849Sscottl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17136849Sscottl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18136849Sscottl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19136849Sscottl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20136849Sscottl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21136849Sscottl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22136849Sscottl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23136849Sscottl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24136849Sscottl * SUCH DAMAGE. 25142988Sscottl * 26142988Sscottl * $FreeBSD: releng/11.0/sys/dev/hptmv/atapi.h 194900 2009-06-24 20:43:51Z mav $ 27136849Sscottl */ 28136849Sscottl 29136849Sscottl#ifndef _ATAPI_H_ 30136849Sscottl#define _ATAPI_H_ 31136849Sscottl 32136849Sscottl#pragma pack(1) 33136849Sscottl 34136849Sscottl/*************************************************************************** 35136849Sscottl * IDE IO Register File 36136849Sscottl ***************************************************************************/ 37136849Sscottl 38136849Sscottl/* 39136849Sscottl * IDE IO Port definition 40136849Sscottl */ 41136849Sscottltypedef struct _IDE_REGISTERS_1 { 42136849Sscottl USHORT Data; /* RW: Data port feature register */ 43136849Sscottl UCHAR BlockCount; /* RW: Sector count */ 44136849Sscottl UCHAR BlockNumber; /* RW: Sector number & LBA 0-7 */ 45136849Sscottl UCHAR CylinderLow; /* RW: Cylinder low & LBA 8-15 */ 46136849Sscottl UCHAR CylinderHigh; /* RW: Cylinder hign & LBA 16-23 */ 47136849Sscottl UCHAR DriveSelect; /* RW: Drive/head & LBA 24-27 */ 48136849Sscottl UCHAR Command; /* RO: Status WR:Command */ 49136849Sscottl} IDE_REGISTERS_1, *PIDE_REGISTERS_1; 50136849Sscottl 51136849Sscottl 52136849Sscottl/* 53136849Sscottl * IDE status definitions 54136849Sscottl */ 55136849Sscottl#define IDE_STATUS_ERROR 0x01 /* Error Occurred in Execution */ 56136849Sscottl#define IDE_STATUS_INDEX 0x02 /* is vendor specific */ 57136849Sscottl#define IDE_STATUS_CORRECTED_ERROR 0x04 /* Corrected Data */ 58136849Sscottl#define IDE_STATUS_DRQ 0x08 /* Ready to transfer data */ 59136849Sscottl#define IDE_STATUS_DSC 0x10 /* not defined in ATA-2 */ 60136849Sscottl#define IDE_STATUS_DWF 0x20 /* Device Fault has been detected */ 61136849Sscottl#define IDE_STATUS_DRDY 0x40 /* Device Ready to accept command */ 62136849Sscottl#define IDE_STATUS_IDLE 0x50 /* Device is OK */ 63136849Sscottl#define IDE_STATUS_BUSY 0x80 /* Device Busy, must wait */ 64136849Sscottl 65136849Sscottl 66136849Sscottl#define IDE_ERROR_BAD_BLOCK 0x80 /* Reserved now */ 67136849Sscottl#define IDE_ERROR_DATA_ERROR 0x40 /* Uncorreectable Data Error */ 68136849Sscottl#define IDE_ERROR_MEDIA_CHANGE 0x20 /* Media Changed */ 69136849Sscottl#define IDE_ERROR_ID_NOT_FOUND 0x10 /* ID Not Found */ 70136849Sscottl#define IDE_ERROR_MEDIA_CHANGE_REQ 0x08 /* Media Change Requested */ 71136849Sscottl#define IDE_ERROR_COMMAND_ABORTED 0x04 /* Aborted Command */ 72136849Sscottl#define IDE_ERROR_TRACK0_NOT_FOUND 0x02 /* Track 0 Not Found */ 73136849Sscottl#define IDE_ERROR_ADDRESS_NOT_FOUND 0x01 /* Address Mark Not Found */ 74136849Sscottl 75136849Sscottl 76136849Sscottl#define LBA_MODE 0x40 77136849Sscottl 78136849Sscottl/* 79136849Sscottl * IDE command definitions 80136849Sscottl */ 81136849Sscottl 82136849Sscottl#define IDE_COMMAND_RECALIBRATE 0x10 /* Recalibrate */ 83136849Sscottl#define IDE_COMMAND_READ 0x20 /* Read Sectors with retry */ 84136849Sscottl#define IDE_COMMAND_WRITE 0x30 /* Write Sectors with retry */ 85136849Sscottl#define IDE_COMMAND_VERIFY 0x40 /* Read Verify Sectors with Retry */ 86136849Sscottl#define IDE_COMMAND_SEEK 0x70 /* Seek */ 87136849Sscottl#define IDE_COMMAND_SET_DRIVE_PARAMETER 0x91 /* Initialize Device Parmeters */ 88136849Sscottl#define IDE_COMMAND_GET_MEDIA_STATUS 0xDA 89136849Sscottl#define IDE_COMMAND_DOOR_LOCK 0xDE /* Door Lock */ 90136849Sscottl#define IDE_COMMAND_DOOR_UNLOCK 0xDF /* Door Unlock */ 91136849Sscottl#define IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF /* Set Features */ 92136849Sscottl#define IDE_COMMAND_IDENTIFY 0xEC /* Identify Device */ 93136849Sscottl#define IDE_COMMAND_MEDIA_EJECT 0xED 94136849Sscottl#define IDE_COMMAND_SET_FEATURES 0xEF /* IDE set features command */ 95136849Sscottl 96136849Sscottl#define IDE_COMMAND_FLUSH_CACHE 0xE7 97136849Sscottl#define IDE_COMMAND_STANDBY_IMMEDIATE 0xE0 98136849Sscottl 99136849Sscottl#ifndef NOT_SUPPORT_MULTIPLE 100136849Sscottl#define IDE_COMMAND_READ_MULTIPLE 0xC4 /* Read Multiple */ 101136849Sscottl#define IDE_COMMAND_WRITE_MULTIPLE 0xC5 /* Write Multiple */ 102136849Sscottl#define IDE_COMMAND_SET_MULTIPLE 0xC6 /* Set Multiple Mode */ 103136849Sscottl#endif 104136849Sscottl 105136849Sscottl#ifndef NOT_SUPPORT_DMA 106136849Sscottl#define IDE_COMMAND_DMA_READ 0xc8 /* IDE DMA read command */ 107136849Sscottl#define IDE_COMMAND_DMA_WRITE 0xca /* IDE DMA write command */ 108136849Sscottl#endif 109136849Sscottl 110136849Sscottl#define IDE_COMMAND_READ_DMA_QUEUE 0xc7 /* IDE read DMA queue command */ 111136849Sscottl#define IDE_COMMAND_WRITE_DMA_QUEUE 0xcc /* IDE write DMA queue command */ 112136849Sscottl#define IDE_COMMAND_SERVICE 0xA2 /* IDE service command command */ 113136849Sscottl#define IDE_COMMAND_NOP 0x00 /* IDE NOP command */ 114136849Sscottl#define IDE_STATUS_SRV 0x10 115136849Sscottl#define IDE_RELEASE_BUS 4 116136849Sscottl 117136849Sscottl/*#define IDE_COMMAND_FLUSH_CACHE_EXT */ 118136849Sscottl#define IDE_COMMAND_READ_DMA_EXT 0x25 119136849Sscottl#define IDE_COMMAND_READ_QUEUE_EXT 0x26 120136849Sscottl#define IDE_COMMAND_READ_MULTIPLE_EXT 0x29 121136849Sscottl#define IDE_COMMAND_READ_MAX_ADDR 0x27 122136849Sscottl#define IDE_COMMAND_READ_EXT 0x24 123136849Sscottl#define IDE_COMMAND_VERIFY_EXT 0x42 124136849Sscottl#define IDE_COMMAND_SET_MULTIPLE_EXT 0x37 125136849Sscottl#define IDE_COMMAND_WRITE_DMA_EXT 0x35 126136849Sscottl#define IDE_COMMAND_WRITE_QUEUE_EXT 0x36 127136849Sscottl#define IDE_COMMAND_WRITE_EXT 0x34 128136849Sscottl#define IDE_COMMAND_WRITE_MULTIPLE_EXT 0x39 129136849Sscottl 130136849Sscottl/* 131136849Sscottl * IDE_COMMAND_SET_FEATURES 132136849Sscottl */ 133136849Sscottl#define FT_USE_ULTRA 0x40 /* Set feature for Ultra DMA */ 134136849Sscottl#define FT_USE_MWDMA 0x20 /* Set feature for MW DMA */ 135136849Sscottl#define FT_USE_SWDMA 0x10 /* Set feature for SW DMA */ 136136849Sscottl#define FT_USE_PIO 0x8 /* Set feature for PIO */ 137136849Sscottl#define FT_DISABLE_IORDY 0x10 /* Set feature for disabling IORDY */ 138136849Sscottl 139136849Sscottl/* 140136849Sscottl * S.M.A.R.T. commands 141136849Sscottl */ 142136849Sscottl#define IDE_COMMAND_SMART 0xB0 143136849Sscottl#define SMART_READ_VALUES 0xd0 144136849Sscottl#define SMART_READ_THRESHOLDS 0xd1 145136849Sscottl#define SMART_AUTOSAVE 0xd2 146136849Sscottl#define SMART_SAVE 0xd3 147136849Sscottl#define SMART_IMMEDIATE_OFFLINE 0xd4 148136849Sscottl#define SMART_READ_LOG_SECTOR 0xd5 149136849Sscottl#define SMART_WRITE_LOG_SECTOR 0xd6 150136849Sscottl#define SMART_ENABLE 0xd8 151136849Sscottl#define SMART_DISABLE 0xd9 152136849Sscottl#define SMART_STATUS 0xda 153136849Sscottl#define SMART_AUTO_OFFLINE 0xdb 154136849Sscottl 155136849Sscottl /*************************************************************************** 156136849Sscottl * IDE Control Register File 157136849Sscottl ***************************************************************************/ 158136849Sscottl 159136849Sscottltypedef struct _IDE_REGISTERS_2 { 160136849Sscottl UCHAR AlternateStatus; /* RW: device control port */ 161136849Sscottl} IDE_REGISTERS_2, *PIDE_REGISTERS_2; 162136849Sscottl 163136849Sscottl 164136849Sscottl/* 165136849Sscottl * IDE drive control definitions 166136849Sscottl */ 167136849Sscottl#define IDE_DC_DISABLE_INTERRUPTS 0x02 168136849Sscottl#define IDE_DC_RESET_CONTROLLER 0x04 169136849Sscottl#define IDE_DC_REENABLE_CONTROLLER 0x00 170136849Sscottl 171136849Sscottl/*************************************************************************** 172136849Sscottl * MSNS: Removable device 173136849Sscottl ***************************************************************************/ 174136849Sscottl/* 175136849Sscottl * Media syatus 176136849Sscottl */ 177136849Sscottl#define MSNS_NO_MEDIA 2 178136849Sscottl#define MSNS_MEDIA_CHANGE_REQUEST 8 179136849Sscottl#define MSNS_MIDIA_CHANGE 0x20 180136849Sscottl#define MSNS_WRITE_PROTECT 0x40 181136849Sscottl#define MSNS_READ_PROTECT 0x80 182136849Sscottl 183136849Sscottl/* 184136849Sscottl * IDENTIFY data 185136849Sscottl */ 186136849Sscottltypedef struct _IDENTIFY_DATA { 187136849Sscottl USHORT GeneralConfiguration; /* 00 00 */ 188136849Sscottl USHORT NumberOfCylinders; /* 02 1 */ 189136849Sscottl USHORT Reserved1; /* 04 2 */ 190136849Sscottl USHORT NumberOfHeads; /* 06 3 */ 191136849Sscottl USHORT UnformattedBytesPerTrack; /* 08 4 */ 192136849Sscottl USHORT UnformattedBytesPerSector; /* 0A 5 */ 193136849Sscottl USHORT SectorsPerTrack; /* 0C 6 */ 194136849Sscottl USHORT VendorUnique1[3]; /* 0E 7-9 */ 195136849Sscottl USHORT SerialNumber[10]; /* 14 10-19 */ 196136849Sscottl USHORT BufferType; /* 28 20 */ 197136849Sscottl USHORT BufferSectorSize; /* 2A 21 */ 198136849Sscottl USHORT NumberOfEccBytes; /* 2C 22 */ 199136849Sscottl USHORT FirmwareRevision[4]; /* 2E 23-26 */ 200136849Sscottl USHORT ModelNumber[20]; /* 36 27-46 */ 201136849Sscottl UCHAR MaximumBlockTransfer; /* 5E 47 */ 202136849Sscottl UCHAR VendorUnique2; /* 5F */ 203136849Sscottl USHORT DoubleWordIo; /* 60 48 */ 204136849Sscottl USHORT Capabilities; /* 62 49 */ 205136849Sscottl USHORT Reserved2; /* 64 50 */ 206136849Sscottl UCHAR VendorUnique3; /* 66 51 */ 207136849Sscottl UCHAR PioCycleTimingMode; /* 67 */ 208136849Sscottl UCHAR VendorUnique4; /* 68 52 */ 209136849Sscottl UCHAR DmaCycleTimingMode; /* 69 */ 210136849Sscottl USHORT TranslationFieldsValid; /* 6A 53 */ 211136849Sscottl USHORT NumberOfCurrentCylinders; /* 6C 54 */ 212136849Sscottl USHORT NumberOfCurrentHeads; /* 6E 55 */ 213136849Sscottl USHORT CurrentSectorsPerTrack; /* 70 56 */ 214136849Sscottl ULONG CurrentSectorCapacity; /* 72 57-58 */ 215136849Sscottl USHORT CurrentMultiSectorSetting; /* 76 59 */ 216136849Sscottl ULONG UserAddressableSectors; /* 78 60-61 */ 217136849Sscottl UCHAR SingleWordDMASupport; /* 7C 62 */ 218136849Sscottl UCHAR SingleWordDMAActive; /* 7D */ 219136849Sscottl UCHAR MultiWordDMASupport; /* 7E 63 */ 220136849Sscottl UCHAR MultiWordDMAActive; /* 7F */ 221136849Sscottl UCHAR AdvancedPIOModes; /* 80 64 */ 222136849Sscottl UCHAR Reserved4; /* 81 */ 223136849Sscottl USHORT MinimumMWXferCycleTime; /* 82 65 */ 224136849Sscottl USHORT RecommendedMWXferCycleTime; /* 84 66 */ 225136849Sscottl USHORT MinimumPIOCycleTime; /* 86 67 */ 226136849Sscottl USHORT MinimumPIOCycleTimeIORDY; /* 88 68 */ 227136849Sscottl USHORT Reserved5[2]; /* 8A 69-70 */ 228136849Sscottl USHORT ReleaseTimeOverlapped; /* 8E 71 */ 229136849Sscottl USHORT ReleaseTimeServiceCommand; /* 90 72 */ 230136849Sscottl USHORT MajorRevision; /* 92 73 */ 231136849Sscottl USHORT MinorRevision; /* 94 74 */ 232136849Sscottl USHORT MaxQueueDepth; /* 96 75 */ 233136849Sscottl USHORT SataCapability; /* 76 */ 234136849Sscottl USHORT Reserved6[9]; /* 98 77-85 */ 235136849Sscottl USHORT CommandSupport; /* 86 */ 236136849Sscottl USHORT CommandEnable; /* 87 */ 237136849Sscottl USHORT UtralDmaMode; /* 88 */ 238136849Sscottl USHORT Reserved7[11]; /* 89-99 */ 239136849Sscottl ULONG Lba48BitLow; /* 101-100 */ 240136849Sscottl ULONG Lba48BitHigh; /* 103-102 */ 241136849Sscottl USHORT Reserved8[23]; /* 104-126 */ 242136849Sscottl USHORT SpecialFunctionsEnabled; /* 127 */ 243136849Sscottl USHORT Reserved9[128]; /* 128-255 */ 244136849Sscottl 245136849Sscottl} IDENTIFY_DATA, *PIDENTIFY_DATA; 246136849Sscottl 247136849Sscottltypedef struct _CONFIGURATION_IDENTIFY_DATA { 248136849Sscottl USHORT Revision; 249136849Sscottl USHORT MWDMAModeSupported; 250136849Sscottl USHORT UDMAModeSupported; 251136849Sscottl ULONG MaximumLbaLow; 252136849Sscottl ULONG MaximumLbaHigh; 253136849Sscottl USHORT CommandSupport; 254136849Sscottl USHORT Reserved[247]; 255136849Sscottl UCHAR Signature; /* 0xA5 */ 256136849Sscottl UCHAR CheckSum; 257136849Sscottl} 258136849SscottlCONFIGURATION_IDENTIFY_DATA, *PCONFIGURATION_IDENTIFY_DATA; 259136849Sscottl 260136849Sscottl/* */ 261136849Sscottl/* Identify data without the Reserved4. */ 262136849Sscottl/* */ 263136849Sscottltypedef struct _IDENTIFY_DATA2 { 264136849Sscottl USHORT GeneralConfiguration; /* 00 00 */ 265136849Sscottl USHORT NumberOfCylinders; /* 02 1 */ 266136849Sscottl USHORT Reserved1; /* 04 2 */ 267136849Sscottl USHORT NumberOfHeads; /* 06 3 */ 268136849Sscottl USHORT UnformattedBytesPerTrack; /* 08 4 */ 269136849Sscottl USHORT UnformattedBytesPerSector; /* 0A 5 */ 270136849Sscottl USHORT SectorsPerTrack; /* 0C 6 */ 271136849Sscottl USHORT VendorUnique1[3]; /* 0E 7-9 */ 272136849Sscottl USHORT SerialNumber[10]; /* 14 10-19 */ 273136849Sscottl USHORT BufferType; /* 28 20 */ 274136849Sscottl USHORT BufferSectorSize; /* 2A 21 */ 275136849Sscottl USHORT NumberOfEccBytes; /* 2C 22 */ 276136849Sscottl USHORT FirmwareRevision[4]; /* 2E 23-26 */ 277136849Sscottl USHORT ModelNumber[20]; /* 36 27-46 */ 278136849Sscottl UCHAR MaximumBlockTransfer; /* 5E 47 */ 279136849Sscottl UCHAR VendorUnique2; /* 5F */ 280136849Sscottl USHORT DoubleWordIo; /* 60 48 */ 281136849Sscottl USHORT Capabilities; /* 62 49 */ 282136849Sscottl USHORT Reserved2; /* 64 50 */ 283136849Sscottl UCHAR VendorUnique3; /* 66 51 */ 284136849Sscottl UCHAR PioCycleTimingMode; /* 67 */ 285136849Sscottl UCHAR VendorUnique4; /* 68 52 */ 286136849Sscottl UCHAR DmaCycleTimingMode; /* 69 */ 287136849Sscottl USHORT TranslationFieldsValid; /* 6A 53 */ 288136849Sscottl USHORT NumberOfCurrentCylinders; /* 6C 54 */ 289136849Sscottl USHORT NumberOfCurrentHeads; /* 6E 55 */ 290136849Sscottl USHORT CurrentSectorsPerTrack; /* 70 56 */ 291136849Sscottl ULONG CurrentSectorCapacity; /* 72 57-58 */ 292136849Sscottl USHORT CurrentMultiSectorSetting; /* 59 */ 293136849Sscottl ULONG UserAddressableSectors; /* 60-61 */ 294136849Sscottl UCHAR SingleWordDMASupport; /* 62 */ 295136849Sscottl UCHAR SingleWordDMAActive; 296136849Sscottl UCHAR MultiWordDMASupport; /* 63 */ 297136849Sscottl UCHAR MultiWordDMAActive; 298136849Sscottl UCHAR AdvancedPIOModes; /* 64 */ 299136849Sscottl UCHAR Reserved4; 300136849Sscottl USHORT MinimumMWXferCycleTime; /* 65 */ 301136849Sscottl USHORT RecommendedMWXferCycleTime; /* 66 */ 302136849Sscottl USHORT MinimumPIOCycleTime; /* 67 */ 303136849Sscottl USHORT MinimumPIOCycleTimeIORDY; /* 68 */ 304136849Sscottl USHORT Reserved5[2]; /* 69-70 */ 305136849Sscottl USHORT ReleaseTimeOverlapped; /* 71 */ 306136849Sscottl USHORT ReleaseTimeServiceCommand; /* 72 */ 307136849Sscottl USHORT MajorRevision; /* 73 */ 308136849Sscottl USHORT MinorRevision; /* 74 */ 309136849Sscottl/* USHORT Reserved6[14]; // 75-88 */ 310136849Sscottl} IDENTIFY_DATA2, *PIDENTIFY_DATA2; 311136849Sscottl 312136849Sscottl#define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA2) 313136849Sscottl 314136849Sscottl/* */ 315136849Sscottl/* IDENTIFY DMA timing cycle modes. */ 316136849Sscottl/* */ 317136849Sscottl 318136849Sscottl#define IDENTIFY_DMA_CYCLES_MODE_0 0x00 319136849Sscottl#define IDENTIFY_DMA_CYCLES_MODE_1 0x01 320136849Sscottl#define IDENTIFY_DMA_CYCLES_MODE_2 0x02 321136849Sscottl 322136849Sscottl/* 323136849Sscottl * Mode definitions 324136849Sscottl */ 325136849Sscottltypedef enum _DISK_MODE 326136849Sscottl{ 327136849Sscottl IDE_PIO_0 = 0, 328136849Sscottl IDE_PIO_1, 329136849Sscottl IDE_PIO_2, 330136849Sscottl IDE_PIO_3, 331136849Sscottl IDE_PIO_4, 332136849Sscottl IDE_MWDMA_0, 333136849Sscottl IDE_MWDMA_1, 334136849Sscottl IDE_MWDMA_2, 335136849Sscottl IDE_UDMA_0, 336136849Sscottl IDE_UDMA_1, 337136849Sscottl IDE_UDMA_2, 338136849Sscottl IDE_UDMA_3, 339136849Sscottl IDE_UDMA_4, 340136849Sscottl IDE_UDMA_5, 341136849Sscottl IDE_UDMA_6, 342136849Sscottl IDE_UDMA_7, 343136849Sscottl} DISK_MODE; 344136849Sscottl 345136849Sscottl/*************************************************************************** 346136849Sscottl * IDE Macro 347136849Sscottl ***************************************************************************/ 348136849Sscottl#ifndef MAX_LBA_T 349136849Sscottl#define MAX_LBA_T ((LBA_T)-1) 350136849Sscottl#endif 351136849Sscottl 352136849Sscottl#define SECTOR_TO_BYTE_SHIFT 9 353136849Sscottl#define SECTOR_TO_BYTE(x) ((ULONG)(x) << SECTOR_TO_BYTE_SHIFT) 354136849Sscottl 355136849Sscottl#define mGetStatus(IOPort2) (UCHAR)InPort(&IOPort2->AlternateStatus) 356136849Sscottl#define mUnitControl(IOPort2, Value) OutPort(&IOPort2->AlternateStatus,(UCHAR)(Value)) 357136849Sscottl 358136849Sscottl#define mGetErrorCode(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->Data+1) 359136849Sscottl#define mSetFeaturePort(IOPort,x) OutPort((PUCHAR)&IOPort->Data+1, x) 360136849Sscottl#define mSetBlockCount(IOPort,x) OutPort(&IOPort->BlockCount, x) 361136849Sscottl#define mGetBlockCount(IOPort) (UCHAR)InPort(&IOPort->BlockCount) 362136849Sscottl#define mGetInterruptReason(IOPort) (UCHAR)InPort(&IOPort->BlockCount) 363136849Sscottl#define mSetBlockNumber(IOPort,x) OutPort(&IOPort->BlockNumber, x) 364136849Sscottl#define mGetBlockNumber(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->BlockNumber) 365136849Sscottl#define mGetByteLow(IOPort) (UCHAR)InPort(&IOPort->CylinderLow) 366136849Sscottl#define mSetCylinderLow(IOPort,x) OutPort(&IOPort->CylinderLow, x) 367136849Sscottl#define mGetByteHigh(IOPort) (UCHAR)InPort(&IOPort->CylinderHigh) 368136849Sscottl#define mSetCylinderHigh(IOPort,x) OutPort(&IOPort->CylinderHigh, x) 369136849Sscottl#define mGetBaseStatus(IOPort) (UCHAR)InPort(&IOPort->Command) 370136849Sscottl#ifdef SUPPORT_HPT601 371136849Sscottl#define mSelectUnit(IOPort,UnitId) do {\ 372136849Sscottl OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\ 373136849Sscottl OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\ 374136849Sscottl } while (0) 375136849Sscottl#else 376136849Sscottl#define mSelectUnit(IOPort,UnitId) OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId)) 377136849Sscottl#endif 378136849Sscottl#define mGetUnitNumber(IOPort) InPort(&IOPort->DriveSelect) 379136849Sscottl#define mIssueCommand(IOPort,Cmd) OutPort(&IOPort->Command, (UCHAR)(Cmd)) 380136849Sscottl 381136849Sscottl/* 382136849Sscottl * WDC old disk, don't care right now 383136849Sscottl */ 384136849Sscottl#define WDC_MW1_FIX_FLAG_OFFSET 129 385136849Sscottl#define WDC_MW1_FIX_FLAG_VALUE 0x00005555 386136849Sscottl 387136849Sscottl#pragma pack() 388136849Sscottl#endif 389