if_fxpvar.h revision 45720
129138Sdg/* 229138Sdg * Copyright (c) 1995, David Greenman 329138Sdg * All rights reserved. 429138Sdg * 529138Sdg * Modifications to support NetBSD: 629138Sdg * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 729138Sdg * 829138Sdg * Redistribution and use in source and binary forms, with or without 929138Sdg * modification, are permitted provided that the following conditions 1029138Sdg * are met: 1129138Sdg * 1. Redistributions of source code must retain the above copyright 1229138Sdg * notice unmodified, this list of conditions, and the following 1329138Sdg * disclaimer. 1429138Sdg * 2. Redistributions in binary form must reproduce the above copyright 1529138Sdg * notice, this list of conditions and the following disclaimer in the 1629138Sdg * documentation and/or other materials provided with the distribution. 1729138Sdg * 1829138Sdg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1929138Sdg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2029138Sdg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2129138Sdg * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2229138Sdg * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2329138Sdg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2429138Sdg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2529138Sdg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2629138Sdg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2729138Sdg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2829138Sdg * SUCH DAMAGE. 2929138Sdg * 3045720Speter * $Id: if_fxpvar.h,v 1.6 1998/08/02 00:29:15 dg Exp $ 3129138Sdg */ 3229138Sdg 3329138Sdg/* 3429138Sdg * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast 3529138Sdg * Ethernet driver 3629138Sdg */ 3738006Sdg/* 3838006Sdg * NOTE: Elements are ordered for optimal cacheline behavior, and NOT 3938006Sdg * for functional grouping. 4038006Sdg */ 4129138Sdgstruct fxp_softc { 4229138Sdg#if defined(__NetBSD__) 4329138Sdg struct device sc_dev; /* generic device structures */ 4429138Sdg void *sc_ih; /* interrupt handler cookie */ 4529138Sdg bus_space_tag_t sc_st; /* bus space tag */ 4629138Sdg bus_space_handle_t sc_sh; /* bus space handle */ 4729138Sdg struct ethercom sc_ethercom; /* ethernet common part */ 4829138Sdg#else 4929138Sdg struct arpcom arpcom; /* per-interface network data */ 5029138Sdg caddr_t csr; /* control/status registers */ 5145720Speter struct resource *mem; /* resource descriptor for registers */ 5245720Speter struct resource *irq; /* resource descriptor for interrupt */ 5345720Speter void *ih; /* interrupt handler cookie */ 5429138Sdg#endif /* __NetBSD__ */ 5538006Sdg struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 5638006Sdg struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 5729138Sdg struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 5831447Sdg int tx_queued; /* # of active TxCB's */ 5931447Sdg int need_mcsetup; /* multicast filter needs programming */ 6038006Sdg struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 6129138Sdg struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 6231447Sdg int rx_idle_secs; /* # of seconds RX has been idle */ 6329681Sgibbs struct callout_handle stat_ch; /* Handle for canceling our stat timeout */ 6438006Sdg struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 6531447Sdg struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */ 6631447Sdg int all_mcasts; /* receive all multicasts */ 6738006Sdg struct ifmedia sc_media; /* media information */ 6829138Sdg int phy_primary_addr; /* address of primary PHY */ 6929138Sdg int phy_primary_device; /* device type of primary PHY */ 7029138Sdg int phy_10Mbps_only; /* PHY is 10Mbps-only device */ 7129138Sdg}; 7229138Sdg 7329138Sdg/* Macros to ease CSR access. */ 7429138Sdg#if defined(__NetBSD__) 7529138Sdg#define CSR_READ_1(sc, reg) \ 7629138Sdg bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 7729138Sdg#define CSR_READ_2(sc, reg) \ 7829138Sdg bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 7929138Sdg#define CSR_READ_4(sc, reg) \ 8029138Sdg bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 8129138Sdg#define CSR_WRITE_1(sc, reg, val) \ 8229138Sdg bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 8329138Sdg#define CSR_WRITE_2(sc, reg, val) \ 8429138Sdg bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 8529138Sdg#define CSR_WRITE_4(sc, reg, val) \ 8629138Sdg bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 8729138Sdg#else 8829138Sdg#define CSR_READ_1(sc, reg) \ 8929138Sdg (*((u_int8_t *)((sc)->csr + (reg)))) 9029138Sdg#define CSR_READ_2(sc, reg) \ 9129138Sdg (*((u_int16_t *)((sc)->csr + (reg)))) 9229138Sdg#define CSR_READ_4(sc, reg) \ 9329138Sdg (*((u_int32_t *)((sc)->csr + (reg)))) 9429138Sdg#define CSR_WRITE_1(sc, reg, val) \ 9529138Sdg (*((u_int8_t *)((sc)->csr + (reg)))) = (val) 9629138Sdg#define CSR_WRITE_2(sc, reg, val) \ 9729138Sdg (*((u_int16_t *)((sc)->csr + (reg)))) = (val) 9829138Sdg#define CSR_WRITE_4(sc, reg, val) \ 9929138Sdg (*((u_int32_t *)((sc)->csr + (reg)))) = (val) 10029138Sdg#endif /* __NetBSD__ */ 10129138Sdg 10229138Sdg/* Deal with slight differences in software interfaces. */ 10329138Sdg#if defined(__NetBSD__) 10429138Sdg#define sc_if sc_ethercom.ec_if 10529138Sdg#define FXP_FORMAT "%s" 10629138Sdg#define FXP_ARGS(sc) (sc)->sc_dev.dv_xname 10729138Sdg#define FXP_INTR_TYPE int 10829138Sdg#define FXP_IOCTLCMD_TYPE u_long 10929138Sdg#define FXP_BPFTAP_ARG(ifp) (ifp)->if_bpf 11029138Sdg#else /* __FreeBSD__ */ 11129138Sdg#define sc_if arpcom.ac_if 11229138Sdg#define FXP_FORMAT "fxp%d" 11329138Sdg#define FXP_ARGS(sc) (sc)->arpcom.ac_if.if_unit 11429138Sdg#define FXP_INTR_TYPE void 11536735Sdfr#define FXP_IOCTLCMD_TYPE u_long 11629138Sdg#define FXP_BPFTAP_ARG(ifp) ifp 11729138Sdg#endif /* __NetBSD__ */ 118