if_fe_cbus.c revision 65832
1/* 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 * 22 * $FreeBSD: head/sys/dev/fe/if_fe_cbus.c 65832 2000-09-14 12:02:07Z nyan $ 23 */ 24 25#include "opt_fe.h" 26#include "opt_inet.h" 27#include "opt_ipx.h" 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/sockio.h> 34#include <sys/mbuf.h> 35#include <sys/module.h> 36#include <machine/clock.h> 37 38#include <sys/bus.h> 39#include <machine/bus.h> 40#include <sys/rman.h> 41#include <machine/resource.h> 42 43#include <net/ethernet.h> 44#include <net/if.h> 45#include <net/if_dl.h> 46#include <net/if_mib.h> 47#include <net/if_media.h> 48#include <net/if_types.h> 49 50#include <netinet/in.h> 51#include <netinet/if_ether.h> 52 53#include <net/bpf.h> 54 55#include <i386/isa/ic/mb86960.h> 56#include <dev/fe/if_fereg.h> 57#include <dev/fe/if_fevar.h> 58 59#include <isa/isavar.h> 60 61/* 62 * Cbus specific code. 63 */ 64static int fe_isa_probe(device_t); 65static int fe_isa_attach(device_t); 66 67static device_method_t fe_isa_methods[] = { 68 /* Device interface */ 69 DEVMETHOD(device_probe, fe_isa_probe), 70 DEVMETHOD(device_attach, fe_isa_attach), 71 72 { 0, 0 } 73}; 74 75static driver_t fe_isa_driver = { 76 "fe", 77 fe_isa_methods, 78 sizeof (struct fe_softc) 79}; 80 81DRIVER_MODULE(fe, isa, fe_isa_driver, fe_devclass, 0, 0); 82 83 84static int fe98_alloc_port(device_t, int); 85 86static int fe_probe_re1000(device_t); 87static int fe_probe_cnet9ne(device_t); 88static int fe_probe_rex(device_t); 89static int fe_probe_ssi(device_t); 90static int fe_probe_jli(device_t); 91static int fe_probe_lnx(device_t); 92static int fe_probe_gwy(device_t); 93static int fe_probe_ubn(device_t); 94 95/* 96 * Determine if the device is present at a specified I/O address. The 97 * main entry to the driver. 98 */ 99 100static int 101fe_isa_probe(device_t dev) 102{ 103 struct fe_softc * sc; 104 int error; 105 106 /* Prepare for the softc struct. */ 107 sc = device_get_softc(dev); 108 sc->sc_unit = device_get_unit(dev); 109 110 /* Probe for supported boards. */ 111#ifdef PC98 112 if ((error = fe_probe_re1000(dev)) == 0) 113 goto end; 114 fe_release_resource(dev); 115 116 if ((error = fe_probe_cnet9ne(dev)) == 0) 117 goto end; 118 fe_release_resource(dev); 119 120 if ((error = fe_probe_rex(dev)) == 0) 121 goto end; 122 fe_release_resource(dev); 123#endif 124 125 if ((error = fe_probe_ssi(dev)) == 0) 126 goto end; 127 fe_release_resource(dev); 128 129 if ((error = fe_probe_jli(dev)) == 0) 130 goto end; 131 fe_release_resource(dev); 132 133 if ((error = fe_probe_lnx(dev)) == 0) 134 goto end; 135 fe_release_resource(dev); 136 137 if ((error = fe_probe_ubn(dev)) == 0) 138 goto end; 139 fe_release_resource(dev); 140 141 if ((error = fe_probe_gwy(dev)) == 0) 142 goto end; 143 fe_release_resource(dev); 144 145end: 146 if (error == 0) 147 error = fe_alloc_irq(dev, 0); 148 149 fe_release_resource(dev); 150 return (error); 151} 152 153static int 154fe_isa_attach(device_t dev) 155{ 156 struct fe_softc *sc = device_get_softc(dev); 157 158 if (sc->port_used) 159 fe98_alloc_port(dev, sc->type); 160 fe_alloc_irq(dev, 0); 161 162 return fe_attach(dev); 163} 164 165 166/* Generic I/O address table */ 167static bus_addr_t ioaddr_generic[MAXREGISTERS] = { 168 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 169 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 170 0x010, 0x011, 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 171 0x018, 0x019, 0x01a, 0x01b, 0x01c, 0x01d, 0x01e, 0x01f, 172}; 173 174/* I/O address table for RE1000/1000Plus */ 175static bus_addr_t ioaddr_re1000[MAXREGISTERS] = { 176 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601, 177 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01, 178 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00, 179 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01, 180}; 181 182/* I/O address table for CNET9NE */ 183static bus_addr_t ioaddr_cnet9ne[MAXREGISTERS] = { 184 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 185 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 186 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e, 187 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f, 188}; 189 190/* I/O address table for LAC-98 */ 191static bus_addr_t ioaddr_lnx[MAXREGISTERS] = { 192 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e, 193 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e, 194 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e, 195 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e, 196}; 197 198/* I/O address table for Access/PC N98C+ */ 199static bus_addr_t ioaddr_ubn[MAXREGISTERS] = { 200 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 201 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 202 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207, 203 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f, 204}; 205 206/* I/O address table for REX-9880 */ 207static bus_addr_t ioaddr_rex[MAXREGISTERS] = { 208 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 209 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 210 0x100, 0x101, 0x102, 0x103, 0x104, 0x105, 0x106, 0x107, 211 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 212}; 213 214static int 215fe98_alloc_port(device_t dev, int type) 216{ 217 struct fe_softc *sc = device_get_softc(dev); 218 struct resource *res; 219 bus_addr_t *iat; 220 int size, rid; 221 222 switch (type) { 223 case FE_TYPE_RE1000: 224 iat = ioaddr_re1000; 225 size = MAXREGISTERS; 226 break; 227 case FE_TYPE_CNET9NE: 228 iat = &ioaddr_cnet9ne[16]; 229 size = 16; 230 break; 231 case FE_TYPE_SSI: 232 iat = ioaddr_generic; 233 size = MAXREGISTERS; 234 break; 235 case FE_TYPE_LNX: 236 iat = ioaddr_lnx; 237 size = MAXREGISTERS; 238 break; 239 case FE_TYPE_GWY: 240 iat = ioaddr_generic; 241 size = MAXREGISTERS; 242 break; 243 case FE_TYPE_UBN: 244 iat = ioaddr_ubn; 245 size = MAXREGISTERS; 246 break; 247 case FE_TYPE_REX: 248 iat = ioaddr_rex; 249 size = MAXREGISTERS; 250 break; 251 default: 252 iat = ioaddr_generic; 253 size = MAXREGISTERS; 254 break; 255 } 256 257 rid = 0; 258 res = isa_alloc_resourcev(dev, SYS_RES_IOPORT, &rid, 259 iat, size, RF_ACTIVE); 260 if (res == NULL) 261 return ENOENT; 262 263 switch (type) { 264 case FE_TYPE_CNET9NE: 265 iat = ioaddr_cnet9ne; 266 size = MAXREGISTERS; 267 break; 268 } 269 270 isa_load_resourcev(res, iat, size); 271 272 sc->type = type; 273 sc->port_used = size; 274 sc->port_res = res; 275 sc->iot = rman_get_bustag(res); 276 sc->ioh = rman_get_bushandle(res); 277 return (0); 278} 279 280 281/* 282 * Probe and initialization for Allied-Telesis RE1000 series. 283 */ 284static void 285fe_init_re1000(struct fe_softc *sc) 286{ 287 /* Setup IRQ control register on the ASIC. */ 288 fe_outb(sc, FE_RE1000_IRQCONF, sc->priv_info); 289} 290 291static int 292fe_probe_re1000(device_t dev) 293{ 294 struct fe_softc *sc = device_get_softc(dev); 295 int i, n; 296 u_long iobase, irq; 297 u_char sum; 298 299 static struct fe_simple_probe_struct probe_table [] = { 300 { FE_DLCR2, 0x58, 0x00 }, 301 { FE_DLCR4, 0x08, 0x00 }, 302 { 0 } 303 }; 304 305 /* See if the specified I/O address is possible for RE1000. */ 306 /* [01]D[02468ACE] are allowed. */ 307 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 308 return ENXIO; 309 if ((iobase & ~0x10E) != 0xD0) 310 return ENXIO; 311 312 if (fe98_alloc_port(dev, FE_TYPE_RE1000)) 313 return ENXIO; 314 315 /* Fill the softc struct with default values. */ 316 fe_softc_defaults(sc); 317 318 /* See if the card is on its address. */ 319 if (!fe_simple_probe(sc, probe_table)) 320 return ENXIO; 321 322 /* Get our station address from EEPROM. */ 323 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 324 325 /* Make sure it is Allied-Telesis's. */ 326 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) 327 return ENXIO; 328#if 1 329 /* Calculate checksum. */ 330 sum = fe_inb(sc, 0x1e); 331 for (i = 0; i < ETHER_ADDR_LEN; i++) 332 sum ^= sc->sc_enaddr[i]; 333 if (sum != 0) 334 return ENXIO; 335#endif 336 /* Setup the board type. */ 337 sc->typestr = "RE1000"; 338 339 /* This looks like an RE1000 board. It requires an 340 explicit IRQ setting in config. Make sure we have one, 341 determining an appropriate value for the IRQ control 342 register. */ 343 irq = 0; 344 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 345 switch (irq) { 346 case 3: n = 0x10; break; 347 case 5: n = 0x20; break; 348 case 6: n = 0x40; break; 349 case 12: n = 0x80; break; 350 default: 351 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 352 return ENXIO; 353 } 354 sc->priv_info = (fe_inb(sc, FE_RE1000_IRQCONF) & 0x0f) | n; 355 356 /* Setup hooks. We need a special initialization procedure. */ 357 sc->init = fe_init_re1000; 358 359 return 0; 360} 361 362/* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */ 363static u_short const * 364fe_probe_jli_re1000p(struct fe_softc * sc, u_char const * eeprom) 365{ 366 int i; 367 static u_short const irqmaps_re1000p [4] = { 3, 5, 6, 12 }; 368 369 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */ 370 if (eeprom[1] != 0xFF) return NULL; 371 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL; 372 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL; 373 374 /* Get our station address from EEPROM, and make sure the 375 EEPROM contains Allied-Telesis's address. */ 376 bcopy(eeprom + 8, sc->sc_enaddr, ETHER_ADDR_LEN); 377 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) 378 return NULL; 379 380 /* I don't know any sub-model identification. */ 381 sc->typestr = "RE1000Plus/ME1500"; 382 383 /* Returns the IRQ table for the RE1000Plus. */ 384 return irqmaps_re1000p; 385} 386 387 388/* 389 * Probe for Allied-Telesis RE1000Plus/ME1500 series. 390 */ 391static int 392fe_probe_jli(device_t dev) 393{ 394 struct fe_softc *sc = device_get_softc(dev); 395 int i, n, xirq, error; 396 u_long iobase, irq; 397 u_char eeprom [JLI_EEPROM_SIZE]; 398 u_short const * irqmap; 399 400 static u_short const baseaddr [8] = 401 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 }; 402 static struct fe_simple_probe_struct const probe_table [] = { 403 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */ 404 { FE_DLCR2, 0x50, 0x00 }, 405 { FE_DLCR4, 0x08, 0x00 }, 406 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */ 407#if 0 408 { FE_BMPR16, 0x1B, 0x00 }, 409 { FE_BMPR17, 0x7F, 0x00 }, 410#endif 411 { 0 } 412 }; 413 414 /* 415 * See if the specified address is possible for MB86965A JLI mode. 416 */ 417 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 418 return ENXIO; 419 for (i = 0; i < 8; i++) { 420 if (baseaddr[i] == iobase) 421 break; 422 } 423 if (i == 8) 424 return ENXIO; 425 426 if (fe98_alloc_port(dev, FE_TYPE_RE1000)) 427 return ENXIO; 428 429 /* Fill the softc struct with default values. */ 430 fe_softc_defaults(sc); 431 432 /* 433 * We should test if MB86965A is on the base address now. 434 * Unfortunately, it is very hard to probe it reliably, since 435 * we have no way to reset the chip under software control. 436 * On cold boot, we could check the "signature" bit patterns 437 * described in the Fujitsu document. On warm boot, however, 438 * we can predict almost nothing about register values. 439 */ 440 if (!fe_simple_probe(sc, probe_table)) 441 return ENXIO; 442 443 /* Check if our I/O address matches config info on 86965. */ 444 n = (fe_inb(sc, FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 445 if (baseaddr[n] != iobase) 446 return ENXIO; 447 448 /* 449 * We are now almost sure we have an MB86965 at the given 450 * address. So, read EEPROM through it. We have to write 451 * into LSI registers to read from EEPROM. I want to avoid it 452 * at this stage, but I cannot test the presence of the chip 453 * any further without reading EEPROM. FIXME. 454 */ 455 fe_read_eeprom_jli(sc, eeprom); 456 457 /* Make sure that config info in EEPROM and 86965 agree. */ 458 if (eeprom[FE_EEPROM_CONF] != fe_inb(sc, FE_BMPR19)) 459 return ENXIO; 460 461 /* Use 86965 media selection scheme, unless othewise 462 specified. It is "AUTO always" and "select with BMPR13". 463 This behaviour covers most of the 86965 based board (as 464 minimum requirements.) It is backward compatible with 465 previous versions, also. */ 466 sc->mbitmap = MB_HA; 467 sc->defmedia = MB_HA; 468 sc->msel = fe_msel_965; 469 470 /* Perform board-specific probe. */ 471 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) 472 return ENXIO; 473 474 /* Find the IRQ read from EEPROM. */ 475 n = (fe_inb(sc, FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 476 xirq = irqmap[n]; 477 478 /* Try to determine IRQ setting. */ 479 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 480 if (error && xirq == NO_IRQ) { 481 /* The device must be configured with an explicit IRQ. */ 482 device_printf(dev, "IRQ auto-detection does not work\n"); 483 return ENXIO; 484 } else if (error && xirq != NO_IRQ) { 485 /* Just use the probed IRQ value. */ 486 bus_set_resource(dev, SYS_RES_IRQ, 0, xirq, 1); 487 } else if (!error && xirq == NO_IRQ) { 488 /* No problem. Go ahead. */ 489 } else if (irq == xirq) { 490 /* Good. Go ahead. */ 491 } else { 492 /* User must be warned in this case. */ 493 sc->stability |= UNSTABLE_IRQ; 494 } 495 496 /* Setup a hook, which resets te 86965 when the driver is being 497 initialized. This may solve a nasty bug. FIXME. */ 498 sc->init = fe_init_jli; 499 500 return 0; 501} 502 503 504/* 505 * Probe and initialization for Contec C-NET(9N)E series. 506 */ 507 508/* TODO: Should be in "if_fereg.h" */ 509#define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */ 510 511static void 512fe_init_cnet9ne(struct fe_softc *sc) 513{ 514 /* Enable interrupt? FIXME. */ 515 fe_outb(sc, FE_CNET9NE_INTR, 0x10); 516} 517 518static int 519fe_probe_cnet9ne (device_t dev) 520{ 521 struct fe_softc *sc = device_get_softc(dev); 522 u_long iobase, irq; 523 524 static struct fe_simple_probe_struct probe_table [] = { 525 { FE_DLCR2, 0x58, 0x00 }, 526 { FE_DLCR4, 0x08, 0x00 }, 527 { 0 } 528 }; 529 530 /* See if the specified I/O address is possible for C-NET(9N)E. */ 531 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 532 return ENXIO; 533 if (iobase != 0x73D0) 534 return ENXIO; 535 536 if (fe98_alloc_port(dev, FE_TYPE_CNET9NE)) 537 return ENXIO; 538 539 /* Fill the softc struct with default values. */ 540 fe_softc_defaults(sc); 541 542 /* See if the card is on its address. */ 543 if (!fe_simple_probe(sc, probe_table)) 544 return ENXIO; 545 546 /* Get our station address from EEPROM. */ 547 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 548 549 /* Make sure it is Contec's. */ 550 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) 551 return ENXIO; 552 553 /* Determine the card type. */ 554 if (sc->sc_enaddr[3] == 0x06) { 555 sc->typestr = "C-NET(9N)C"; 556 557 /* We seems to need our own IDENT bits... FIXME. */ 558 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE; 559 560 /* C-NET(9N)C requires an explicit IRQ to work. */ 561 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) { 562 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL); 563 return ENXIO; 564 } 565 } else { 566 sc->typestr = "C-NET(9N)E"; 567 568 /* C-NET(9N)E works only IRQ5. */ 569 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) 570 return ENXIO; 571 if (irq != 5) { 572 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "5"); 573 return ENXIO; 574 } 575 576 /* We need an init hook to initialize ASIC before we start. */ 577 sc->init = fe_init_cnet9ne; 578 } 579 580 /* C-NET(9N)E has 64KB SRAM. */ 581 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB 582 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM; 583 584 return 0; 585} 586 587 588/* 589 * Probe for Contec C-NET(98)P2 series. 590 * (Logitec LAN-98TP/LAN-98T25P - parhaps) 591 */ 592static int 593fe_probe_ssi(device_t dev) 594{ 595 struct fe_softc *sc = device_get_softc(dev); 596 u_long iobase, irq; 597 598 u_char eeprom [SSI_EEPROM_SIZE]; 599 static struct fe_simple_probe_struct probe_table [] = { 600 { FE_DLCR2, 0x08, 0x00 }, 601 { FE_DLCR4, 0x08, 0x00 }, 602 { 0 } 603 }; 604 static u_short const irqmap[] = { 605 /* INT0 INT1 INT2 */ 606 NO_IRQ, NO_IRQ, NO_IRQ, 3, NO_IRQ, 5, 6, NO_IRQ, 607 NO_IRQ, 9, 10, NO_IRQ, 12, 13, NO_IRQ, NO_IRQ, 608 /* INT3 INT41 INT5 INT6 */ 609 }; 610 611 /* See if the specified I/O address is possible for 78Q8377A. */ 612 /* [0-D]3D0 are allowed. */ 613 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 614 return ENXIO; 615 if ((iobase & 0xFFF) != 0x3D0) 616 return ENXIO; 617 618 if (fe98_alloc_port(dev, FE_TYPE_SSI)) 619 return ENXIO; 620 621 /* Fill the softc struct with default values. */ 622 fe_softc_defaults(sc); 623 624 /* See if the card is on its address. */ 625 if (!fe_simple_probe(sc, probe_table)) 626 return ENXIO; 627 628 /* We now have to read the config EEPROM. We should be very 629 careful, since doing so destroys a register. (Remember, we 630 are not yet sure we have a C-NET(98)P2 board here.) Don't 631 remember to select BMPRs bofore reading EEPROM, since other 632 register bank may be selected before the probe() is called. */ 633 fe_read_eeprom_ssi(sc, eeprom); 634 635 /* Make sure the Ethernet (MAC) station address is of Contec's. */ 636 if (!valid_Ether_p(eeprom + FE_SSI_EEP_ADDR, 0x00804C)) 637 return ENXIO; 638 bcopy(eeprom + FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 639 640 /* Setup the board type. */ 641 sc->typestr = "C-NET(98)P2"; 642 643 /* Get IRQ configuration from EEPROM. */ 644 irq = irqmap[eeprom[FE_SSI_EEP_IRQ]]; 645 if (irq == NO_IRQ) { 646 fe_irq_failure(sc->typestr, sc->sc_unit, irq, 647 "3/5/6/9/10/12/13"); 648 return ENXIO; 649 } 650 bus_set_resource(dev, SYS_RES_IRQ, 0, irq, 1); 651 652 /* Get Duplex-mode configuration from EEPROM. */ 653 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC); 654 655 /* Fill softc struct accordingly. */ 656 sc->mbitmap = MB_HT; 657 sc->defmedia = MB_HT; 658 659 return 0; 660} 661 662 663/* 664 * Probe for TDK LAC-98012/013/025/9N011 - parhaps. 665 */ 666static int 667fe_probe_lnx(device_t dev) 668{ 669#ifndef FE_8BIT_SUPPORT 670 device_printf(dev, 671 "skip LAC-98012/013(only 16-bit cards are supported)\n"); 672 return ENXIO; 673#else 674 struct fe_softc *sc = device_get_softc(dev); 675 676 u_long iobase, irq; 677 u_char eeprom [LNX_EEPROM_SIZE]; 678 679 static struct fe_simple_probe_struct probe_table [] = { 680 { FE_DLCR2, 0x58, 0x00 }, 681 { FE_DLCR4, 0x08, 0x00 }, 682 { 0 } 683 }; 684 685 /* See if the specified I/O address is possible for TDK/LANX boards. */ 686 /* 0D0, 4D0, 8D0, and CD0 are allowed. */ 687 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 688 return ENXIO; 689 if ((iobase & ~0xC00) != 0xD0) 690 return ENXIO; 691 692 if (fe98_alloc_port(dev, FE_TYPE_LNX)) 693 return ENXIO; 694 695 /* Fill the softc struct with default values. */ 696 fe_softc_defaults(sc); 697 698 /* See if the card is on its address. */ 699 if (!fe_simple_probe(sc, probe_table)) 700 return ENXIO; 701 702 /* We now have to read the config EEPROM. We should be very 703 careful, since doing so destroys a register. (Remember, we 704 are not yet sure we have a LAC-98012/98013 board here.) */ 705 fe_read_eeprom_lnx(sc, eeprom); 706 707 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */ 708 if (!valid_Ether_p(eeprom, 0x008098)) 709 return ENXIO; 710 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN); 711 712 /* Setup the board type. */ 713 sc->typestr = "LAC-98012/98013"; 714 715 /* This looks like a TDK/LANX board. It requires an 716 explicit IRQ setting in config. Make sure we have one, 717 determining an appropriate value for the IRQ control 718 register. */ 719 irq = 0; 720 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) 721 return ENXIO; 722 switch (irq) { 723 case 3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break; 724 case 5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break; 725 case 6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break; 726 case 12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break; 727 default: 728 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 729 return ENXIO; 730 } 731 732 /* LAC-98's system bus width is 8-bit. */ 733 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB 734 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns; 735 736 /* Setup hooks. We need a special initialization procedure. */ 737 sc->init = fe_init_lnx; 738 739 return 0; 740#endif /* FE_8BIT_SUPPORT */ 741} 742 743 744/* 745 * Probe for Gateway Communications' old cards. 746 * (both as Generic MB86960 probe routine) 747 */ 748static int 749fe_probe_gwy(device_t dev) 750{ 751 struct fe_softc *sc = device_get_softc(dev); 752 753 static struct fe_simple_probe_struct probe_table [] = { 754 /* { FE_DLCR2, 0x70, 0x00 }, */ 755 { FE_DLCR2, 0x58, 0x00 }, 756 { FE_DLCR4, 0x08, 0x00 }, 757 { 0 } 758 }; 759 760 /* 761 * XXX 762 * I'm not sure which address is possible, so accepts any. 763 */ 764 765 if (fe98_alloc_port(dev, FE_TYPE_GWY)) 766 return ENXIO; 767 768 /* Fill the softc struct with default values. */ 769 fe_softc_defaults(sc); 770 771 /* See if the card is on its address. */ 772 if (!fe_simple_probe(sc, probe_table)) 773 return ENXIO; 774 775 /* Get our station address from EEPROM. */ 776 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 777 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) 778 return ENXIO; 779 780 /* Determine the card type. */ 781 sc->typestr = "Generic MB86960 Ethernet"; 782 if (valid_Ether_p(sc->sc_enaddr, 0x000061)) 783 sc->typestr = "Gateway Ethernet (Fujitsu chipset)"; 784 785 /* Gateway's board requires an explicit IRQ to work, since it 786 is not possible to probe the setting of jumpers. */ 787 if (bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0) { 788 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL); 789 return ENXIO; 790 } 791 792 return 0; 793} 794 795 796/* 797 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152). 798 */ 799static int 800fe_probe_ubn(device_t dev) 801{ 802 struct fe_softc *sc = device_get_softc(dev); 803 804 u_char sum, save7; 805 u_long iobase, irq; 806 int i; 807 static struct fe_simple_probe_struct const probe_table [] = { 808 { FE_DLCR2, 0x58, 0x00 }, 809 { FE_DLCR4, 0x08, 0x00 }, 810 { 0 } 811 }; 812 813 /* See if the specified I/O address is possible for Access/PC. */ 814 /* [01][048C]D0 are allowed. */ 815 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 816 return ENXIO; 817 if ((iobase & ~0x1C00) != 0xD0) 818 return ENXIO; 819 820 if (fe98_alloc_port(dev, FE_TYPE_UBN)) 821 return ENXIO; 822 823 /* Fill the softc struct with default values. */ 824 fe_softc_defaults(sc); 825 826 /* Simple probe. */ 827 if (!fe_simple_probe(sc, probe_table)) 828 return ENXIO; 829 830 /* NOTE: Access/NOTE N98 sometimes freeze when reading station 831 address. In case of using it togather with C-NET(9N)C, 832 this problem usually happens. 833 Writing DLCR7 prevents freezing, but I don't know why. FIXME. */ 834 835 /* Save the current value for the DLCR7 register we are about 836 to destroy. */ 837 save7 = fe_inb(sc, FE_DLCR7); 838 fe_outb(sc, FE_DLCR7, 839 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 840 841 /* Get our station address form ID ROM and make sure it is UBN's. */ 842 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 843 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) 844 goto fail_ubn; 845#if 1 846 /* Calculate checksum. */ 847 sum = fe_inb(sc, 0x1e); 848 for (i = 0; i < ETHER_ADDR_LEN; i++) 849 sum ^= sc->sc_enaddr[i]; 850 if (sum != 0) 851 goto fail_ubn; 852#endif 853 854 /* Setup the board type. */ 855 sc->typestr = "Access/PC"; 856 857 /* This looks like an AccessPC/N98C+ board. It requires an 858 explicit IRQ setting in config. Make sure we have one, 859 determining an appropriate value for the IRQ control 860 register. */ 861 irq = 0; 862 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 863 switch (irq) { 864 case 3: sc->priv_info = 0x01; break; 865 case 5: sc->priv_info = 0x02; break; 866 case 6: sc->priv_info = 0x04; break; 867 case 12: sc->priv_info = 0x08; break; 868 default: 869 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 870 goto fail_ubn; 871 } 872 873 /* Setup hooks. We need a special initialization procedure. */ 874 sc->init = fe_init_ubn; 875 876 return 0; 877 878fail_ubn: 879 fe_outb(sc, FE_DLCR7, save7); 880 return ENXIO; 881} 882 883 884/* 885 * REX boards(non-JLI type) support routine. 886 */ 887 888#define REX_EEPROM_SIZE 32 889#define REX_DAT 0x01 890 891static void 892fe_read_eeprom_rex(struct fe_softc *sc, u_char *data) 893{ 894 int i; 895 u_char bit, val; 896 u_char save16; 897 898 save16 = fe_inb(sc, 0x10); 899 900 /* Issue a start condition. */ 901 val = fe_inb(sc, 0x10) & 0xf0; 902 fe_outb(sc, 0x10, val); 903 904 (void) fe_inb(sc, 0x10); 905 (void) fe_inb(sc, 0x10); 906 (void) fe_inb(sc, 0x10); 907 (void) fe_inb(sc, 0x10); 908 909 /* Read bytes from EEPROM. */ 910 for (i = 0; i < REX_EEPROM_SIZE; i++) { 911 /* Read a byte and store it into the buffer. */ 912 val = 0x00; 913 for (bit = 0x01; bit != 0x00; bit <<= 1) 914 if (fe_inb(sc, 0x10) & REX_DAT) 915 val |= bit; 916 *data++ = val; 917 } 918 919 fe_outb(sc, 0x10, save16); 920 921#if 1 922 /* Report what we got. */ 923 if (bootverbose) { 924 data -= REX_EEPROM_SIZE; 925 for (i = 0; i < REX_EEPROM_SIZE; i += 16) { 926 printf("fe%d: EEPROM(REX):%3x: %16D\n", 927 sc->sc_unit, i, data + i, " "); 928 } 929 } 930#endif 931} 932 933 934static void 935fe_init_rex(struct fe_softc *sc) 936{ 937 /* Setup IRQ control register on the ASIC. */ 938 fe_outb(sc, 0x10, sc->priv_info); 939} 940 941/* 942 * Probe for RATOC REX-9880/81/82/83 series. 943 */ 944static int 945fe_probe_rex(device_t dev) 946{ 947 struct fe_softc *sc = device_get_softc(dev); 948 949 int i; 950 u_long iobase, irq; 951 u_char eeprom [REX_EEPROM_SIZE]; 952 953 static struct fe_simple_probe_struct probe_table [] = { 954 { FE_DLCR2, 0x58, 0x00 }, 955 { FE_DLCR4, 0x08, 0x00 }, 956 { 0 } 957 }; 958 959 /* See if the specified I/O address is possible for REX-9880. */ 960 /* 6[46CE]D0 are allowed. */ 961 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 962 return ENXIO; 963 if ((iobase & ~0xA00) != 0x64D0) 964 return ENXIO; 965 966 if (fe98_alloc_port(dev, FE_TYPE_REX)) 967 return ENXIO; 968 969 /* Fill the softc struct with default values. */ 970 fe_softc_defaults(sc); 971 972 /* See if the card is on its address. */ 973 if (!fe_simple_probe(sc, probe_table)) 974 return ENXIO; 975 976 /* We now have to read the config EEPROM. We should be very 977 careful, since doing so destroys a register. (Remember, we 978 are not yet sure we have a REX-9880 board here.) */ 979 fe_read_eeprom_rex(sc, eeprom); 980 for (i = 0; i < ETHER_ADDR_LEN; i++) 981 sc->sc_enaddr[i] = eeprom[7 - i]; 982 983 /* Make sure it is RATOC's. */ 984 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0) && 985 !valid_Ether_p(sc->sc_enaddr, 0x00803D)) 986 return 0; 987 988 /* Setup the board type. */ 989 sc->typestr = "REX-9880/9883"; 990 991 /* This looks like a REX-9880 board. It requires an 992 explicit IRQ setting in config. Make sure we have one, 993 determining an appropriate value for the IRQ control 994 register. */ 995 irq = 0; 996 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 997 switch (irq) { 998 case 3: sc->priv_info = 0x10; break; 999 case 5: sc->priv_info = 0x20; break; 1000 case 6: sc->priv_info = 0x40; break; 1001 case 12: sc->priv_info = 0x80; break; 1002 default: 1003 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 1004 return ENXIO; 1005 } 1006 1007 /* Setup hooks. We need a special initialization procedure. */ 1008 sc->init = fe_init_rex; 1009 1010 /* REX-9880 has 64KB SRAM. */ 1011 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB 1012 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM; 1013#if 1 1014 sc->proto_dlcr7 |= FE_D7_EOPPOL; /* XXX */ 1015#endif 1016 1017 return 0; 1018} 1019