creatorreg.h revision 146480
1119381Sjake/*- 2146480Smarius * Copyright (C) 2000 David S. Miller (davem@redhat.com) 3146480Smarius * 4146480Smarius * Permission is hereby granted, free of charge, to any person obtaining a copy 5146480Smarius * of this software and associated documentation files (the "Software"), to deal 6146480Smarius * in the Software without restriction, including without limitation the rights 7146480Smarius * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8146480Smarius * copies of the Software, and to permit persons to whom the Software is 9146480Smarius * furnished to do so, subject to the following conditions: 10146480Smarius * 11146480Smarius * The above copyright notice and this permission notice shall be included in 12146480Smarius * all copies or substantial portions of the Software. 13146480Smarius * 14146480Smarius * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15146480Smarius * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16146480Smarius * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17146480Smarius * DAVID MILLER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 18146480Smarius * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19146480Smarius * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20146480Smarius * 21146480Smarius * from: XFree86: ffb_dac.h,v 1.1 2000/05/23 04:47:44 dawes Exp 22146480Smarius */ 23146480Smarius/*- 24119381Sjake * Copyright (c) 2003 Jake Burkholder. 25119381Sjake * All rights reserved. 26119381Sjake * 27119381Sjake * Redistribution and use in source and binary forms, with or without 28119381Sjake * modification, are permitted provided that the following conditions 29119381Sjake * are met: 30119381Sjake * 1. Redistributions of source code must retain the above copyright 31119381Sjake * notice, this list of conditions and the following disclaimer. 32119381Sjake * 2. Redistributions in binary form must reproduce the above copyright 33119381Sjake * notice, this list of conditions and the following disclaimer in the 34119381Sjake * documentation and/or other materials provided with the distribution. 35119381Sjake * 36119381Sjake * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 37119381Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 38119381Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 39119381Sjake * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 40119381Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 41119381Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 42119381Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 43119381Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 44119381Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 45119381Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 46119381Sjake * SUCH DAMAGE. 47119381Sjake * 48119381Sjake * $FreeBSD: head/sys/dev/fb/creatorreg.h 146480 2005-05-21 20:38:26Z marius $ 49119381Sjake */ 50119381Sjake 51119381Sjake#ifndef _DEV_FB_CREATOR_H_ 52119381Sjake#define _DEV_FB_CREATOR_H_ 53119381Sjake 54119381Sjake#define FFB_NREG 24 55119381Sjake 56119381Sjake#define FFB_DAC 1 57119381Sjake#define FFB_DAC_TYPE 0x0 58119381Sjake#define FFB_DAC_VALUE 0x4 59119381Sjake#define FFB_DAC_TYPE2 0x8 60119381Sjake#define FFB_DAC_VALUE2 0xc 61119381Sjake 62146480Smarius/* FFB_DAC_TYPE configuration and palette register addresses */ 63146480Smarius#define FFB_DAC_CFG_UCTRL 0x1001 /* User Control */ 64146480Smarius#define FFB_DAC_CFG_TGEN 0x6000 /* Timing Generator Control */ 65146480Smarius#define FFB_DAC_CFG_DID 0x8000 /* Device Identification */ 66146480Smarius 67146480Smarius/* FFB_DAC_CFG_UCTRL register */ 68146480Smarius#define FFB_DAC_UCTRL_IPDISAB 0x0001 /* Input Pullup Resistor Dis. */ 69146480Smarius#define FFB_DAC_UCTRL_ABLANK 0x0002 /* Asynchronous Blank */ 70146480Smarius#define FFB_DAC_UCTRL_DBENAB 0x0004 /* Double-Buffer Enable */ 71146480Smarius#define FFB_DAC_UCTRL_OVENAB 0x0008 /* Overlay Enable */ 72146480Smarius#define FFB_DAC_UCTRL_WMODE 0x0030 /* Window Mode */ 73146480Smarius#define FFB_DAC_UCTRL_WM_COMB 0x0000 /* Window Mode Combined */ 74146480Smarius#define FFB_DAC_UCTRL_WM_S4 0x0010 /* Window Mode Separate 4 */ 75146480Smarius#define FFB_DAC_UCTRL_WM_S8 0x0020 /* Window Mode Separate 8 */ 76146480Smarius#define FFB_DAC_UCTRL_WM_RESV 0x0030 /* Window Mode Reserved */ 77146480Smarius#define FFB_DAC_UCTRL_MANREV 0x0f00 /* Manufacturing Revision */ 78146480Smarius 79146480Smarius/* FFB_DAC_CFG_TGEN register */ 80146480Smarius#define FFB_DAC_CFG_TGEN_VIDE 0x01 /* Video Enable */ 81146480Smarius#define FFB_DAC_CFG_TGEN_TGE 0x02 /* Timing Generator Enable */ 82146480Smarius#define FFB_DAC_CFG_TGEN_HSD 0x04 /* HSYNC* Disable */ 83146480Smarius#define FFB_DAC_CFG_TGEN_VSD 0x08 /* VSYNC* Disable */ 84146480Smarius#define FFB_DAC_CFG_TGEN_EQD 0x10 /* Equalization Disable */ 85146480Smarius#define FFB_DAC_CFG_TGEN_MM 0x20 /* 0 = Slave, 1 = Master */ 86146480Smarius#define FFB_DAC_CFG_TGEN_IM 0x40 /* 1 = Interlaced Mode */ 87146480Smarius 88146480Smarius/* FFB_DAC_CFG_DID register */ 89146480Smarius#define FFB_DAC_CFG_DID_ONE 0x00000001 /* Always Set */ 90146480Smarius#define FFB_DAC_CFG_DID_MANUF 0x00000ffe /* DAC Manufacturer ID */ 91146480Smarius#define FFB_DAC_CFG_DID_PNUM 0x0ffff000 /* DAC Part Number */ 92146480Smarius#define FFB_DAC_CFG_DID_REV 0xf0000000 /* DAC Revision */ 93146480Smarius 94146480Smarius/* FFB_DAC_TYPE2 cursor register addresses */ 95146480Smarius#define FFB_DAC_CUR_BITMAP_P0 0x0 /* Plane 0 Cursor Bitmap */ 96146480Smarius#define FFB_DAC_CUR_BITMAP_P1 0x80 /* Plane 1 Cursor Bitmap */ 97146480Smarius#define FFB_DAC_CUR_CTRL 0x100 /* Cursor Control */ 98146480Smarius#define FFB_DAC_CUR_COLOR0 0x101 /* Cursor Color 0 */ 99146480Smarius#define FFB_DAC_CUR_COLOR1 0x102 /* Cursor Color 1 (bg) */ 100146480Smarius#define FFB_DAC_CUR_COLOR2 0x103 /* Cursor Color 2 (fg) */ 101146480Smarius#define FFB_DAC_CUR_POS 0x104 /* Active Cursor Position */ 102146480Smarius 103146480Smarius/* FFB_DAC_CUR_CTRL register (might be inverted on PAC1 DACs) */ 104146480Smarius#define FFB_DAC_CUR_CTRL_P0 0x1 /* Plane0 Display Disable */ 105146480Smarius#define FFB_DAC_CUR_CTRL_P1 0x2 /* Plane1 Display Disable */ 106146480Smarius 107119381Sjake#define FFB_FBC 2 108119381Sjake#define FFB_FBC_BY 0x60 109119381Sjake#define FFB_FBC_BX 0x64 110119381Sjake#define FFB_FBC_DY 0x68 111119381Sjake#define FFB_FBC_DX 0x6c 112119381Sjake#define FFB_FBC_BH 0x70 113119381Sjake#define FFB_FBC_BW 0x74 114119381Sjake#define FFB_FBC_PPC 0x200 /* Pixel Processor Control */ 115119381Sjake#define FFB_FBC_FG 0x208 /* Foreground */ 116119381Sjake#define FFB_FBC_BG 0x20c /* Background */ 117119381Sjake#define FFB_FBC_FBC 0x254 /* Frame Buffer Control */ 118119381Sjake#define FFB_FBC_ROP 0x258 /* Raster Operation */ 119119381Sjake#define FFB_FBC_PMASK 0x290 /* Pixel Mask */ 120119381Sjake#define FFB_FBC_DRAWOP 0x300 /* Draw Operation */ 121119381Sjake#define FFB_FBC_FONTXY 0x314 /* Font X/Y */ 122119381Sjake#define FFB_FBC_FONTW 0x318 /* Font Width */ 123119381Sjake#define FFB_FBC_FONTINC 0x31c /* Font Increment */ 124119381Sjake#define FFB_FBC_FONT 0x320 /* Font Data */ 125119381Sjake#define FFB_FBC_UCSR 0x900 /* User Control & Status */ 126119381Sjake 127119381Sjake#define FBC_PPC_VCE_DIS 0x00001000 128119381Sjake#define FBC_PPC_APE_DIS 0x00000800 129119381Sjake#define FBC_PPC_TBE_OPAQUE 0x00000200 130119381Sjake#define FBC_PPC_CS_CONST 0x00000003 131119381Sjake 132119381Sjake#define FFB_FBC_WB_A 0x20000000 133119381Sjake#define FFB_FBC_RB_A 0x00004000 134119381Sjake#define FFB_FBC_SB_BOTH 0x00003000 135119381Sjake#define FFB_FBC_XE_OFF 0x00000040 136119381Sjake#define FFB_FBC_RGBE_MASK 0x0000003f 137119381Sjake 138119381Sjake#define FBC_ROP_NEW 0x83 139119381Sjake 140119381Sjake#define FBC_DRAWOP_RECTANGLE 0x08 141119381Sjake 142119381Sjake#define FBC_UCSR_FIFO_OVFL 0x80000000 143119381Sjake#define FBC_UCSR_READ_ERR 0x40000000 144119381Sjake#define FBC_UCSR_RP_BUSY 0x02000000 145119381Sjake#define FBC_UCSR_FB_BUSY 0x01000000 146119381Sjake#define FBC_UCSR_FIFO_MASK 0x00000fff 147119381Sjake 148119381Sjake#define FFB_VIRT_SFB8R 0x00000000 149119381Sjake#define FFB_VIRT_SFB8G 0x00400000 150119381Sjake#define FFB_VIRT_SFB8B 0x00800000 151119381Sjake#define FFB_VIRT_SFB8X 0x00c00000 152119381Sjake#define FFB_VIRT_SFB32 0x01000000 153119381Sjake#define FFB_VIRT_SFB64 0x02000000 154119381Sjake#define FFB_VIRT_FBC 0x04000000 155119381Sjake#define FFB_VIRT_FBC_BM 0x04002000 156119381Sjake#define FFB_VIRT_DFB8R 0x04004000 157119381Sjake#define FFB_VIRT_DFB8G 0x04404000 158119381Sjake#define FFB_VIRT_DFB8B 0x04804000 159119381Sjake#define FFB_VIRT_DFB8X 0x04c04000 160119381Sjake#define FFB_VIRT_DFB24 0x05004000 161119381Sjake#define FFB_VIRT_DFB32 0x06004000 162119381Sjake#define FFB_VIRT_DFB422A 0x07004000 163119381Sjake#define FFB_VIRT_DFB422AD 0x07804000 164119381Sjake#define FFB_VIRT_DFB24B 0x08004000 165119381Sjake#define FFB_VIRT_DFB422B 0x09004000 166119381Sjake#define FFB_VIRT_DFB422BD 0x09804000 167119381Sjake#define FFB_VIRT_SFB16Z 0x0a004000 168119381Sjake#define FFB_VIRT_SFB8Z 0x0a404000 169119381Sjake#define FFB_VIRT_SFB422 0x0ac04000 170119381Sjake#define FFB_VIRT_SFB422D 0x0b404000 171119381Sjake#define FFB_VIRT_FBC_KREG 0x0bc04000 172119381Sjake#define FFB_VIRT_DAC 0x0bc06000 173119381Sjake#define FFB_VIRT_PROM 0x0bc08000 174119381Sjake#define FFB_VIRT_EXP 0x0bc18000 175119381Sjake 176119381Sjake#define FFB_PHYS_SFB8R 0x04000000 177119381Sjake#define FFB_PHYS_SFB8G 0x04400000 178119381Sjake#define FFB_PHYS_SFB8B 0x04800000 179119381Sjake#define FFB_PHYS_SFB8X 0x04c00000 180119381Sjake#define FFB_PHYS_SFB32 0x05000000 181119381Sjake#define FFB_PHYS_SFB64 0x06000000 182119381Sjake#define FFB_PHYS_FBC 0x00600000 183119381Sjake#define FFB_PHYS_FBC_BM 0x00600000 184119381Sjake#define FFB_PHYS_DFB8R 0x01000000 185119381Sjake#define FFB_PHYS_DFB8G 0x01400000 186119381Sjake#define FFB_PHYS_DFB8B 0x01800000 187119381Sjake#define FFB_PHYS_DFB8X 0x01c00000 188119381Sjake#define FFB_PHYS_DFB24 0x02000000 189119381Sjake#define FFB_PHYS_DFB32 0x03000000 190119381Sjake#define FFB_PHYS_DFB422A 0x09000000 191119381Sjake#define FFB_PHYS_DFB422AD 0x09800000 192119381Sjake#define FFB_PHYS_DFB24B 0x0a000000 193119381Sjake#define FFB_PHYS_DFB422B 0x0b000000 194119381Sjake#define FFB_PHYS_DFB422BD 0x0b800000 195119381Sjake#define FFB_PHYS_SFB16Z 0x0c800000 196119381Sjake#define FFB_PHYS_SFB8Z 0x0c000000 197119381Sjake#define FFB_PHYS_SFB422 0x0d000000 198119381Sjake#define FFB_PHYS_SFB422D 0x0d800000 199119381Sjake#define FFB_PHYS_FBC_KREG 0x00610000 200119381Sjake#define FFB_PHYS_DAC 0x00400000 201119381Sjake#define FFB_PHYS_PROM 0x00000000 202119381Sjake#define FFB_PHYS_EXP 0x00200000 203119381Sjake 204119381Sjake#define FFB_READ(sc, reg, off) \ 205119381Sjake bus_space_read_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off)) 206119381Sjake#define FFB_WRITE(sc, reg, off, val) \ 207119381Sjake bus_space_write_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off), (val)) 208119381Sjake 209146480Smarius#define CREATOR_DRIVER_NAME "creator" 210146480Smarius 211119381Sjakestruct creator_softc { 212119381Sjake video_adapter_t sc_va; /* XXX must be first */ 213119381Sjake 214146480Smarius phandle_t sc_node; 215119381Sjake 216146480Smarius struct cdev *sc_si; 217146480Smarius 218146480Smarius int sc_rid[FFB_NREG]; 219119381Sjake struct resource *sc_reg[FFB_NREG]; 220119381Sjake bus_space_tag_t sc_bt[FFB_NREG]; 221119381Sjake bus_space_handle_t sc_bh[FFB_NREG]; 222119381Sjake 223119381Sjake int sc_height; 224119381Sjake int sc_width; 225119381Sjake 226119381Sjake int sc_xmargin; 227119381Sjake int sc_ymargin; 228119381Sjake 229119381Sjake u_char *sc_font; 230119381Sjake 231119381Sjake int sc_bg_cache; 232119381Sjake int sc_fg_cache; 233119381Sjake int sc_fifo_cache; 234146480Smarius 235146480Smarius int sc_flags; 236146480Smarius#define CREATOR_AFB (1 << 0) 237146480Smarius#define CREATOR_CUREN (1 << 1) 238146480Smarius#define CREATOR_CURINV (1 << 2) 239146480Smarius#define CREATOR_PAC1 (1 << 3) 240119381Sjake}; 241119381Sjake 242146480Smarius#endif /* !_DEV_FB_CREATOR_H_ */ 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