mtkswitch_mt7620.h revision 299910
1299910Ssgalabov/*- 2299910Ssgalabov * Copyright (c) 2016 Stanislav Galabov. 3299910Ssgalabov * All rights reserved. 4299910Ssgalabov * 5299910Ssgalabov * Redistribution and use in source and binary forms, with or without 6299910Ssgalabov * modification, are permitted provided that the following conditions 7299910Ssgalabov * are met: 8299910Ssgalabov * 1. Redistributions of source code must retain the above copyright 9299910Ssgalabov * notice, this list of conditions and the following disclaimer. 10299910Ssgalabov * 2. Redistributions in binary form must reproduce the above copyright 11299910Ssgalabov * notice, this list of conditions and the following disclaimer in the 12299910Ssgalabov * documentation and/or other materials provided with the distribution. 13299910Ssgalabov * 14299910Ssgalabov * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15299910Ssgalabov * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16299910Ssgalabov * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17299910Ssgalabov * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18299910Ssgalabov * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19299910Ssgalabov * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20299910Ssgalabov * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21299910Ssgalabov * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22299910Ssgalabov * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23299910Ssgalabov * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24299910Ssgalabov * SUCH DAMAGE. 25299910Ssgalabov * 26299910Ssgalabov * $FreeBSD: head/sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.h 299910 2016-05-16 07:00:49Z sgalabov $ 27299910Ssgalabov */ 28299910Ssgalabov 29299910Ssgalabov#ifndef __MTKSWITCH_MT7620_H__ 30299910Ssgalabov#define __MTKSWITCH_MT7620_H__ 31299910Ssgalabov 32299910Ssgalabov#define MTKSWITCH_ATC 0x0080 33299910Ssgalabov#define ATC_BUSY (1u<<15) 34299910Ssgalabov#define ATC_AC_MAT_NON_STATIC_MACS (4u<<8) 35299910Ssgalabov#define ATC_AC_CMD_CLEAN (2u<<0) 36299910Ssgalabov 37299910Ssgalabov#define MTKSWITCH_VTCR 0x0090 38299910Ssgalabov#define VTCR_BUSY (1u<<31) 39299910Ssgalabov#define VTCR_FUNC_VID_READ (0u<<12) 40299910Ssgalabov#define VTCR_FUNC_VID_WRITE (1u<<12) 41299910Ssgalabov#define VTCR_FUNC_VID_INVALID (2u<<12) 42299910Ssgalabov#define VTCR_FUNC_VID_VALID (3u<<12) 43299910Ssgalabov#define VTCR_IDX_INVALID (1u<<16) 44299910Ssgalabov#define VTCR_VID_MASK 0xfff 45299910Ssgalabov 46299910Ssgalabov#define MTKSWITCH_VAWD1 0x0094 47299910Ssgalabov#define VAWD1_IVL_MAC (1u<<30) 48299910Ssgalabov#define VAWD1_VTAG_EN (1u<<28) 49299910Ssgalabov#define VAWD1_PORT_MEMBER(p) ((1u<<16)<<(p)) 50299910Ssgalabov#define VAWD1_MEMBER_OFF 16 51299910Ssgalabov#define VAWD1_MEMBER_MASK 0xff 52299910Ssgalabov#define VAWD1_FID_OFFSET 1 53299910Ssgalabov#define VAWD1_VALID (1u<<0) 54299910Ssgalabov 55299910Ssgalabov#define MTKSWITCH_VAWD2 0x0098 56299910Ssgalabov#define VAWD2_PORT_UNTAGGED(p) (0u<<((p)*2)) 57299910Ssgalabov#define VAWD2_PORT_TAGGED(p) (2u<<((p)*2)) 58299910Ssgalabov#define VAWD2_PORT_MASK(p) (3u<<((p)*2)) 59299910Ssgalabov 60299910Ssgalabov#define MTKSWITCH_VTIM(v) ((((v) >> 1) * 4) + 0x100) 61299910Ssgalabov#define VTIM_OFF(v) (((v) & 1) ? 12 : 0) 62299910Ssgalabov#define VTIM_MASK 0xfff 63299910Ssgalabov 64299910Ssgalabov#define MTKSWITCH_PIAC 0x7004 65299910Ssgalabov#define PIAC_PHY_ACS_ST (1u<<31) 66299910Ssgalabov#define PIAC_MDIO_REG_ADDR_OFF 25 67299910Ssgalabov#define PIAC_MDIO_PHY_ADDR_OFF 20 68299910Ssgalabov#define PIAC_MDIO_CMD_WRITE (1u<<18) 69299910Ssgalabov#define PIAC_MDIO_CMD_READ (2u<<18) 70299910Ssgalabov#define PIAC_MDIO_ST (1u<<16) 71299910Ssgalabov#define PIAC_MDIO_RW_DATA_MASK 0xffff 72299910Ssgalabov 73299910Ssgalabov#define MTKSWITCH_PORTREG(r, p) ((r) + ((p) * 0x100)) 74299910Ssgalabov 75299910Ssgalabov#define MTKSWITCH_PCR(x) MTKSWITCH_PORTREG(0x2004, (x)) 76299910Ssgalabov#define PCR_PORT_VLAN_SECURE (3u<<0) 77299910Ssgalabov 78299910Ssgalabov#define MTKSWITCH_PVC(x) MTKSWITCH_PORTREG(0x2010, (x)) 79299910Ssgalabov#define PVC_VLAN_ATTR_MASK (3u<<6) 80299910Ssgalabov 81299910Ssgalabov#define MTKSWITCH_PPBV1(x) MTKSWITCH_PORTREG(0x2014, (x)) 82299910Ssgalabov#define MTKSWITCH_PPBV2(x) MTKSWITCH_PORTREG(0x2018, (x)) 83299910Ssgalabov#define PPBV_VID(v) (((v)<<16) | (v)) 84299910Ssgalabov#define PPBV_VID_FROM_REG(x) ((x) & 0xfff) 85299910Ssgalabov#define PPBV_VID_MASK 0xfff 86299910Ssgalabov 87299910Ssgalabov#define MTKSWITCH_PMCR(x) MTKSWITCH_PORTREG(0x3000, (x)) 88299910Ssgalabov#define PMCR_BACKPR_EN (1u<<8) 89299910Ssgalabov#define PMCR_BKOFF_EN (1u<<9) 90299910Ssgalabov#define PMCR_MAC_RX_EN (1u<<13) 91299910Ssgalabov#define PMCR_MAC_TX_EN (1u<<14) 92299910Ssgalabov#define PMCR_IPG_CFG_RND (1u<<18) 93299910Ssgalabov#define PMCR_CFG_DEFAULT (PMCR_BACKPR_EN | PMCR_BKOFF_EN | \ 94299910Ssgalabov PMCR_MAC_RX_EN | PMCR_MAC_TX_EN | PMCR_IPG_CFG_RND) 95299910Ssgalabov 96299910Ssgalabov#define MTKSWITCH_PMSR(x) MTKSWITCH_PORTREG(0x3008, (x)) 97299910Ssgalabov#define PMSR_MAC_LINK_STS (1u<<0) 98299910Ssgalabov#define PMSR_MAC_DPX_STS (1u<<1) 99299910Ssgalabov#define PMSR_MAC_SPD_STS (3u<<2) 100299910Ssgalabov#define PMSR_MAC_SPD(x) (((x)>>2) & 0x3) 101299910Ssgalabov#define PMSR_MAC_SPD_10 0 102299910Ssgalabov#define PMSR_MAC_SPD_100 1 103299910Ssgalabov#define PMSR_MAC_SPD_1000 2 104299910Ssgalabov#define PMSR_TX_FC_STS (1u<<4) 105299910Ssgalabov#define PMSR_RX_FC_STS (1u<<5) 106299910Ssgalabov 107299910Ssgalabov#define MTKSWITCH_REG_ADDR(r) (((r) >> 6) & 0x3ff) 108299910Ssgalabov#define MTKSWITCH_REG_LO(r) (((r) >> 2) & 0xf) 109299910Ssgalabov#define MTKSWITCH_REG_HI(r) (1 << 4) 110299910Ssgalabov#define MTKSWITCH_VAL_LO(v) ((v) & 0xffff) 111299910Ssgalabov#define MTKSWITCH_VAL_HI(v) (((v) >> 16) & 0xffff) 112299910Ssgalabov#define MTKSWITCH_GLOBAL_PHY 31 113299910Ssgalabov#define MTKSWITCH_GLOBAL_REG 31 114299910Ssgalabov 115299910Ssgalabov#define MTKSWITCH_LAN_VID 0x001 116299910Ssgalabov#define MTKSWITCH_WAN_VID 0x002 117299910Ssgalabov#define MTKSWITCH_INVALID_VID 0xfff 118299910Ssgalabov 119299910Ssgalabov#define MTKSWITCH_LAN_FID 1 120299910Ssgalabov#define MTKSWITCH_WAN_FID 2 121299910Ssgalabov 122299910Ssgalabov#endif /* __MTKSWITCH_MT7620_H__ */ 123