if_ep.c revision 295126
1/*- 2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Herb Peyerl. 16 * 4. The name of Herb Peyerl may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: head/sys/dev/ep/if_ep.c 295126 2016-02-01 17:41:21Z glebius $"); 33 34/* 35 * Modified from the FreeBSD 1.1.5.1 version by: 36 * Andres Vega Garcia 37 * INRIA - Sophia Antipolis, France 38 * avega@sophia.inria.fr 39 */ 40 41/* 42 * Promiscuous mode added and interrupt logic slightly changed 43 * to reduce the number of adapter failures. Transceiver select 44 * logic changed to use value from EEPROM. Autoconfiguration 45 * features added. 46 * Done by: 47 * Serge Babkin 48 * Chelindbank (Chelyabinsk, Russia) 49 * babkin@hq.icb.chel.su 50 */ 51 52/* 53 * Pccard support for 3C589 by: 54 * HAMADA Naoki 55 * nao@tom-yam.or.jp 56 */ 57 58/* 59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net> 60 * <mdodd@FreeBSD.org> 61 */ 62 63#include <sys/param.h> 64#include <sys/systm.h> 65#include <sys/kernel.h> 66#include <sys/malloc.h> 67#include <sys/mbuf.h> 68#include <sys/socket.h> 69#include <sys/sockio.h> 70#include <sys/bus.h> 71 72#include <machine/bus.h> 73#include <machine/resource.h> 74#include <sys/rman.h> 75 76#include <net/if.h> 77#include <net/if_var.h> 78#include <net/if_dl.h> 79#include <net/if_media.h> 80#include <net/if_types.h> 81#include <net/ethernet.h> 82#include <net/bpf.h> 83 84#include <dev/ep/if_epreg.h> 85#include <dev/ep/if_epvar.h> 86 87/* Exported variables */ 88devclass_t ep_devclass; 89 90static int ep_media2if_media[] = 91{IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE}; 92 93/* if functions */ 94static void epinit(void *); 95static int epioctl(struct ifnet *, u_long, caddr_t); 96static void epstart(struct ifnet *); 97 98static void ep_intr_locked(struct ep_softc *); 99static void epstart_locked(struct ifnet *); 100static void epinit_locked(struct ep_softc *); 101static void eptick(void *); 102static void epwatchdog(struct ep_softc *); 103 104/* if_media functions */ 105static int ep_ifmedia_upd(struct ifnet *); 106static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *); 107 108static void epstop(struct ep_softc *); 109static void epread(struct ep_softc *); 110static int eeprom_rdy(struct ep_softc *); 111 112#define EP_FTST(sc, f) (sc->stat & (f)) 113#define EP_FSET(sc, f) (sc->stat |= (f)) 114#define EP_FRST(sc, f) (sc->stat &= ~(f)) 115 116static int 117eeprom_rdy(struct ep_softc *sc) 118{ 119 int i; 120 121 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++) 122 DELAY(100); 123 124 if (i >= MAX_EEPROMBUSY) { 125 device_printf(sc->dev, "eeprom failed to come ready.\n"); 126 return (ENXIO); 127 } 128 129 return (0); 130} 131 132/* 133 * get_e: gets a 16 bits word from the EEPROM. we must have set the window 134 * before 135 */ 136int 137ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result) 138{ 139 140 if (eeprom_rdy(sc)) 141 return (ENXIO); 142 143 CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND, 144 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset); 145 146 if (eeprom_rdy(sc)) 147 return (ENXIO); 148 149 (*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA); 150 151 return (0); 152} 153 154static int 155ep_get_macaddr(struct ep_softc *sc, u_char *addr) 156{ 157 int i; 158 uint16_t result; 159 int error; 160 uint16_t *macaddr; 161 162 macaddr = (uint16_t *) addr; 163 164 GO_WINDOW(sc, 0); 165 for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) { 166 error = ep_get_e(sc, i, &result); 167 if (error) 168 return (error); 169 macaddr[i] = htons(result); 170 } 171 return (0); 172} 173 174int 175ep_alloc(device_t dev) 176{ 177 struct ep_softc *sc = device_get_softc(dev); 178 int rid; 179 int error = 0; 180 uint16_t result; 181 182 rid = 0; 183 sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, 184 RF_ACTIVE); 185 if (!sc->iobase) { 186 device_printf(dev, "No I/O space?!\n"); 187 error = ENXIO; 188 goto bad; 189 } 190 rid = 0; 191 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 192 if (!sc->irq) { 193 device_printf(dev, "No irq?!\n"); 194 error = ENXIO; 195 goto bad; 196 } 197 sc->dev = dev; 198 sc->stat = 0; /* 16 bit access */ 199 200 sc->bst = rman_get_bustag(sc->iobase); 201 sc->bsh = rman_get_bushandle(sc->iobase); 202 203 sc->ep_connectors = 0; 204 sc->ep_connector = 0; 205 206 GO_WINDOW(sc, 0); 207 208 error = ep_get_e(sc, EEPROM_PROD_ID, &result); 209 if (error) 210 goto bad; 211 sc->epb.prod_id = result; 212 213 error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result); 214 if (error) 215 goto bad; 216 sc->epb.res_cfg = result; 217 218bad: 219 if (error != 0) 220 ep_free(dev); 221 return (error); 222} 223 224void 225ep_get_media(struct ep_softc *sc) 226{ 227 uint16_t config; 228 229 GO_WINDOW(sc, 0); 230 config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL); 231 if (config & IS_AUI) 232 sc->ep_connectors |= AUI; 233 if (config & IS_BNC) 234 sc->ep_connectors |= BNC; 235 if (config & IS_UTP) 236 sc->ep_connectors |= UTP; 237 238 if (!(sc->ep_connectors & 7)) 239 if (bootverbose) 240 device_printf(sc->dev, "no connectors!\n"); 241 242 /* 243 * This works for most of the cards so we'll do it here. 244 * The cards that require something different can override 245 * this later on. 246 */ 247 sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS; 248} 249 250void 251ep_free(device_t dev) 252{ 253 struct ep_softc *sc = device_get_softc(dev); 254 255 if (sc->ep_intrhand) 256 bus_teardown_intr(dev, sc->irq, sc->ep_intrhand); 257 if (sc->iobase) 258 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase); 259 if (sc->irq) 260 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 261 sc->ep_intrhand = 0; 262 sc->iobase = 0; 263 sc->irq = 0; 264} 265 266static void 267ep_setup_station(struct ep_softc *sc, u_char *enaddr) 268{ 269 int i; 270 271 /* 272 * Setup the station address 273 */ 274 GO_WINDOW(sc, 2); 275 for (i = 0; i < ETHER_ADDR_LEN; i++) 276 CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]); 277} 278 279int 280ep_attach(struct ep_softc *sc) 281{ 282 struct ifnet *ifp = NULL; 283 struct ifmedia *ifm = NULL; 284 int error; 285 286 sc->gone = 0; 287 EP_LOCK_INIT(sc); 288 if (! (sc->stat & F_ENADDR_SKIP)) { 289 error = ep_get_macaddr(sc, sc->eaddr); 290 if (error) { 291 device_printf(sc->dev, "Unable to get MAC address!\n"); 292 EP_LOCK_DESTROY(sc); 293 return (ENXIO); 294 } 295 } 296 ep_setup_station(sc, sc->eaddr); 297 ifp = sc->ifp = if_alloc(IFT_ETHER); 298 if (ifp == NULL) { 299 device_printf(sc->dev, "if_alloc() failed\n"); 300 EP_LOCK_DESTROY(sc); 301 return (ENOSPC); 302 } 303 304 ifp->if_softc = sc; 305 if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev)); 306 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 307 ifp->if_start = epstart; 308 ifp->if_ioctl = epioctl; 309 ifp->if_init = epinit; 310 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 311 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 312 IFQ_SET_READY(&ifp->if_snd); 313 314 callout_init_mtx(&sc->watchdog_timer, &sc->sc_mtx, 0); 315 if (!sc->epb.mii_trans) { 316 ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts); 317 318 if (sc->ep_connectors & AUI) 319 ifmedia_add(&sc->ifmedia, 320 IFM_ETHER | IFM_10_5, 0, NULL); 321 if (sc->ep_connectors & UTP) 322 ifmedia_add(&sc->ifmedia, 323 IFM_ETHER | IFM_10_T, 0, NULL); 324 if (sc->ep_connectors & BNC) 325 ifmedia_add(&sc->ifmedia, 326 IFM_ETHER | IFM_10_2, 0, NULL); 327 if (!sc->ep_connectors) 328 ifmedia_add(&sc->ifmedia, 329 IFM_ETHER | IFM_NONE, 0, NULL); 330 331 ifmedia_set(&sc->ifmedia, 332 IFM_ETHER | ep_media2if_media[sc->ep_connector]); 333 334 ifm = &sc->ifmedia; 335 ifm->ifm_media = ifm->ifm_cur->ifm_media; 336 ep_ifmedia_upd(ifp); 337 } 338 ether_ifattach(ifp, sc->eaddr); 339 340#ifdef EP_LOCAL_STATS 341 sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc = 342 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0; 343#endif 344 EP_FSET(sc, F_RX_FIRST); 345 sc->top = sc->mcur = 0; 346 347 EP_LOCK(sc); 348 epstop(sc); 349 EP_UNLOCK(sc); 350 351 return (0); 352} 353 354int 355ep_detach(device_t dev) 356{ 357 struct ep_softc *sc; 358 struct ifnet *ifp; 359 360 sc = device_get_softc(dev); 361 ifp = sc->ifp; 362 EP_ASSERT_UNLOCKED(sc); 363 EP_LOCK(sc); 364 if (bus_child_present(dev)) 365 epstop(sc); 366 sc->gone = 1; 367 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 368 EP_UNLOCK(sc); 369 ether_ifdetach(ifp); 370 callout_drain(&sc->watchdog_timer); 371 ep_free(dev); 372 373 if_free(ifp); 374 EP_LOCK_DESTROY(sc); 375 376 return (0); 377} 378 379static void 380epinit(void *xsc) 381{ 382 struct ep_softc *sc = xsc; 383 EP_LOCK(sc); 384 epinit_locked(sc); 385 EP_UNLOCK(sc); 386} 387 388/* 389 * The order in here seems important. Otherwise we may not receive 390 * interrupts. ?! 391 */ 392static void 393epinit_locked(struct ep_softc *sc) 394{ 395 struct ifnet *ifp = sc->ifp; 396 int i; 397 398 if (sc->gone) 399 return; 400 401 EP_ASSERT_LOCKED(sc); 402 EP_BUSY_WAIT(sc); 403 404 GO_WINDOW(sc, 0); 405 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 406 GO_WINDOW(sc, 4); 407 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP); 408 GO_WINDOW(sc, 0); 409 410 /* Disable the card */ 411 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0); 412 413 /* Enable the card */ 414 CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ); 415 416 GO_WINDOW(sc, 2); 417 /* Reload the ether_addr. */ 418 ep_setup_station(sc, IF_LLADDR(sc->ifp)); 419 420 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET); 421 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 422 EP_BUSY_WAIT(sc); 423 424 /* Window 1 is operating window */ 425 GO_WINDOW(sc, 1); 426 for (i = 0; i < 31; i++) 427 CSR_READ_1(sc, EP_W1_TX_STATUS); 428 429 /* get rid of stray intr's */ 430 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff); 431 432 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS); 433 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS); 434 435 if (ifp->if_flags & IFF_PROMISC) 436 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL | 437 FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC); 438 else 439 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL | 440 FIL_MULTICAST | FIL_BRDCST); 441 442 if (!sc->epb.mii_trans) 443 ep_ifmedia_upd(ifp); 444 445 if (sc->stat & F_HAS_TX_PLL) 446 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE); 447 CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE); 448 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE); 449 450 ifp->if_drv_flags |= IFF_DRV_RUNNING; 451 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; /* just in case */ 452 453#ifdef EP_LOCAL_STATS 454 sc->rx_no_first = sc->rx_no_mbuf = 455 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0; 456#endif 457 EP_FSET(sc, F_RX_FIRST); 458 if (sc->top) { 459 m_freem(sc->top); 460 sc->top = sc->mcur = 0; 461 } 462 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 463 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16); 464 465 GO_WINDOW(sc, 1); 466 epstart_locked(ifp); 467 callout_reset(&sc->watchdog_timer, hz, eptick, sc); 468} 469 470static void 471epstart(struct ifnet *ifp) 472{ 473 struct ep_softc *sc; 474 sc = ifp->if_softc; 475 EP_LOCK(sc); 476 epstart_locked(ifp); 477 EP_UNLOCK(sc); 478} 479 480static void 481epstart_locked(struct ifnet *ifp) 482{ 483 struct ep_softc *sc; 484 u_int len; 485 struct mbuf *m, *m0; 486 int pad, started; 487 488 sc = ifp->if_softc; 489 if (sc->gone) 490 return; 491 EP_ASSERT_LOCKED(sc); 492 EP_BUSY_WAIT(sc); 493 if (ifp->if_drv_flags & IFF_DRV_OACTIVE) 494 return; 495 started = 0; 496startagain: 497 /* Sneak a peek at the next packet */ 498 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 499 if (m0 == NULL) 500 return; 501 if (!started && (sc->stat & F_HAS_TX_PLL)) 502 CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE); 503 started++; 504 for (len = 0, m = m0; m != NULL; m = m->m_next) 505 len += m->m_len; 506 507 pad = (4 - len) & 3; 508 509 /* 510 * The 3c509 automatically pads short packets to minimum 511 * ethernet length, but we drop packets that are too large. 512 * Perhaps we should truncate them instead? 513 */ 514 if (len + pad > ETHER_MAX_LEN) { 515 /* packet is obviously too large: toss it */ 516 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 517 m_freem(m0); 518 goto readcheck; 519 } 520 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) { 521 /* no room in FIFO */ 522 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4)); 523 /* make sure */ 524 if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) { 525 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 526 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 527 goto done; 528 } 529 } else 530 CSR_WRITE_2(sc, EP_COMMAND, 531 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE); 532 533 /* XXX 4.x and earlier would splhigh here */ 534 535 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len); 536 /* Second dword meaningless */ 537 CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0); 538 539 if (EP_FTST(sc, F_ACCESS_32_BITS)) { 540 for (m = m0; m != NULL; m = m->m_next) { 541 if (m->m_len > 3) 542 CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1, 543 mtod(m, uint32_t *), m->m_len / 4); 544 if (m->m_len & 3) 545 CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1, 546 mtod(m, uint8_t *)+(m->m_len & (~3)), 547 m->m_len & 3); 548 } 549 } else { 550 for (m = m0; m != NULL; m = m->m_next) { 551 if (m->m_len > 1) 552 CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1, 553 mtod(m, uint16_t *), m->m_len / 2); 554 if (m->m_len & 1) 555 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 556 *(mtod(m, uint8_t *)+m->m_len - 1)); 557 } 558 } 559 560 while (pad--) 561 CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */ 562 563 /* XXX and drop splhigh here */ 564 565 BPF_MTAP(ifp, m0); 566 567 sc->tx_timer = 2; 568 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 569 m_freem(m0); 570 571 /* 572 * Is another packet coming in? We don't want to overflow 573 * the tiny RX fifo. 574 */ 575readcheck: 576 if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) { 577 /* 578 * we check if we have packets left, in that case 579 * we prepare to come back later 580 */ 581 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 582 CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8); 583 goto done; 584 } 585 goto startagain; 586done:; 587 return; 588} 589 590void 591ep_intr(void *arg) 592{ 593 struct ep_softc *sc; 594 595 sc = (struct ep_softc *) arg; 596 EP_LOCK(sc); 597 ep_intr_locked(sc); 598 EP_UNLOCK(sc); 599} 600 601static void 602ep_intr_locked(struct ep_softc *sc) 603{ 604 int status; 605 struct ifnet *ifp; 606 607 /* XXX 4.x splbio'd here to reduce interruptability */ 608 609 /* 610 * quick fix: Try to detect an interrupt when the card goes away. 611 */ 612 if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) 613 return; 614 ifp = sc->ifp; 615 616 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */ 617 618rescan: 619 620 while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) { 621 622 /* first acknowledge all interrupt sources */ 623 CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK)); 624 625 if (status & (S_RX_COMPLETE | S_RX_EARLY)) 626 epread(sc); 627 if (status & S_TX_AVAIL) { 628 /* we need ACK */ 629 sc->tx_timer = 0; 630 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 631 GO_WINDOW(sc, 1); 632 CSR_READ_2(sc, EP_W1_FREE_TX); 633 epstart_locked(ifp); 634 } 635 if (status & S_CARD_FAILURE) { 636 sc->tx_timer = 0; 637#ifdef EP_LOCAL_STATS 638 device_printf(sc->dev, "\n\tStatus: %x\n", status); 639 GO_WINDOW(sc, 4); 640 printf("\tFIFO Diagnostic: %x\n", 641 CSR_READ_2(sc, EP_W4_FIFO_DIAG)); 642 printf("\tStat: %x\n", sc->stat); 643 printf("\tIpackets=%d, Opackets=%d\n", 644 ifp->if_get_counter(ifp, IFCOUNTER_IPACKETS), 645 ifp->if_get_counter(ifp, IFCOUNTER_OPACKETS)); 646 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n", 647 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf, 648 sc->rx_overrunl, sc->tx_underrun); 649#else 650 651#ifdef DIAGNOSTIC 652 device_printf(sc->dev, 653 "Status: %x (input buffer overflow)\n", status); 654#else 655 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 656#endif 657 658#endif 659 epinit_locked(sc); 660 return; 661 } 662 if (status & S_TX_COMPLETE) { 663 sc->tx_timer = 0; 664 /* 665 * We need ACK. We do it at the end. 666 * 667 * We need to read TX_STATUS until we get a 668 * 0 status in order to turn off the interrupt flag. 669 */ 670 while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) & 671 TXS_COMPLETE) { 672 if (status & TXS_SUCCES_INTR_REQ) 673 ; /* nothing */ 674 else if (status & 675 (TXS_UNDERRUN | TXS_JABBER | 676 TXS_MAX_COLLISION)) { 677 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 678 if (status & TXS_UNDERRUN) { 679#ifdef EP_LOCAL_STATS 680 sc->tx_underrun++; 681#endif 682 } 683 if (status & TXS_MAX_COLLISION) { 684 /* 685 * TXS_MAX_COLLISION we 686 * shouldn't get here 687 */ 688 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1); 689 } 690 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 691 CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE); 692 /* 693 * To have a tx_avail_int but giving 694 * the chance to the Reception 695 */ 696 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 697 CSR_WRITE_2(sc, EP_COMMAND, 698 SET_TX_AVAIL_THRESH | 8); 699 } 700 /* pops up the next status */ 701 CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0); 702 } /* while */ 703 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 704 GO_WINDOW(sc, 1); 705 CSR_READ_2(sc, EP_W1_FREE_TX); 706 epstart_locked(ifp); 707 } /* end TX_COMPLETE */ 708 } 709 710 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */ 711 712 if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) 713 goto rescan; 714 715 /* re-enable Ints */ 716 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS); 717} 718 719static void 720epread(struct ep_softc *sc) 721{ 722 struct mbuf *top, *mcur, *m; 723 struct ifnet *ifp; 724 int lenthisone; 725 short rx_fifo2, status; 726 short rx_fifo; 727 728/* XXX Must be called with sc locked */ 729 730 ifp = sc->ifp; 731 status = CSR_READ_2(sc, EP_W1_RX_STATUS); 732 733read_again: 734 735 if (status & ERR_RX) { 736 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 737 if (status & ERR_RX_OVERRUN) { 738 /* 739 * We can think the rx latency is actually 740 * greather than we expect 741 */ 742#ifdef EP_LOCAL_STATS 743 if (EP_FTST(sc, F_RX_FIRST)) 744 sc->rx_overrunf++; 745 else 746 sc->rx_overrunl++; 747#endif 748 } 749 goto out; 750 } 751 rx_fifo = rx_fifo2 = status & RX_BYTES_MASK; 752 753 if (EP_FTST(sc, F_RX_FIRST)) { 754 MGETHDR(m, M_NOWAIT, MT_DATA); 755 if (!m) 756 goto out; 757 if (rx_fifo >= MINCLSIZE) 758 MCLGET(m, M_NOWAIT); 759 sc->top = sc->mcur = top = m; 760#define EROUND ((sizeof(struct ether_header) + 3) & ~3) 761#define EOFF (EROUND - sizeof(struct ether_header)) 762 top->m_data += EOFF; 763 764 /* Read what should be the header. */ 765 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1, 766 mtod(top, uint16_t *), sizeof(struct ether_header) / 2); 767 top->m_len = sizeof(struct ether_header); 768 rx_fifo -= sizeof(struct ether_header); 769 sc->cur_len = rx_fifo2; 770 } else { 771 /* come here if we didn't have a complete packet last time */ 772 top = sc->top; 773 m = sc->mcur; 774 sc->cur_len += rx_fifo2; 775 } 776 777 /* Reads what is left in the RX FIFO */ 778 while (rx_fifo > 0) { 779 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m)); 780 if (lenthisone == 0) { /* no room in this one */ 781 mcur = m; 782 MGET(m, M_NOWAIT, MT_DATA); 783 if (!m) 784 goto out; 785 if (rx_fifo >= MINCLSIZE) 786 MCLGET(m, M_NOWAIT); 787 m->m_len = 0; 788 mcur->m_next = m; 789 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m)); 790 } 791 if (EP_FTST(sc, F_ACCESS_32_BITS)) { 792 /* default for EISA configured cards */ 793 CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1, 794 (uint32_t *)(mtod(m, caddr_t)+m->m_len), 795 lenthisone / 4); 796 m->m_len += (lenthisone & ~3); 797 if (lenthisone & 3) 798 CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1, 799 mtod(m, caddr_t)+m->m_len, lenthisone & 3); 800 m->m_len += (lenthisone & 3); 801 } else { 802 CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1, 803 (uint16_t *)(mtod(m, caddr_t)+m->m_len), 804 lenthisone / 2); 805 m->m_len += lenthisone; 806 if (lenthisone & 1) 807 *(mtod(m, caddr_t)+m->m_len - 1) = 808 CSR_READ_1(sc, EP_W1_RX_PIO_RD_1); 809 } 810 rx_fifo -= lenthisone; 811 } 812 813 if (status & ERR_RX_INCOMPLETE) { 814 /* we haven't received the complete packet */ 815 sc->mcur = m; 816#ifdef EP_LOCAL_STATS 817 /* to know how often we come here */ 818 sc->rx_no_first++; 819#endif 820 EP_FRST(sc, F_RX_FIRST); 821 status = CSR_READ_2(sc, EP_W1_RX_STATUS); 822 if (!(status & ERR_RX_INCOMPLETE)) { 823 /* 824 * We see if by now, the packet has completly 825 * arrived 826 */ 827 goto read_again; 828 } 829 CSR_WRITE_2(sc, EP_COMMAND, 830 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH); 831 return; 832 } 833 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 834 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 835 EP_FSET(sc, F_RX_FIRST); 836 top->m_pkthdr.rcvif = sc->ifp; 837 top->m_pkthdr.len = sc->cur_len; 838 839 /* 840 * Drop locks before calling if_input() since it may re-enter 841 * ep_start() in the netisr case. This would result in a 842 * lock reversal. Better performance might be obtained by 843 * chaining all packets received, dropping the lock, and then 844 * calling if_input() on each one. 845 */ 846 EP_UNLOCK(sc); 847 (*ifp->if_input) (ifp, top); 848 EP_LOCK(sc); 849 sc->top = 0; 850 EP_BUSY_WAIT(sc); 851 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 852 return; 853 854out: 855 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 856 if (sc->top) { 857 m_freem(sc->top); 858 sc->top = 0; 859#ifdef EP_LOCAL_STATS 860 sc->rx_no_mbuf++; 861#endif 862 } 863 EP_FSET(sc, F_RX_FIRST); 864 EP_BUSY_WAIT(sc); 865 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH); 866} 867 868static int 869ep_ifmedia_upd(struct ifnet *ifp) 870{ 871 struct ep_softc *sc = ifp->if_softc; 872 int i = 0, j; 873 874 GO_WINDOW(sc, 0); 875 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 876 GO_WINDOW(sc, 4); 877 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP); 878 GO_WINDOW(sc, 0); 879 880 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) { 881 case IFM_10_T: 882 if (sc->ep_connectors & UTP) { 883 i = ACF_CONNECTOR_UTP; 884 GO_WINDOW(sc, 4); 885 CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP); 886 } 887 break; 888 case IFM_10_2: 889 if (sc->ep_connectors & BNC) { 890 i = ACF_CONNECTOR_BNC; 891 CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER); 892 DELAY(DELAY_MULTIPLE * 1000); 893 } 894 break; 895 case IFM_10_5: 896 if (sc->ep_connectors & AUI) 897 i = ACF_CONNECTOR_AUI; 898 break; 899 default: 900 i = sc->ep_connector; 901 device_printf(sc->dev, 902 "strange connector type in EEPROM: assuming AUI\n"); 903 } 904 905 GO_WINDOW(sc, 0); 906 j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff; 907 CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS)); 908 909 return (0); 910} 911 912static void 913ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 914{ 915 struct ep_softc *sc = ifp->if_softc; 916 uint16_t ms; 917 918 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) { 919 case IFM_10_T: 920 GO_WINDOW(sc, 4); 921 ms = CSR_READ_2(sc, EP_W4_MEDIA_TYPE); 922 GO_WINDOW(sc, 0); 923 ifmr->ifm_status = IFM_AVALID; 924 if (ms & MT_LB) { 925 ifmr->ifm_status |= IFM_ACTIVE; 926 ifmr->ifm_active = IFM_ETHER | IFM_10_T; 927 } else { 928 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 929 } 930 break; 931 default: 932 ifmr->ifm_active = sc->ifmedia.ifm_media; 933 break; 934 } 935} 936 937static int 938epioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 939{ 940 struct ep_softc *sc = ifp->if_softc; 941 struct ifreq *ifr = (struct ifreq *) data; 942 int error = 0; 943 944 switch (cmd) { 945 case SIOCSIFFLAGS: 946 EP_LOCK(sc); 947 if (((ifp->if_flags & IFF_UP) == 0) && 948 (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 949 epstop(sc); 950 } else 951 /* reinitialize card on any parameter change */ 952 epinit_locked(sc); 953 EP_UNLOCK(sc); 954 break; 955 case SIOCADDMULTI: 956 case SIOCDELMULTI: 957 /* 958 * The Etherlink III has no programmable multicast 959 * filter. We always initialize the card to be 960 * promiscuous to multicast, since we're always a 961 * member of the ALL-SYSTEMS group, so there's no 962 * need to process SIOC*MULTI requests. 963 */ 964 error = 0; 965 break; 966 case SIOCSIFMEDIA: 967 case SIOCGIFMEDIA: 968 if (!sc->epb.mii_trans) 969 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd); 970 else 971 error = EINVAL; 972 break; 973 default: 974 error = ether_ioctl(ifp, cmd, data); 975 break; 976 } 977 return (error); 978} 979 980static void 981eptick(void *arg) 982{ 983 struct ep_softc *sc; 984 985 sc = arg; 986 if (sc->tx_timer != 0 && --sc->tx_timer == 0) 987 epwatchdog(sc); 988 callout_reset(&sc->watchdog_timer, hz, eptick, sc); 989} 990 991static void 992epwatchdog(struct ep_softc *sc) 993{ 994 struct ifnet *ifp; 995 996 ifp = sc->ifp; 997 if (sc->gone) 998 return; 999 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1000 epstart_locked(ifp); 1001 ep_intr_locked(sc); 1002} 1003 1004static void 1005epstop(struct ep_softc *sc) 1006{ 1007 1008 EP_ASSERT_LOCKED(sc); 1009 1010 CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE); 1011 CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK); 1012 EP_BUSY_WAIT(sc); 1013 1014 CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE); 1015 CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER); 1016 DELAY(800); 1017 1018 CSR_WRITE_2(sc, EP_COMMAND, RX_RESET); 1019 EP_BUSY_WAIT(sc); 1020 CSR_WRITE_2(sc, EP_COMMAND, TX_RESET); 1021 EP_BUSY_WAIT(sc); 1022 1023 CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); 1024 CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK); 1025 CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); 1026 CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER); 1027 1028 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1029 callout_stop(&sc->watchdog_timer); 1030} 1031