if_ed_pccard.c revision 191394
1/*- 2 * Copyright (c) 2005, M. Warner Losh 3 * Copyright (c) 1995, David Greenman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 191394 2009-04-22 16:51:01Z imp $ 29 */ 30 31/* 32 * Notes for adding media support. Each chipset is somewhat different 33 * from the others. Linux has a table of OIDs that it uses to see what 34 * supports the misc register of the NS83903. But a sampling of datasheets 35 * I could dig up on cards I own paints a different picture. 36 * 37 * Chipset specific details: 38 * NS 83903/902A paired 39 * ccr base 0x1020 40 * id register at 0x1000: 7-3 = 0, 2-0 = 1. 41 * (maybe this test is too week) 42 * misc register at 0x018: 43 * 6 WAIT_TOUTENABLE enable watchdog timeout 44 * 3 AUI/TPI 1 AUX, 0 TPI 45 * 2 loopback 46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad 47 * 0 0-no mam, 1 mam connected 48 * 49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II 50 * and the NEC PC9801N-J12 ccr base 0x2000! 51 * 52 * winbond 289c926 53 * ccr base 0xfd0 54 * cfb (am 0xff2): 55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ) 56 * 2 LNKEN 0 - enable link and auto switch, 1 disable 57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0 58 * sr (am 0xff4) 59 * 88 00 88 00 88 00, etc 60 * 61 * TMI tc3299a (cr PHY01 == 0) 62 * ccr base 0x3f8 63 * cra (io 0xa) 64 * crb (io 0xb) 65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI 66 * 2 GDLINK 1 disable checking of link 67 * 6 LINK 0 bad link, 1 good link 68 * 69 * EN5017A, EN5020 no data, but very popular 70 * Other chips? 71 * NetBSD supports RTL8019, but none have surfaced that I can see 72 */ 73 74#include <sys/param.h> 75#include <sys/systm.h> 76#include <sys/socket.h> 77#include <sys/kernel.h> 78#include <sys/conf.h> 79#include <sys/uio.h> 80 81#include <sys/module.h> 82#include <sys/bus.h> 83#include <machine/bus.h> 84#include <sys/rman.h> 85#include <machine/resource.h> 86 87#include <net/ethernet.h> 88#include <net/if.h> 89#include <net/if_arp.h> 90#include <net/if_mib.h> 91#include <net/if_media.h> 92 93#include <dev/ed/if_edreg.h> 94#include <dev/ed/if_edvar.h> 95#include <dev/ed/ax88x90reg.h> 96#include <dev/ed/dl100xxreg.h> 97#include <dev/ed/tc5299jreg.h> 98#include <dev/pccard/pccardvar.h> 99#include <dev/pccard/pccardreg.h> 100#include <dev/pccard/pccard_cis.h> 101#include <dev/mii/mii.h> 102#include <dev/mii/miivar.h> 103 104#include "card_if.h" 105/* "device miibus" required. See GENERIC if you get errors here. */ 106#include "miibus_if.h" 107#include "pccarddevs.h" 108 109/* 110 * NE-2000 based PC Cards have a number of ways to get the MAC address. 111 * Some cards encode this as a FUNCE. Others have this in the ROMs the 112 * same way that ISA cards do. Some have it encoded in the attribute 113 * memory somewhere that isn't in the CIS. Some new chipsets have it 114 * in special registers in the ASIC part of the chip. 115 * 116 * For those cards that have the MAC adress stored in attribute memory 117 * outside of a FUNCE entry in the CIS, nearly all of them have it at 118 * a fixed offset (0xff0). We use that offset as a source of last 119 * resource if other offsets have failed. This is the address of the 120 * National Semiconductor DP83903A, which is the only chip's datasheet 121 * I've found. 122 */ 123#define ED_DEFAULT_MAC_OFFSET 0xff0 124 125static const struct ed_product { 126 struct pccard_product prod; 127 int flags; 128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */ 129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */ 130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */ 131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */ 132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */ 133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */ 134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */ 135 int enoff; 136} ed_pccard_products[] = { 137 { PCMCIA_CARD(ACCTON, EN2212), 0}, 138 { PCMCIA_CARD(ACCTON, EN2216), 0}, 139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0}, 140 { PCMCIA_CARD(AMBICOM, AMB8002), 0}, 141 { PCMCIA_CARD(AMBICOM, AMB8002T), 0}, 142 { PCMCIA_CARD(AMBICOM, AMB8010), 0}, 143 { PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0}, 144 { PCMCIA_CARD(AMBICOM, AMB8610), 0}, 145 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0}, 146 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90}, 147 { PCMCIA_CARD(BILLIONTON, LNT10TB), 0}, 148 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0}, 149 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90}, 150 { PCMCIA_CARD(BROMAX, IPORT), 0}, 151 { PCMCIA_CARD(BROMAX, IPORT2), 0}, 152 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0}, 153 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0}, 154 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90}, 155 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90}, 156 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90}, 157 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0}, 158 { PCMCIA_CARD(CNET, NE2000), 0}, 159 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90}, 160 { PCMCIA_CARD(COMPEX, LANMODEM), 0}, 161 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0}, 162 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0}, 163 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0}, 164 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0}, 165 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0}, 166 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX}, 167 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90}, 168 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX}, 169 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90}, 170 { PCMCIA_CARD(COREGA, LAPCCTXD), 0}, 171 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0}, 172 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0}, 173 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC }, 174 { PCMCIA_CARD(DLINK, DE660), 0 }, 175 { PCMCIA_CARD(DLINK, DE660PLUS), 0}, 176 { PCMCIA_CARD(DYNALINK, L10C), 0}, 177 { PCMCIA_CARD(EDIMAX, EP4000A), 0}, 178 { PCMCIA_CARD(EPSON, EEN10B), 0}, 179 { PCMCIA_CARD(EXP, THINLANCOMBO), 0}, 180 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0}, 181 { PCMCIA_CARD(GREY_CELL, TDK3000), 0}, 182 { PCMCIA_CARD(GREY_CELL, DMF650TX), 183 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM}, 184 { PCMCIA_CARD(GVC, NIC_2000P), 0}, 185 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0}, 186 { PCMCIA_CARD(IBM, INFOMOVER), 0}, 187 { PCMCIA_CARD(IODATA3, PCLAT), 0}, 188 { PCMCIA_CARD(KINGSTON, CIO10T), 0}, 189 { PCMCIA_CARD(KINGSTON, KNE2), 0}, 190 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90}, 191 /* Same ID for many different cards, including generic NE2000 */ 192 { PCMCIA_CARD(LINKSYS, COMBO_ECARD), 193 NE2000DVF_DL100XX | NE2000DVF_AX88X90}, 194 { PCMCIA_CARD(LINKSYS, ECARD_1), 0}, 195 { PCMCIA_CARD(LINKSYS, ECARD_2), 0}, 196 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX}, 197 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0}, 198 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0}, 199 { PCMCIA_CARD(MAGICRAM, ETHER), 0}, 200 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90}, 201 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90}, 202 { PCMCIA_CARD(MELCO2, LPC2_T), 0}, 203 { PCMCIA_CARD(MELCO2, LPC2_TX), 0}, 204 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */ 205 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0}, 206 { PCMCIA_CARD(NDC, ND5100_E), 0}, 207 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX}, 208 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */ 209 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX}, 210 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0}, 211 { PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC}, 212 { PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0}, 213 { PCMCIA_CARD(OEM2, ETHERNET), 0}, 214 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90 }, 215 { PCMCIA_CARD(OEM2, NE2000), 0}, 216 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 }, 217 { PCMCIA_CARD(PREMAX, PE200), 0}, 218 { PCMCIA_CARD(PSION, LANGLOBAL), 219 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM}, 220 { PCMCIA_CARD(RACORE, ETHERNET), 0}, 221 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90}, 222 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J}, 223 { PCMCIA_CARD(RELIA, COMBO), 0}, 224 { PCMCIA_CARD(RIOS, PCCARD3), 0}, 225 { PCMCIA_CARD(RPTI, EP400), 0}, 226 { PCMCIA_CARD(RPTI, EP401), 0}, 227 { PCMCIA_CARD(SMC, EZCARD), 0}, 228 { PCMCIA_CARD(SOCKET, EA_ETHER), 0}, 229 { PCMCIA_CARD(SOCKET, ES_1000), 0}, 230 { PCMCIA_CARD(SOCKET, LP_ETHER), 0}, 231 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0}, 232 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX}, 233 { PCMCIA_CARD(SVEC, COMBOCARD), 0}, 234 { PCMCIA_CARD(SVEC, LANCARD), 0}, 235 { PCMCIA_CARD(TAMARACK, ETHERNET), 0}, 236 { PCMCIA_CARD(TDK, CFE_10), 0}, 237 { PCMCIA_CARD(TDK, LAK_CD031), 0}, 238 { PCMCIA_CARD(TDK, DFL5610WS), 0}, 239 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 }, 240 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90}, 241 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 }, 242 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA}, 243 { PCMCIA_CARD(ZONET, ZEN), 0}, 244 { { NULL } } 245}; 246 247/* 248 * PC Card (PCMCIA) specific code. 249 */ 250static int ed_pccard_probe(device_t); 251static int ed_pccard_attach(device_t); 252static void ed_pccard_tick(void *); 253 254static int ed_pccard_dl100xx(device_t dev, const struct ed_product *); 255static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc); 256static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits); 257static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, 258 int nbits); 259 260static int ed_pccard_ax88x90(device_t dev, const struct ed_product *); 261static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits); 262static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, 263 int nbits); 264 265static int ed_miibus_readreg(device_t dev, int phy, int reg); 266static int ed_ifmedia_upd(struct ifnet *); 267static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *); 268 269static int ed_pccard_tc5299j(device_t dev, const struct ed_product *); 270static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits); 271static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, 272 int nbits); 273 274static void 275ed_pccard_print_entry(const struct ed_product *pp) 276{ 277 int i; 278 279 printf("Product entry: "); 280 if (pp->prod.pp_name) 281 printf("name='%s',", pp->prod.pp_name); 282 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor, 283 pp->prod.pp_product); 284 for (i = 0; i < 4; i++) 285 if (pp->prod.pp_cis[i]) 286 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]); 287 printf("\n"); 288} 289 290static int 291ed_pccard_probe(device_t dev) 292{ 293 const struct ed_product *pp, *pp2; 294 int error, first = 1; 295 uint32_t fcn = PCCARD_FUNCTION_UNSPEC; 296 297 /* Make sure we're a network function */ 298 error = pccard_get_function(dev, &fcn); 299 if (error != 0) 300 return (error); 301 302 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 303 (const struct pccard_product *) ed_pccard_products, 304 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 305 if (pp->prod.pp_name != NULL) 306 device_set_desc(dev, pp->prod.pp_name); 307 /* 308 * Some devices don't ID themselves as network, but 309 * that's OK if the flags say so. 310 */ 311 if (!(pp->flags & NE2000DVF_ANYFUNC) && 312 fcn != PCCARD_FUNCTION_NETWORK) 313 return (ENXIO); 314 /* 315 * Some devices match multiple entries. Report that 316 * as a warning to help cull the table 317 */ 318 pp2 = pp; 319 while ((pp2 = (const struct ed_product *)pccard_product_lookup( 320 dev, (const struct pccard_product *)(pp2 + 1), 321 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 322 if (first) { 323 device_printf(dev, 324 "Warning: card matches multiple entries. Report to imp@freebsd.org\n"); 325 ed_pccard_print_entry(pp); 326 first = 0; 327 } 328 ed_pccard_print_entry(pp2); 329 } 330 331 return (0); 332 } 333 return (ENXIO); 334} 335 336static int 337ed_pccard_rom_mac(device_t dev, uint8_t *enaddr) 338{ 339 struct ed_softc *sc = device_get_softc(dev); 340 uint8_t romdata[32], sum; 341 int i; 342 343 /* 344 * Read in the rom data at location 0. Since there are no 345 * NE-1000 based PC Card devices, we'll assume we're 16-bit. 346 * 347 * In researching what format this takes, I've found that the 348 * following appears to be true for multiple cards based on 349 * observation as well as datasheet digging. 350 * 351 * Data is stored in some ROM and is copied out 8 bits at a time 352 * into 16-bit wide locations. This means that the odd locations 353 * of the ROM are not used (and can be either 0 or ff). 354 * 355 * The contents appears to be as follows: 356 * PROM RAM 357 * Offset Offset What 358 * 0 0 ENETADDR 0 359 * 1 2 ENETADDR 1 360 * 2 4 ENETADDR 2 361 * 3 6 ENETADDR 3 362 * 4 8 ENETADDR 4 363 * 5 10 ENETADDR 5 364 * 6-13 12-26 Reserved (varies by manufacturer) 365 * 14 28 0x57 366 * 15 30 0x57 367 * 368 * Some manufacturers have another image of enetaddr from 369 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but 370 * this doesn't appear to be universally documented in the 371 * datasheets. Some manufactuers have a card type, card config 372 * checksums, etc encoded into PROM offset 6-13, but deciphering it 373 * requires more knowledge about the exact underlying chipset than 374 * we possess (and maybe can possess). 375 */ 376 ed_pio_readmem(sc, 0, romdata, 32); 377 if (bootverbose) 378 device_printf(dev, "ROM DATA: %32D\n", romdata, " "); 379 if (romdata[28] != 0x57 || romdata[30] != 0x57) 380 return (0); 381 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 382 sum |= romdata[i * 2]; 383 if (sum == 0) 384 return (0); 385 for (i = 0; i < ETHER_ADDR_LEN; i++) 386 enaddr[i] = romdata[i * 2]; 387 return (1); 388} 389 390static int 391ed_pccard_add_modem(device_t dev) 392{ 393 device_printf(dev, "Need to write this code\n"); 394 return 0; 395} 396 397static int 398ed_pccard_kick_phy(struct ed_softc *sc) 399{ 400 struct mii_softc *miisc; 401 struct mii_data *mii; 402 403 /* 404 * Many of the PHYs that wind up on PC Cards are weird in 405 * this way. Generally, we don't need to worry so much about 406 * the Isolation protocol since there's only one PHY in 407 * these designs, so this workaround is reasonable. 408 */ 409 mii = device_get_softc(sc->miibus); 410 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 411 miisc->mii_flags |= MIIF_FORCEANEG; 412 mii_phy_reset(miisc); 413 } 414 return (mii_mediachg(mii)); 415} 416 417static int 418ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command) 419{ 420 struct mii_data *mii; 421 422 if (sc->miibus == NULL) 423 return (EINVAL); 424 mii = device_get_softc(sc->miibus); 425 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command)); 426} 427 428 429static void 430ed_pccard_mediachg(struct ed_softc *sc) 431{ 432 struct mii_data *mii; 433 434 if (sc->miibus == NULL) 435 return; 436 mii = device_get_softc(sc->miibus); 437 mii_mediachg(mii); 438} 439 440static int 441ed_pccard_attach(device_t dev) 442{ 443 u_char sum; 444 u_char enaddr[ETHER_ADDR_LEN]; 445 const struct ed_product *pp; 446 int error, i, flags, port_rid, modem_rid; 447 struct ed_softc *sc = device_get_softc(dev); 448 u_long size; 449 static uint16_t *intr_vals[] = {NULL, NULL}; 450 451 sc->dev = dev; 452 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 453 (const struct pccard_product *) ed_pccard_products, 454 sizeof(ed_pccard_products[0]), NULL)) == NULL) { 455 printf("Can't find\n"); 456 return (ENXIO); 457 } 458 modem_rid = port_rid = -1; 459 if (pp->flags & NE2000DVF_MODEM) { 460 for (i = 0; i < 4; i++) { 461 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i); 462 if (size == ED_NOVELL_IO_PORTS) 463 port_rid = i; 464 else if (size == 8) 465 modem_rid = i; 466 } 467 if (port_rid == -1) { 468 device_printf(dev, "Cannot locate my ports!\n"); 469 return (ENXIO); 470 } 471 } else { 472 port_rid = 0; 473 } 474 /* Allocate the port resource during setup. */ 475 error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS); 476 if (error) { 477 printf("alloc_port failed\n"); 478 return (error); 479 } 480 if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) { 481 port_rid++; 482 sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT, 483 &port_rid, 0ul, ~0ul, 1, RF_ACTIVE); 484 if (sc->port_res2 == NULL || 485 rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) { 486 error = ENXIO; 487 goto bad; 488 } 489 } 490 error = ed_alloc_irq(dev, 0, 0); 491 if (error) 492 goto bad; 493 494 /* 495 * Determine which chipset we are. Almost all the PC Card chipsets 496 * have the Novel ASIC and NIC offsets. There's 2 known cards that 497 * follow the WD80x3 conventions, which are handled as a special case. 498 */ 499 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 500 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 501 error = ENXIO; 502 flags = device_get_flags(dev); 503 if (error != 0) 504 error = ed_pccard_dl100xx(dev, pp); 505 if (error != 0) 506 error = ed_pccard_ax88x90(dev, pp); 507 if (error != 0) 508 error = ed_pccard_tc5299j(dev, pp); 509 if (error != 0) { 510 error = ed_probe_Novell_generic(dev, flags); 511 printf("Novell probe generic %d\n", error); 512 } 513 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) { 514 flags |= ED_FLAGS_TOSH_ETHER; 515 flags |= ED_FLAGS_PCCARD; 516 sc->asic_offset = ED_WD_ASIC_OFFSET; 517 sc->nic_offset = ED_WD_NIC_OFFSET; 518 error = ed_probe_WD80x3_generic(dev, flags, intr_vals); 519 } 520 if (error) 521 goto bad; 522 523 /* 524 * There are several ways to get the MAC address for the card. 525 * Some of the above probe routines can fill in the enaddr. If 526 * not, we run through a number of 'well known' locations: 527 * (1) From the PC Card FUNCE 528 * (2) From offset 0 in the shared memory 529 * (3) From a hinted offset in attribute memory 530 * (4) From 0xff0 in attribute memory 531 * If we can't get a non-zero MAC address from this list, we fail. 532 */ 533 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 534 sum |= sc->enaddr[i]; 535 if (sum == 0) { 536 pccard_get_ether(dev, enaddr); 537 if (bootverbose) 538 device_printf(dev, "CIS MAC %6D\n", enaddr, ":"); 539 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 540 sum |= enaddr[i]; 541 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) { 542 if (bootverbose) 543 device_printf(dev, "ROM mac %6D\n", enaddr, 544 ":"); 545 sum++; 546 } 547 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) { 548 for (i = 0; i < ETHER_ADDR_LEN; i++) { 549 pccard_attr_read_1(dev, pp->enoff + i * 2, 550 enaddr + i); 551 sum |= enaddr[i]; 552 } 553 if (bootverbose) 554 device_printf(dev, "Hint %x MAC %6D\n", 555 pp->enoff, enaddr, ":"); 556 } 557 if (sum == 0) { 558 for (i = 0; i < ETHER_ADDR_LEN; i++) { 559 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET + 560 i * 2, enaddr + i); 561 sum |= enaddr[i]; 562 } 563 if (bootverbose) 564 device_printf(dev, "Fallback MAC %6D\n", 565 enaddr, ":"); 566 } 567 if (sum == 0) { 568 device_printf(dev, "Cannot extract MAC address.\n"); 569 ed_release_resources(dev); 570 return (ENXIO); 571 } 572 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN); 573 } 574 575 error = ed_attach(dev); 576 if (error) 577 goto bad; 578 if (sc->chip_type == ED_CHIP_TYPE_DL10019 || 579 sc->chip_type == ED_CHIP_TYPE_DL10022) { 580 /* Probe for an MII bus, but ignore errors. */ 581 ed_pccard_dl100xx_mii_reset(sc); 582 (void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 583 ed_ifmedia_sts); 584 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 || 585 sc->chip_type == ED_CHIP_TYPE_AX88790) { 586 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 587 ed_ifmedia_sts)) != 0) { 588 device_printf(dev, "Missing mii %d!\n", error); 589 goto bad; 590 } 591 592 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) { 593 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 594 ed_ifmedia_sts)) != 0) { 595 device_printf(dev, "Missing mii!\n"); 596 goto bad; 597 } 598 599 } 600 if (sc->miibus != NULL) { 601 sc->sc_tick = ed_pccard_tick; 602 sc->sc_mediachg = ed_pccard_mediachg; 603 sc->sc_media_ioctl = ed_pccard_media_ioctl; 604 ed_pccard_kick_phy(sc); 605 } else { 606 ed_gen_ifmedia_init(sc); 607 } 608 if (modem_rid != -1) 609 ed_pccard_add_modem(dev); 610 611 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 612 NULL, edintr, sc, &sc->irq_handle); 613 if (error) { 614 device_printf(dev, "setup intr failed %d \n", error); 615 goto bad; 616 } 617 618 return (0); 619bad: 620 ed_detach(dev); 621 return (error); 622} 623 624/* 625 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100 626 * and compatible cards (DL10019C Ethernet controller). 627 */ 628static int 629ed_pccard_dl100xx(device_t dev, const struct ed_product *pp) 630{ 631 struct ed_softc *sc = device_get_softc(dev); 632 u_char sum; 633 uint8_t id; 634 u_int memsize; 635 int i, error; 636 637 if (!(pp->flags & NE2000DVF_DL100XX)) 638 return (ENXIO); 639 if (bootverbose) 640 device_printf(dev, "Trying DL100xx probing\n"); 641 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 642 if (bootverbose && error) 643 device_printf(dev, "Novell generic probe failed: %d\n", error); 644 if (error != 0) 645 return (error); 646 647 /* 648 * Linksys registers(offset from ASIC base) 649 * 650 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5) 651 * 0x0A : Card ID Register (CIR) 652 * 0x0B : Check Sum Register (SR) 653 */ 654 for (sum = 0, i = 0x04; i < 0x0c; i++) 655 sum += ed_asic_inb(sc, i); 656 if (sum != 0xff) { 657 if (bootverbose) 658 device_printf(dev, "Bad checksum %#x\n", sum); 659 return (ENXIO); /* invalid DL10019C */ 660 } 661 if (bootverbose) 662 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa)); 663 for (i = 0; i < ETHER_ADDR_LEN; i++) 664 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i); 665 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 666 id = ed_asic_inb(sc, 0xf); 667 sc->isa16bit = 1; 668 /* 669 * Hard code values based on the datasheet. We're NE-2000 compatible 670 * NIC with 24kb of packet memory starting at 24k offset. These 671 * cards also work with 16k at 16k, but don't work with 24k at 16k 672 * or 32k at 16k. 673 */ 674 sc->type = ED_TYPE_NE2000; 675 sc->mem_start = 24 * 1024; 676 memsize = sc->mem_size = 24 * 1024; 677 sc->mem_end = sc->mem_start + memsize; 678 sc->tx_page_start = memsize / ED_PAGE_SIZE; 679 sc->txb_cnt = 3; 680 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 681 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 682 683 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 684 685 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 686 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 687 sc->vendor = ED_VENDOR_NOVELL; 688 sc->chip_type = (id & 0x90) == 0x90 ? 689 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019; 690 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019"; 691 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits; 692 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits; 693 return (0); 694} 695 696/* MII bit-twiddling routines for cards using Dlink chipset */ 697#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 698 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x)) 699#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 700 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x)) 701 702static void 703ed_pccard_dl100xx_mii_reset(struct ed_softc *sc) 704{ 705 if (sc->chip_type != ED_CHIP_TYPE_DL10022) 706 return; 707 708 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 709 DELAY(10); 710 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 711 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 712 DELAY(10); 713 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 714 DELAY(10); 715 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 716 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 717 DELAY(10); 718 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0); 719} 720 721static void 722ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 723{ 724 int i; 725 726 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT); 727 for (i = nbits - 1; i >= 0; i--) { 728 if ((val >> i) & 1) 729 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT); 730 else 731 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT); 732 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 733 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 734 } 735} 736 737static u_int 738ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits) 739{ 740 int i; 741 u_int val = 0; 742 743 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT); 744 for (i = nbits - 1; i >= 0; i--) { 745 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 746 val <<= 1; 747 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN) 748 val++; 749 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 750 } 751 return val; 752} 753 754static void 755ed_pccard_ax88x90_reset(struct ed_softc *sc) 756{ 757 int i; 758 759 /* Reset Card */ 760 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 761 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET)); 762 763 /* Wait for the RST bit to assert, but cap it at 10ms */ 764 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0; 765 i--) 766 continue; 767 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */ 768 if (i == 0) 769 device_printf(sc->dev, "Reset didn't finish\n"); 770} 771 772/* 773 * Probe and vendor-specific initialization routine for ax88x90 boards 774 */ 775static int 776ed_probe_ax88x90_generic(device_t dev, int flags) 777{ 778 struct ed_softc *sc = device_get_softc(dev); 779 u_int memsize; 780 static char test_pattern[32] = "THIS is A memory TEST pattern"; 781 char test_buffer[32]; 782 783 ed_pccard_ax88x90_reset(sc); 784 DELAY(10*1000); 785 786 /* Make sure that we really have an 8390 based board */ 787 if (!ed_probe_generic8390(sc)) 788 return (ENXIO); 789 790 sc->vendor = ED_VENDOR_NOVELL; 791 sc->mem_shared = 0; 792 sc->cr_proto = ED_CR_RD2; 793 794 /* 795 * This prevents packets from being stored in the NIC memory when the 796 * readmem routine turns on the start bit in the CR. We write some 797 * bytes in word mode and verify we can read them back. If we can't 798 * then we don't have an AX88x90 chip here. 799 */ 800 sc->isa16bit = 1; 801 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 802 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 803 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 804 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 805 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) 806 return (ENXIO); 807 808 /* 809 * Hard code values based on the datasheet. We're NE-2000 compatible 810 * NIC with 16kb of packet memory starting at 16k offset. 811 */ 812 sc->type = ED_TYPE_NE2000; 813 memsize = sc->mem_size = 16*1024; 814 sc->mem_start = 16 * 1024; 815 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0) 816 sc->chip_type = ED_CHIP_TYPE_AX88790; 817 else { 818 sc->chip_type = ED_CHIP_TYPE_AX88190; 819 /* 820 * The AX88190 (not A) has external 64k SRAM. Probe for this 821 * here. Most of the cards I have either use the AX88190A 822 * part, or have only 32k SRAM for some reason, so I don't 823 * know if this works or not. 824 */ 825 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern)); 826 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern)); 827 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) { 828 sc->mem_start = 2*1024; 829 memsize = sc->mem_size = 62 * 1024; 830 } 831 } 832 sc->mem_end = sc->mem_start + memsize; 833 sc->tx_page_start = memsize / ED_PAGE_SIZE; 834 if (sc->mem_size > 16 * 1024) 835 sc->txb_cnt = 3; 836 else 837 sc->txb_cnt = 2; 838 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 839 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 840 841 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 842 843 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 844 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 845 846 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */ 847 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN); 848 849 /* clear any pending interrupts that might have occurred above */ 850 ed_nic_outb(sc, ED_P0_ISR, 0xff); 851 sc->sc_write_mbufs = ed_pio_write_mbufs; 852 return (0); 853} 854 855static int 856ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc) 857{ 858 int i, id; 859 860 /* 861 * All AX88x90 devices have MII and a PHY, so we use this to weed out 862 * chips that would otherwise make it through the tests we have after 863 * this point. 864 */ 865 for (i = 0; i < 32; i++) { 866 id = ed_miibus_readreg(dev, i, MII_BMSR); 867 if (id != 0 && id != 0xffff) 868 break; 869 } 870 /* 871 * Found one, we're good. 872 */ 873 if (i != 32) 874 return (0); 875 /* 876 * Didn't find anything, so try to power up and try again. The PHY 877 * may be not responding because we're in power down mode. 878 */ 879 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 880 return (ENXIO); 881 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN); 882 for (i = 0; i < 32; i++) { 883 id = ed_miibus_readreg(dev, i, MII_BMSR); 884 if (id != 0 && id != 0xffff) 885 break; 886 } 887 /* 888 * Still no joy? We're AFU, punt. 889 */ 890 if (i == 32) 891 return (ENXIO); 892 return (0); 893 894} 895 896/* 897 * Special setup for AX88[17]90 898 */ 899static int 900ed_pccard_ax88x90(device_t dev, const struct ed_product *pp) 901{ 902 int error; 903 int iobase; 904 struct ed_softc *sc = device_get_softc(dev); 905 906 if (!(pp->flags & NE2000DVF_AX88X90)) 907 return (ENXIO); 908 909 if (bootverbose) 910 device_printf(dev, "Checking AX88x90\n"); 911 912 /* 913 * Set the IOBASE Register. The AX88x90 cards are potentially 914 * multifunction cards, and thus requires a slight workaround. 915 * We write the address the card is at, on the off chance that this 916 * card is not MFC. 917 * XXX I'm not sure that this is still needed... 918 */ 919 iobase = rman_get_start(sc->port_res); 920 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff); 921 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff); 922 923 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits; 924 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits; 925 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev)); 926 if (error) { 927 if (bootverbose) 928 device_printf(dev, "probe ax88x90 failed %d\n", 929 error); 930 goto fail; 931 } 932 error = ed_pccard_ax88x90_check_mii(dev, sc); 933 if (error) 934 goto fail; 935 sc->vendor = ED_VENDOR_NOVELL; 936 sc->type = ED_TYPE_NE2000; 937 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 938 sc->type_str = "AX88190"; 939 else 940 sc->type_str = "AX88790"; 941 return (0); 942fail:; 943 sc->mii_readbits = 0; 944 sc->mii_writebits = 0; 945 return (error); 946} 947 948static void 949ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 950{ 951 int i, data; 952 953 for (i = nbits - 1; i >= 0; i--) { 954 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0; 955 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data); 956 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK); 957 } 958} 959 960static u_int 961ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits) 962{ 963 int i; 964 u_int val = 0; 965 uint8_t mdio; 966 967 mdio = ED_AX88X90_MII_DIRIN; 968 for (i = nbits - 1; i >= 0; i--) { 969 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio); 970 val <<= 1; 971 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN) 972 val++; 973 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK); 974 } 975 return val; 976} 977 978/* 979 * Special setup for TC5299J 980 */ 981static int 982ed_pccard_tc5299j(device_t dev, const struct ed_product *pp) 983{ 984 int error, i, id; 985 char *ts; 986 struct ed_softc *sc = device_get_softc(dev); 987 988 if (!(pp->flags & NE2000DVF_TC5299J)) 989 return (ENXIO); 990 991 if (bootverbose) 992 device_printf(dev, "Checking Tc5299j\n"); 993 994 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 995 if (bootverbose) 996 device_printf(dev, "probe novel returns %d\n", error); 997 if (error != 0) 998 return (error); 999 1000 /* 1001 * Check to see if we have a MII PHY ID at any address. All TC5299J 1002 * devices have MII and a PHY, so we use this to weed out chips that 1003 * would otherwise make it through the tests we have after this point. 1004 */ 1005 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits; 1006 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits; 1007 for (i = 0; i < 32; i++) { 1008 id = ed_miibus_readreg(dev, i, MII_PHYIDR1); 1009 if (id != 0 && id != 0xffff) 1010 break; 1011 } 1012 if (i == 32) { 1013 sc->mii_readbits = 0; 1014 sc->mii_writebits = 0; 1015 return (ENXIO); 1016 } 1017 ts = "TC5299J"; 1018 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) { 1019 sc->mii_readbits = 0; 1020 sc->mii_writebits = 0; 1021 return (ENXIO); 1022 } 1023 sc->vendor = ED_VENDOR_NOVELL; 1024 sc->type = ED_TYPE_NE2000; 1025 sc->chip_type = ED_CHIP_TYPE_TC5299J; 1026 sc->type_str = ts; 1027 return (0); 1028} 1029 1030static void 1031ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 1032{ 1033 int i; 1034 uint8_t cr, data; 1035 1036 /* Select page 3 */ 1037 cr = ed_nic_inb(sc, ED_P0_CR); 1038 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1039 1040 for (i = nbits - 1; i >= 0; i--) { 1041 data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0; 1042 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data); 1043 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK); 1044 } 1045 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0); 1046 1047 /* Restore prior page */ 1048 ed_nic_outb(sc, ED_P0_CR, cr); 1049} 1050 1051static u_int 1052ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits) 1053{ 1054 int i; 1055 u_int val = 0; 1056 uint8_t cr; 1057 1058 /* Select page 3 */ 1059 cr = ed_nic_inb(sc, ED_P0_CR); 1060 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1061 1062 ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1063 for (i = nbits - 1; i >= 0; i--) { 1064 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 1065 ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT); 1066 val <<= 1; 1067 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN) 1068 val++; 1069 ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1070 } 1071 1072 /* Restore prior page */ 1073 ed_nic_outb(sc, ED_P0_CR, cr); 1074 return val; 1075} 1076 1077/* 1078 * MII bus support routines. 1079 */ 1080static int 1081ed_miibus_readreg(device_t dev, int phy, int reg) 1082{ 1083 struct ed_softc *sc; 1084 int failed, val; 1085 1086 sc = device_get_softc(dev); 1087 /* 1088 * The AX88790 has an interesting quirk. It has an internal phy that 1089 * needs a special bit set to access, but can also have additional 1090 * external PHYs set for things like HomeNET media. When accessing 1091 * the internal PHY, a bit has to be set, when accessing the external 1092 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 1093 * datasheet for more details. 1094 * 1095 * Also, PHYs above 16 appear to be phantoms on some cards, but not 1096 * others. Registers read for this are often the same as prior values 1097 * read. Filter all register requests to 17-31. 1098 * 1099 * I can't explain it, since I don't have the DL100xx data sheets, but 1100 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90 1101 * chips have 14. The linux pcnet and axnet drivers confirm this. 1102 */ 1103 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1104 if (phy > 0x10) 1105 return (0); 1106 if (phy == 0x10) 1107 ed_asic_outb(sc, ED_AX88X90_GPIO, 1108 ED_AX88X90_GPIO_INT_PHY); 1109 else 1110 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1111 } 1112 1113 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1114 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1115 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); 1116 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1117 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1118 if (sc->chip_type == ED_CHIP_TYPE_AX88790 || 1119 sc->chip_type == ED_CHIP_TYPE_AX88190) 1120 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1121 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1122 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); 1123 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1124/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */ 1125 return (failed ? 0 : val); 1126} 1127 1128static int 1129ed_miibus_writereg(device_t dev, int phy, int reg, int data) 1130{ 1131 struct ed_softc *sc; 1132 1133/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */ 1134 sc = device_get_softc(dev); 1135 /* See ed_miibus_readreg for details */ 1136 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1137 if (phy > 0x10) 1138 return (0); 1139 if (phy == 0x10) 1140 ed_asic_outb(sc, ED_AX88X90_GPIO, 1141 ED_AX88X90_GPIO_INT_PHY); 1142 else 1143 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1144 } 1145 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1146 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1147 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS); 1148 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1149 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1150 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS); 1151 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS); 1152 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1153 return (0); 1154} 1155 1156static int 1157ed_ifmedia_upd(struct ifnet *ifp) 1158{ 1159 struct ed_softc *sc; 1160 int error; 1161 1162 sc = ifp->if_softc; 1163 if (sc->miibus == NULL) 1164 return (ENXIO); 1165 ED_LOCK(sc); 1166 error = ed_pccard_kick_phy(sc); 1167 ED_UNLOCK(sc); 1168 return (error); 1169} 1170 1171static void 1172ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1173{ 1174 struct ed_softc *sc; 1175 struct mii_data *mii; 1176 1177 sc = ifp->if_softc; 1178 if (sc->miibus == NULL) 1179 return; 1180 1181 mii = device_get_softc(sc->miibus); 1182 mii_pollstat(mii); 1183 ifmr->ifm_active = mii->mii_media_active; 1184 ifmr->ifm_status = mii->mii_media_status; 1185} 1186 1187static void 1188ed_child_detached(device_t dev, device_t child) 1189{ 1190 struct ed_softc *sc; 1191 1192 sc = device_get_softc(dev); 1193 if (child == sc->miibus) 1194 sc->miibus = NULL; 1195} 1196 1197static void 1198ed_pccard_tick(void *arg) 1199{ 1200 struct ed_softc *sc = arg; 1201 struct mii_data *mii; 1202 int media = 0; 1203 1204 ED_ASSERT_LOCKED(sc); 1205 if (sc->miibus != NULL) { 1206 mii = device_get_softc(sc->miibus); 1207 media = mii->mii_media_status; 1208 mii_tick(mii); 1209 if (mii->mii_media_status & IFM_ACTIVE && 1210 media != mii->mii_media_status) { 1211 if (sc->chip_type == ED_CHIP_TYPE_DL10022) { 1212 ed_asic_outb(sc, ED_DL10022_DIAG, 1213 (mii->mii_media_active & IFM_FDX) ? 1214 ED_DL10022_COLLISON_DIS : 0); 1215#ifdef notyet 1216 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) { 1217 write_asic(sc, ED_DL10019_MAGIC, 1218 (mii->mii_media_active & IFM_FDX) ? 1219 DL19FDUPLX : 0); 1220#endif 1221 } 1222 } 1223 1224 } 1225 callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc); 1226} 1227 1228static device_method_t ed_pccard_methods[] = { 1229 /* Device interface */ 1230 DEVMETHOD(device_probe, ed_pccard_probe), 1231 DEVMETHOD(device_attach, ed_pccard_attach), 1232 DEVMETHOD(device_detach, ed_detach), 1233 1234 /* Bus interface */ 1235 DEVMETHOD(bus_child_detached, ed_child_detached), 1236 1237 /* MII interface */ 1238 DEVMETHOD(miibus_readreg, ed_miibus_readreg), 1239 DEVMETHOD(miibus_writereg, ed_miibus_writereg), 1240 1241 { 0, 0 } 1242}; 1243 1244static driver_t ed_pccard_driver = { 1245 "ed", 1246 ed_pccard_methods, 1247 sizeof(struct ed_softc) 1248}; 1249 1250DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0); 1251DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0); 1252MODULE_DEPEND(ed, miibus, 1, 1, 1); 1253MODULE_DEPEND(ed, ether, 1, 1, 1); 1254