if_ed_pccard.c revision 191233
1/*- 2 * Copyright (c) 2005, M. Warner Losh 3 * Copyright (c) 1995, David Greenman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 191233 2009-04-18 03:02:44Z imp $ 29 */ 30 31/* 32 * Notes for adding media support. Each chipset is somewhat different 33 * from the others. Linux has a table of OIDs that it uses to see what 34 * supports the misc register of the NS83903. But a sampling of datasheets 35 * I could dig up on cards I own paints a different picture. 36 * 37 * Chipset specific details: 38 * NS 83903/902A paired 39 * ccr base 0x1020 40 * id register at 0x1000: 7-3 = 0, 2-0 = 1. 41 * (maybe this test is too week) 42 * misc register at 0x018: 43 * 6 WAIT_TOUTENABLE enable watchdog timeout 44 * 3 AUI/TPI 1 AUX, 0 TPI 45 * 2 loopback 46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad 47 * 0 0-no mam, 1 mam connected 48 * 49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II 50 * and the NEC PC9801N-J12 ccr base 0x2000! 51 * 52 * winbond 289c926 53 * ccr base 0xfd0 54 * cfb (am 0xff2): 55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ) 56 * 2 LNKEN 0 - enable link and auto switch, 1 disable 57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0 58 * sr (am 0xff4) 59 * 88 00 88 00 88 00, etc 60 * 61 * TMI tc3299a (cr PHY01 == 0) 62 * ccr base 0x3f8 63 * cra (io 0xa) 64 * crb (io 0xb) 65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI 66 * 2 GDLINK 1 disable checking of link 67 * 6 LINK 0 bad link, 1 good link 68 * 69 * EN5017A, EN5020 no data, but very popular 70 * Other chips? 71 * NetBSD supports RTL8019, but none have surfaced that I can see 72 */ 73 74#include <sys/param.h> 75#include <sys/systm.h> 76#include <sys/socket.h> 77#include <sys/kernel.h> 78#include <sys/conf.h> 79#include <sys/uio.h> 80 81#include <sys/module.h> 82#include <sys/bus.h> 83#include <machine/bus.h> 84#include <sys/rman.h> 85#include <machine/resource.h> 86 87#include <net/ethernet.h> 88#include <net/if.h> 89#include <net/if_arp.h> 90#include <net/if_mib.h> 91#include <net/if_media.h> 92 93#include <dev/ed/if_edreg.h> 94#include <dev/ed/if_edvar.h> 95#include <dev/ed/ax88x90reg.h> 96#include <dev/ed/dl100xxreg.h> 97#include <dev/ed/tc5299jreg.h> 98#include <dev/pccard/pccardvar.h> 99#include <dev/pccard/pccardreg.h> 100#include <dev/pccard/pccard_cis.h> 101#include <dev/mii/mii.h> 102#include <dev/mii/miivar.h> 103 104#include "card_if.h" 105/* "device miibus" required. See GENERIC if you get errors here. */ 106#include "miibus_if.h" 107#include "pccarddevs.h" 108 109/* 110 * NE-2000 based PC Cards have a number of ways to get the MAC address. 111 * Some cards encode this as a FUNCE. Others have this in the ROMs the 112 * same way that ISA cards do. Some have it encoded in the attribute 113 * memory somewhere that isn't in the CIS. Some new chipsets have it 114 * in special registers in the ASIC part of the chip. 115 * 116 * For those cards that have the MAC adress stored in attribute memory 117 * outside of a FUNCE entry in the CIS, nearly all of them have it at 118 * a fixed offset (0xff0). We use that offset as a source of last 119 * resource if other offsets have failed. This is the address of the 120 * National Semiconductor DP83903A, which is the only chip's datasheet 121 * I've found. 122 */ 123#define ED_DEFAULT_MAC_OFFSET 0xff0 124 125static const struct ed_product { 126 struct pccard_product prod; 127 int flags; 128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */ 129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */ 130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */ 131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */ 132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */ 133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */ 134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */ 135 int enoff; 136} ed_pccard_products[] = { 137 { PCMCIA_CARD(ACCTON, EN2212), 0}, 138 { PCMCIA_CARD(ACCTON, EN2216), 0}, 139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0}, 140 { PCMCIA_CARD(AMBICOM, AMB8002T), 0}, 141 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0}, 142 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90}, 143 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0}, 144 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90}, 145 { PCMCIA_CARD(BROMAX, IPORT), 0}, 146 { PCMCIA_CARD(BROMAX, IPORT2), 0}, 147 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0}, 148 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0}, 149 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90}, 150 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90}, 151 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90}, 152 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0}, 153 { PCMCIA_CARD(CNET, NE2000), 0}, 154 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90}, 155 { PCMCIA_CARD(COMPEX, LANMODEM), 0}, 156 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0}, 157 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0}, 158 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0}, 159 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0}, 160 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0}, 161 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX}, 162 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90}, 163 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX}, 164 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90}, 165 { PCMCIA_CARD(COREGA, LAPCCTXD), 0}, 166 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0}, 167 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0}, 168 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC }, 169 { PCMCIA_CARD(DLINK, DE660), 0 }, 170 { PCMCIA_CARD(DLINK, DE660PLUS), 0}, 171 { PCMCIA_CARD(DYNALINK, L10C), 0}, 172 { PCMCIA_CARD(EDIMAX, EP4000A), 0}, 173 { PCMCIA_CARD(EPSON, EEN10B), 0}, 174 { PCMCIA_CARD(EXP, THINLANCOMBO), 0}, 175 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0}, 176 { PCMCIA_CARD(GREY_CELL, TDK3000), 0}, 177 { PCMCIA_CARD(GREY_CELL, DMF650TX), 178 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM}, 179 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0}, 180 { PCMCIA_CARD(IBM, INFOMOVER), 0}, 181 { PCMCIA_CARD(IODATA3, PCLAT), 0}, 182 { PCMCIA_CARD(KINGSTON, CIO10T), 0}, 183 { PCMCIA_CARD(KINGSTON, KNE2), 0}, 184 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90}, 185 /* Same ID for many different cards, including generic NE2000 */ 186 { PCMCIA_CARD(LINKSYS, COMBO_ECARD), 187 NE2000DVF_DL100XX | NE2000DVF_AX88X90}, 188 { PCMCIA_CARD(LINKSYS, ECARD_1), 0}, 189 { PCMCIA_CARD(LINKSYS, ECARD_2), 0}, 190 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX}, 191 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0}, 192 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0}, 193 { PCMCIA_CARD(MAGICRAM, ETHER), 0}, 194 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90}, 195 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90}, 196 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */ 197 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0}, 198 { PCMCIA_CARD(NDC, ND5100_E), 0}, 199 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX}, 200 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */ 201 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX}, 202 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0}, 203 { PCMCIA_CARD(NEWMEDIA, LANSURFER), 0}, 204 { PCMCIA_CARD(OEM2, ETHERNET), 0}, 205 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90 }, 206 { PCMCIA_CARD(OEM2, NE2000), 0}, 207 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 }, 208 { PCMCIA_CARD(PREMAX, PE200), 0}, 209 { PCMCIA_CARD(PSION, LANGLOBAL), 210 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM}, 211 { PCMCIA_CARD(RACORE, ETHERNET), 0}, 212 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90}, 213 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J}, 214 { PCMCIA_CARD(RELIA, COMBO), 0}, 215 { PCMCIA_CARD(RIOS, PCCARD3), 0}, 216 { PCMCIA_CARD(RPTI, EP400), 0}, 217 { PCMCIA_CARD(RPTI, EP401), 0}, 218 { PCMCIA_CARD(SMC, EZCARD), 0}, 219 { PCMCIA_CARD(SOCKET, EA_ETHER), 0}, 220 { PCMCIA_CARD(SOCKET, ES_1000), 0}, 221 { PCMCIA_CARD(SOCKET, LP_ETHER), 0}, 222 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0}, 223 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX}, 224 { PCMCIA_CARD(SVEC, COMBOCARD), 0}, 225 { PCMCIA_CARD(SVEC, LANCARD), 0}, 226 { PCMCIA_CARD(TAMARACK, ETHERNET), 0}, 227 { PCMCIA_CARD(TDK, CFE_10), 0}, 228 { PCMCIA_CARD(TDK, LAK_CD031), 0}, 229 { PCMCIA_CARD(TDK, DFL5610WS), 0}, 230 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 }, 231 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90}, 232 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 }, 233 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA}, 234 { PCMCIA_CARD(ZONET, ZEN), 0}, 235 { { NULL } } 236}; 237 238/* 239 * PC Card (PCMCIA) specific code. 240 */ 241static int ed_pccard_probe(device_t); 242static int ed_pccard_attach(device_t); 243static void ed_pccard_tick(void *); 244 245static int ed_pccard_dl100xx(device_t dev, const struct ed_product *); 246static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc); 247static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits); 248static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, 249 int nbits); 250 251static int ed_pccard_ax88x90(device_t dev, const struct ed_product *); 252static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits); 253static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, 254 int nbits); 255 256static int ed_miibus_readreg(device_t dev, int phy, int reg); 257static int ed_ifmedia_upd(struct ifnet *); 258static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *); 259 260static int ed_pccard_tc5299j(device_t dev, const struct ed_product *); 261static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits); 262static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, 263 int nbits); 264 265static void 266ed_pccard_print_entry(const struct ed_product *pp) 267{ 268 int i; 269 270 printf("Product entry: "); 271 if (pp->prod.pp_name) 272 printf("name='%s',", pp->prod.pp_name); 273 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor, 274 pp->prod.pp_product); 275 for (i = 0; i < 4; i++) 276 if (pp->prod.pp_cis[i]) 277 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]); 278 printf("\n"); 279} 280 281static int 282ed_pccard_probe(device_t dev) 283{ 284 const struct ed_product *pp, *pp2; 285 int error, first = 1; 286 uint32_t fcn = PCCARD_FUNCTION_UNSPEC; 287 288 /* Make sure we're a network function */ 289 error = pccard_get_function(dev, &fcn); 290 if (error != 0) 291 return (error); 292 293 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 294 (const struct pccard_product *) ed_pccard_products, 295 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 296 if (pp->prod.pp_name != NULL) 297 device_set_desc(dev, pp->prod.pp_name); 298 /* 299 * Some devices don't ID themselves as network, but 300 * that's OK if the flags say so. 301 */ 302 if (!(pp->flags & NE2000DVF_ANYFUNC) && 303 fcn != PCCARD_FUNCTION_NETWORK) 304 return (ENXIO); 305 /* 306 * Some devices match multiple entries. Report that 307 * as a warning to help cull the table 308 */ 309 pp2 = pp; 310 while ((pp2 = (const struct ed_product *)pccard_product_lookup( 311 dev, (const struct pccard_product *)(pp2 + 1), 312 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 313 if (first) { 314 device_printf(dev, 315 "Warning: card matches multiple entries. Report to imp@freebsd.org\n"); 316 ed_pccard_print_entry(pp); 317 first = 0; 318 } 319 ed_pccard_print_entry(pp2); 320 } 321 322 return (0); 323 } 324 return (ENXIO); 325} 326 327static int 328ed_pccard_rom_mac(device_t dev, uint8_t *enaddr) 329{ 330 struct ed_softc *sc = device_get_softc(dev); 331 uint8_t romdata[32]; 332 int i; 333 334 /* 335 * Read in the rom data at location 0. Since there are no 336 * NE-1000 based PC Card devices, we'll assume we're 16-bit. 337 * 338 * In researching what format this takes, I've found that the 339 * following appears to be true for multiple cards based on 340 * observation as well as datasheet digging. 341 * 342 * Data is stored in some ROM and is copied out 8 bits at a time 343 * into 16-bit wide locations. This means that the odd locations 344 * of the ROM are not used (and can be either 0 or ff). 345 * 346 * The contents appears to be as follows: 347 * PROM RAM 348 * Offset Offset What 349 * 0 0 ENETADDR 0 350 * 1 2 ENETADDR 1 351 * 2 4 ENETADDR 2 352 * 3 6 ENETADDR 3 353 * 4 8 ENETADDR 4 354 * 5 10 ENETADDR 5 355 * 6-13 12-26 Reserved (varies by manufacturer) 356 * 14 28 0x57 357 * 15 30 0x57 358 * 359 * Some manufacturers have another image of enetaddr from 360 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but 361 * this doesn't appear to be universally documented in the 362 * datasheets. Some manufactuers have a card type, card config 363 * checksums, etc encoded into PROM offset 6-13, but deciphering it 364 * requires more knowledge about the exact underlying chipset than 365 * we possess (and maybe can possess). 366 */ 367 ed_pio_readmem(sc, 0, romdata, 32); 368 if (bootverbose) 369 device_printf(dev, "ROM DATA: %32D\n", romdata, " "); 370 if (romdata[28] != 0x57 || romdata[30] != 0x57) 371 return (0); 372 for (i = 0; i < ETHER_ADDR_LEN; i++) 373 enaddr[i] = romdata[i * 2]; 374 return (1); 375} 376 377static int 378ed_pccard_add_modem(device_t dev) 379{ 380 struct ed_softc *sc = device_get_softc(dev); 381 382 device_printf(dev, "Need to write this code: modem rid is %d\n", 383 sc->modem_rid); 384 return 0; 385} 386 387static int 388ed_pccard_kick_phy(struct ed_softc *sc) 389{ 390 struct mii_softc *miisc; 391 struct mii_data *mii; 392 393 /* 394 * Many of the PHYs that wind up on PC Cards are weird in 395 * this way. Generally, we don't need to worry so much about 396 * the Isolation protocol since there's only one PHY in 397 * these designs, so this workaround is reasonable. 398 */ 399 mii = device_get_softc(sc->miibus); 400 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 401 miisc->mii_flags |= MIIF_FORCEANEG; 402 mii_phy_reset(miisc); 403 } 404 return (mii_mediachg(mii)); 405} 406 407static int 408ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command) 409{ 410 struct mii_data *mii; 411 412 if (sc->miibus == NULL) 413 return (EINVAL); 414 mii = device_get_softc(sc->miibus); 415 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command)); 416} 417 418 419static void 420ed_pccard_mediachg(struct ed_softc *sc) 421{ 422 struct mii_data *mii; 423 424 if (sc->miibus == NULL) 425 return; 426 mii = device_get_softc(sc->miibus); 427 mii_mediachg(mii); 428} 429 430static int 431ed_pccard_attach(device_t dev) 432{ 433 u_char sum; 434 u_char enaddr[ETHER_ADDR_LEN]; 435 const struct ed_product *pp; 436 int error, i, flags; 437 struct ed_softc *sc = device_get_softc(dev); 438 u_long size; 439 static uint16_t *intr_vals[] = {NULL, NULL}; 440 441 sc->dev = dev; 442 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 443 (const struct pccard_product *) ed_pccard_products, 444 sizeof(ed_pccard_products[0]), NULL)) == NULL) 445 return (ENXIO); 446 sc->modem_rid = -1; 447 if (pp->flags & NE2000DVF_MODEM) { 448 sc->port_rid = -1; 449 for (i = 0; i < 4; i++) { 450 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i); 451 if (size == ED_NOVELL_IO_PORTS) 452 sc->port_rid = i; 453 else if (size == 8) 454 sc->modem_rid = i; 455 } 456 if (sc->port_rid == -1) { 457 device_printf(dev, "Cannot locate my ports!\n"); 458 return (ENXIO); 459 } 460 } else { 461 sc->port_rid = 0; 462 } 463 /* Allocate the port resource during setup. */ 464 error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS); 465 if (error) 466 return (error); 467 error = ed_alloc_irq(dev, 0, 0); 468 if (error) 469 goto bad; 470 471 /* 472 * Determine which chipset we are. Almost all the PC Card chipsets 473 * have the Novel ASIC and NIC offsets. There's 2 known cards that 474 * follow the WD80x3 conventions, which are handled as a special case. 475 */ 476 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 477 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 478 error = ENXIO; 479 flags = device_get_flags(dev); 480 if (error != 0) 481 error = ed_pccard_dl100xx(dev, pp); 482 if (error != 0) 483 error = ed_pccard_ax88x90(dev, pp); 484 if (error != 0) 485 error = ed_pccard_tc5299j(dev, pp); 486 if (error != 0) 487 error = ed_probe_Novell_generic(dev, flags); 488 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) { 489 flags |= ED_FLAGS_TOSH_ETHER; 490 flags |= ED_FLAGS_PCCARD; 491 sc->asic_offset = ED_WD_ASIC_OFFSET; 492 sc->nic_offset = ED_WD_NIC_OFFSET; 493 error = ed_probe_WD80x3_generic(dev, flags, intr_vals); 494 } 495 if (error) 496 goto bad; 497 498 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 499 NULL, edintr, sc, &sc->irq_handle); 500 if (error) { 501 device_printf(dev, "setup intr failed %d \n", error); 502 goto bad; 503 } 504 505 /* 506 * There are several ways to get the MAC address for the card. 507 * Some of the above probe routines can fill in the enaddr. If 508 * not, we run through a number of 'well known' locations: 509 * (1) From the PC Card FUNCE 510 * (2) From offset 0 in the shared memory 511 * (3) From a hinted offset in attribute memory 512 * (4) From 0xff0 in attribute memory 513 * If we can't get a non-zero MAC address from this list, we fail. 514 */ 515 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 516 sum |= sc->enaddr[i]; 517 if (sum == 0) { 518 pccard_get_ether(dev, enaddr); 519 if (bootverbose) 520 device_printf(dev, "CIS MAC %6D\n", enaddr, ":"); 521 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 522 sum |= enaddr[i]; 523 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) { 524 if (bootverbose) 525 device_printf(dev, "ROM mac %6D\n", enaddr, 526 ":"); 527 sum++; 528 } 529 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) { 530 for (i = 0; i < ETHER_ADDR_LEN; i++) { 531 pccard_attr_read_1(dev, pp->enoff + i * 2, 532 enaddr + i); 533 sum |= enaddr[i]; 534 } 535 if (bootverbose) 536 device_printf(dev, "Hint %x MAC %6D\n", 537 pp->enoff, enaddr, ":"); 538 } 539 if (sum == 0) { 540 for (i = 0; i < ETHER_ADDR_LEN; i++) { 541 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET + 542 i * 2, enaddr + i); 543 sum |= enaddr[i]; 544 } 545 if (bootverbose) 546 device_printf(dev, "Fallback MAC %6D\n", 547 enaddr, ":"); 548 } 549 if (sum == 0) { 550 device_printf(dev, "Cannot extract MAC address.\n"); 551 ed_release_resources(dev); 552 return (ENXIO); 553 } 554 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN); 555 } 556 557 error = ed_attach(dev); 558 if (error) 559 goto bad; 560 if (sc->chip_type == ED_CHIP_TYPE_DL10019 || 561 sc->chip_type == ED_CHIP_TYPE_DL10022) { 562 /* Probe for an MII bus, but ignore errors. */ 563 ed_pccard_dl100xx_mii_reset(sc); 564 (void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 565 ed_ifmedia_sts); 566 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 || 567 sc->chip_type == ED_CHIP_TYPE_AX88790) { 568 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 569 ed_ifmedia_sts)) != 0) { 570 device_printf(dev, "Missing mii %d!\n", error); 571 goto bad; 572 } 573 574 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) { 575 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 576 ed_ifmedia_sts)) != 0) { 577 device_printf(dev, "Missing mii!\n"); 578 goto bad; 579 } 580 581 } 582 if (sc->miibus != NULL) { 583 sc->sc_tick = ed_pccard_tick; 584 sc->sc_mediachg = ed_pccard_mediachg; 585 sc->sc_media_ioctl = ed_pccard_media_ioctl; 586 ed_pccard_kick_phy(sc); 587 } else { 588 ed_gen_ifmedia_init(sc); 589 } 590 if (sc->modem_rid != -1) 591 ed_pccard_add_modem(dev); 592 return (0); 593bad: 594 ed_detach(dev); 595 return (error); 596} 597 598/* 599 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100 600 * and compatible cards (DL10019C Ethernet controller). 601 */ 602static int 603ed_pccard_dl100xx(device_t dev, const struct ed_product *pp) 604{ 605 struct ed_softc *sc = device_get_softc(dev); 606 u_char sum; 607 uint8_t id; 608 u_int memsize; 609 int i, error; 610 611 if (!(pp->flags & NE2000DVF_DL100XX)) 612 return (ENXIO); 613 if (bootverbose) 614 device_printf(dev, "Trying DL100xx probing\n"); 615 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 616 if (bootverbose && error) 617 device_printf(dev, "Novell generic probe failed: %d\n", error); 618 if (error != 0) 619 return (error); 620 621 /* 622 * Linksys registers(offset from ASIC base) 623 * 624 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5) 625 * 0x0A : Card ID Register (CIR) 626 * 0x0B : Check Sum Register (SR) 627 */ 628 for (sum = 0, i = 0x04; i < 0x0c; i++) 629 sum += ed_asic_inb(sc, i); 630 if (sum != 0xff) { 631 if (bootverbose) 632 device_printf(dev, "Bad checksum %#x\n", sum); 633 return (ENXIO); /* invalid DL10019C */ 634 } 635 if (bootverbose) 636 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa)); 637 for (i = 0; i < ETHER_ADDR_LEN; i++) 638 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i); 639 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 640 id = ed_asic_inb(sc, 0xf); 641 sc->isa16bit = 1; 642 /* 643 * Hard code values based on the datasheet. We're NE-2000 compatible 644 * NIC with 24kb of packet memory starting at 24k offset. These 645 * cards also work with 16k at 16k, but don't work with 24k at 16k 646 * or 32k at 16k. 647 */ 648 sc->type = ED_TYPE_NE2000; 649 sc->mem_start = 24 * 1024; 650 memsize = sc->mem_size = 24 * 1024; 651 sc->mem_end = sc->mem_start + memsize; 652 sc->tx_page_start = memsize / ED_PAGE_SIZE; 653 sc->txb_cnt = 3; 654 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 655 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 656 657 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 658 659 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 660 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 661 sc->vendor = ED_VENDOR_NOVELL; 662 sc->chip_type = (id & 0x90) == 0x90 ? 663 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019; 664 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019"; 665 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits; 666 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits; 667 return (0); 668} 669 670/* MII bit-twiddling routines for cards using Dlink chipset */ 671#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 672 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x)) 673#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 674 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x)) 675 676static void 677ed_pccard_dl100xx_mii_reset(struct ed_softc *sc) 678{ 679 if (sc->chip_type != ED_CHIP_TYPE_DL10022) 680 return; 681 682 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 683 DELAY(10); 684 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 685 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 686 DELAY(10); 687 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 688 DELAY(10); 689 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 690 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 691 DELAY(10); 692 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0); 693} 694 695static void 696ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 697{ 698 int i; 699 700 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT); 701 for (i = nbits - 1; i >= 0; i--) { 702 if ((val >> i) & 1) 703 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT); 704 else 705 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT); 706 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 707 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 708 } 709} 710 711static u_int 712ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits) 713{ 714 int i; 715 u_int val = 0; 716 717 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT); 718 for (i = nbits - 1; i >= 0; i--) { 719 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 720 val <<= 1; 721 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN) 722 val++; 723 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 724 } 725 return val; 726} 727 728static void 729ed_pccard_ax88x90_reset(struct ed_softc *sc) 730{ 731 int i; 732 733 /* Reset Card */ 734 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 735 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET)); 736 737 /* Wait for the RST bit to assert, but cap it at 10ms */ 738 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0; 739 i--) 740 continue; 741 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */ 742 if (i == 0) 743 device_printf(sc->dev, "Reset didn't finish\n"); 744} 745 746/* 747 * Probe and vendor-specific initialization routine for ax88x90 boards 748 */ 749static int 750ed_probe_ax88x90_generic(device_t dev, int flags) 751{ 752 struct ed_softc *sc = device_get_softc(dev); 753 u_int memsize; 754 static char test_pattern[32] = "THIS is A memory TEST pattern"; 755 char test_buffer[32]; 756 757 ed_pccard_ax88x90_reset(sc); 758 DELAY(10*1000); 759 760 /* Make sure that we really have an 8390 based board */ 761 if (!ed_probe_generic8390(sc)) 762 return (ENXIO); 763 764 sc->vendor = ED_VENDOR_NOVELL; 765 sc->mem_shared = 0; 766 sc->cr_proto = ED_CR_RD2; 767 768 /* 769 * This prevents packets from being stored in the NIC memory when the 770 * readmem routine turns on the start bit in the CR. We write some 771 * bytes in word mode and verify we can read them back. If we can't 772 * then we don't have an AX88x90 chip here. 773 */ 774 sc->isa16bit = 1; 775 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 776 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 777 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 778 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 779 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) 780 return (ENXIO); 781 782 /* 783 * Hard code values based on the datasheet. We're NE-2000 compatible 784 * NIC with 16kb of packet memory starting at 16k offset. 785 */ 786 sc->type = ED_TYPE_NE2000; 787 memsize = sc->mem_size = 16*1024; 788 sc->mem_start = 16 * 1024; 789 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0) 790 sc->chip_type = ED_CHIP_TYPE_AX88790; 791 else { 792 sc->chip_type = ED_CHIP_TYPE_AX88190; 793 /* 794 * The AX88190 (not A) has external 64k SRAM. Probe for this 795 * here. Most of the cards I have either use the AX88190A 796 * part, or have only 32k SRAM for some reason, so I don't 797 * know if this works or not. 798 */ 799 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern)); 800 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern)); 801 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) { 802 sc->mem_start = 2*1024; 803 memsize = sc->mem_size = 62 * 1024; 804 } 805 } 806 sc->mem_end = sc->mem_start + memsize; 807 sc->tx_page_start = memsize / ED_PAGE_SIZE; 808 if (sc->mem_size > 16 * 1024) 809 sc->txb_cnt = 3; 810 else 811 sc->txb_cnt = 2; 812 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 813 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 814 815 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 816 817 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 818 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 819 820 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */ 821 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN); 822 823 /* clear any pending interrupts that might have occurred above */ 824 ed_nic_outb(sc, ED_P0_ISR, 0xff); 825 sc->sc_write_mbufs = ed_pio_write_mbufs; 826 return (0); 827} 828 829static int 830ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc) 831{ 832 int i, id; 833 834 /* 835 * All AX88x90 devices have MII and a PHY, so we use this to weed out 836 * chips that would otherwise make it through the tests we have after 837 * this point. 838 */ 839 for (i = 0; i < 32; i++) { 840 id = ed_miibus_readreg(dev, i, MII_BMSR); 841 if (id != 0 && id != 0xffff) 842 break; 843 } 844 /* 845 * Found one, we're good. 846 */ 847 if (i != 32) 848 return (0); 849 /* 850 * Didn't find anything, so try to power up and try again. The PHY 851 * may be not responding because we're in power down mode. 852 */ 853 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 854 return (ENXIO); 855 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN); 856 for (i = 0; i < 32; i++) { 857 id = ed_miibus_readreg(dev, i, MII_BMSR); 858 if (id != 0 && id != 0xffff) 859 break; 860 } 861 /* 862 * Still no joy? We're AFU, punt. 863 */ 864 if (i == 32) 865 return (ENXIO); 866 return (0); 867 868} 869 870/* 871 * Special setup for AX88[17]90 872 */ 873static int 874ed_pccard_ax88x90(device_t dev, const struct ed_product *pp) 875{ 876 int error; 877 int iobase; 878 struct ed_softc *sc = device_get_softc(dev); 879 880 if (!(pp->flags & NE2000DVF_AX88X90)) 881 return (ENXIO); 882 883 if (bootverbose) 884 device_printf(dev, "Checking AX88x90\n"); 885 886 /* 887 * Set the IOBASE Register. The AX88x90 cards are potentially 888 * multifunction cards, and thus requires a slight workaround. 889 * We write the address the card is at, on the off chance that this 890 * card is not MFC. 891 * XXX I'm not sure that this is still needed... 892 */ 893 iobase = rman_get_start(sc->port_res); 894 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff); 895 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff); 896 897 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits; 898 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits; 899 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev)); 900 if (error) { 901 if (bootverbose) 902 device_printf(dev, "probe ax88x90 failed %d\n", 903 error); 904 goto fail; 905 } 906 error = ed_pccard_ax88x90_check_mii(dev, sc); 907 if (error) 908 goto fail; 909 sc->vendor = ED_VENDOR_NOVELL; 910 sc->type = ED_TYPE_NE2000; 911 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 912 sc->type_str = "AX88190"; 913 else 914 sc->type_str = "AX88790"; 915 return (0); 916fail:; 917 sc->mii_readbits = 0; 918 sc->mii_writebits = 0; 919 return (error); 920} 921 922static void 923ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 924{ 925 int i, data; 926 927 for (i = nbits - 1; i >= 0; i--) { 928 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0; 929 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data); 930 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK); 931 } 932} 933 934static u_int 935ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits) 936{ 937 int i; 938 u_int val = 0; 939 uint8_t mdio; 940 941 mdio = ED_AX88X90_MII_DIRIN; 942 for (i = nbits - 1; i >= 0; i--) { 943 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio); 944 val <<= 1; 945 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN) 946 val++; 947 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK); 948 } 949 return val; 950} 951 952/* 953 * Special setup for TC5299J 954 */ 955static int 956ed_pccard_tc5299j(device_t dev, const struct ed_product *pp) 957{ 958 int error, i, id; 959 char *ts; 960 struct ed_softc *sc = device_get_softc(dev); 961 962 if (!(pp->flags & NE2000DVF_TC5299J)) 963 return (ENXIO); 964 965 if (bootverbose) 966 device_printf(dev, "Checking Tc5299j\n"); 967 968 /* 969 * Check to see if we have a MII PHY ID at any of the first 32 970 * locations. All TC5299J devices have MII and a PHY, so we use 971 * this to weed out chips that would otherwise make it through 972 * the tests we have after this point. 973 */ 974 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits; 975 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits; 976 for (i = 0; i < 32; i++) { 977 id = ed_miibus_readreg(dev, i, MII_PHYIDR1); 978 if (id != 0 && id != 0xffff) 979 break; 980 } 981 if (i == 32) { 982 sc->mii_readbits = 0; 983 sc->mii_writebits = 0; 984 return (ENXIO); 985 } 986 987 ts = "TC5299J"; 988 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 989 if (bootverbose) 990 device_printf(dev, "probe novel returns %d\n", error); 991 if (error != 0) { 992 sc->mii_readbits = 0; 993 sc->mii_writebits = 0; 994 return (error); 995 } 996 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) { 997 sc->mii_readbits = 0; 998 sc->mii_writebits = 0; 999 return (ENXIO); 1000 } 1001 sc->vendor = ED_VENDOR_NOVELL; 1002 sc->type = ED_TYPE_NE2000; 1003 sc->chip_type = ED_CHIP_TYPE_TC5299J; 1004 sc->type_str = ts; 1005 return (0); 1006} 1007 1008static void 1009ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 1010{ 1011 int i; 1012 uint8_t cr, data; 1013 1014 /* Select page 3 */ 1015 cr = ed_nic_inb(sc, ED_P0_CR); 1016 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1017 1018 for (i = nbits - 1; i >= 0; i--) { 1019 data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0; 1020 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data); 1021 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK); 1022 } 1023 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0); 1024 1025 /* Restore prior page */ 1026 ed_nic_outb(sc, ED_P0_CR, cr); 1027} 1028 1029static u_int 1030ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits) 1031{ 1032 int i; 1033 u_int val = 0; 1034 uint8_t cr; 1035 1036 /* Select page 3 */ 1037 cr = ed_nic_inb(sc, ED_P0_CR); 1038 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1039 1040 ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1041 for (i = nbits - 1; i >= 0; i--) { 1042 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 1043 ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT); 1044 val <<= 1; 1045 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN) 1046 val++; 1047 ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1048 } 1049 1050 /* Restore prior page */ 1051 ed_nic_outb(sc, ED_P0_CR, cr); 1052 return val; 1053} 1054 1055/* 1056 * MII bus support routines. 1057 */ 1058static int 1059ed_miibus_readreg(device_t dev, int phy, int reg) 1060{ 1061 struct ed_softc *sc; 1062 int failed, val; 1063 1064 sc = device_get_softc(dev); 1065 /* 1066 * The AX88790 has an interesting quirk. It has an internal phy that 1067 * needs a special bit set to access, but can also have additional 1068 * external PHYs set for things like HomeNET media. When accessing 1069 * the internal PHY, a bit has to be set, when accessing the external 1070 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 1071 * datasheet for more details. 1072 * 1073 * Also, PHYs above 16 appear to be phantoms on some cards, but not 1074 * others. Registers read for this are often the same as prior values 1075 * read. Filter all register requests to 17-31. 1076 * 1077 * I can't explain it, since I don't have the DL100xx data sheets, but 1078 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90 1079 * chips have 14. The linux pcnet and axnet drivers confirm this. 1080 */ 1081 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1082 if (phy > 0x10) 1083 return (0); 1084 if (phy == 0x10) 1085 ed_asic_outb(sc, ED_AX88X90_GPIO, 1086 ED_AX88X90_GPIO_INT_PHY); 1087 else 1088 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1089 } 1090 1091 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1092 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1093 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); 1094 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1095 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1096 if (sc->chip_type == ED_CHIP_TYPE_AX88790 || 1097 sc->chip_type == ED_CHIP_TYPE_AX88190) 1098 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1099 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1100 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); 1101 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1102/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */ 1103 return (failed ? 0 : val); 1104} 1105 1106static int 1107ed_miibus_writereg(device_t dev, int phy, int reg, int data) 1108{ 1109 struct ed_softc *sc; 1110 1111/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */ 1112 sc = device_get_softc(dev); 1113 /* See ed_miibus_readreg for details */ 1114 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1115 if (phy > 0x10) 1116 return (0); 1117 if (phy == 0x10) 1118 ed_asic_outb(sc, ED_AX88X90_GPIO, 1119 ED_AX88X90_GPIO_INT_PHY); 1120 else 1121 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1122 } 1123 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1124 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1125 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS); 1126 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1127 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1128 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS); 1129 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS); 1130 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1131 return (0); 1132} 1133 1134static int 1135ed_ifmedia_upd(struct ifnet *ifp) 1136{ 1137 struct ed_softc *sc; 1138 int error; 1139 1140 sc = ifp->if_softc; 1141 if (sc->miibus == NULL) 1142 return (ENXIO); 1143 ED_LOCK(sc); 1144 error = ed_pccard_kick_phy(sc); 1145 ED_UNLOCK(sc); 1146 return (error); 1147} 1148 1149static void 1150ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1151{ 1152 struct ed_softc *sc; 1153 struct mii_data *mii; 1154 1155 sc = ifp->if_softc; 1156 if (sc->miibus == NULL) 1157 return; 1158 1159 mii = device_get_softc(sc->miibus); 1160 mii_pollstat(mii); 1161 ifmr->ifm_active = mii->mii_media_active; 1162 ifmr->ifm_status = mii->mii_media_status; 1163} 1164 1165static void 1166ed_child_detached(device_t dev, device_t child) 1167{ 1168 struct ed_softc *sc; 1169 1170 sc = device_get_softc(dev); 1171 if (child == sc->miibus) 1172 sc->miibus = NULL; 1173} 1174 1175static void 1176ed_pccard_tick(void *arg) 1177{ 1178 struct ed_softc *sc = arg; 1179 struct mii_data *mii; 1180 int media = 0; 1181 1182 ED_ASSERT_LOCKED(sc); 1183 if (sc->miibus != NULL) { 1184 mii = device_get_softc(sc->miibus); 1185 media = mii->mii_media_status; 1186 mii_tick(mii); 1187 if (mii->mii_media_status & IFM_ACTIVE && 1188 media != mii->mii_media_status) { 1189 if (sc->chip_type == ED_CHIP_TYPE_DL10022) { 1190 ed_asic_outb(sc, ED_DL10022_DIAG, 1191 (mii->mii_media_active & IFM_FDX) ? 1192 ED_DL10022_COLLISON_DIS : 0); 1193#ifdef notyet 1194 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) { 1195 write_asic(sc, ED_DL10019_MAGIC, 1196 (mii->mii_media_active & IFM_FDX) ? 1197 DL19FDUPLX : 0); 1198#endif 1199 } 1200 } 1201 1202 } 1203 callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc); 1204} 1205 1206static device_method_t ed_pccard_methods[] = { 1207 /* Device interface */ 1208 DEVMETHOD(device_probe, ed_pccard_probe), 1209 DEVMETHOD(device_attach, ed_pccard_attach), 1210 DEVMETHOD(device_detach, ed_detach), 1211 1212 /* Bus interface */ 1213 DEVMETHOD(bus_child_detached, ed_child_detached), 1214 1215 /* MII interface */ 1216 DEVMETHOD(miibus_readreg, ed_miibus_readreg), 1217 DEVMETHOD(miibus_writereg, ed_miibus_writereg), 1218 1219 { 0, 0 } 1220}; 1221 1222static driver_t ed_pccard_driver = { 1223 "ed", 1224 ed_pccard_methods, 1225 sizeof(struct ed_softc) 1226}; 1227 1228DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0); 1229DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0); 1230MODULE_DEPEND(ed, miibus, 1, 1, 1); 1231MODULE_DEPEND(ed, ether, 1, 1, 1); 1232