if_ed_pccard.c revision 190644
1/*-
2 * Copyright (c) 2005, M. Warner Losh
3 * Copyright (c) 1995, David Greenman
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice unmodified, this list of conditions, and the following
11 *    disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 190644 2009-04-02 17:08:54Z imp $
29 */
30
31/*
32 * Notes for adding media support.  Each chipset is somewhat different
33 * from the others.  Linux has a table of OIDs that it uses to see what
34 * supports the misc register of the NS83903.  But a sampling of datasheets
35 * I could dig up on cards I own paints a different picture.
36 *
37 * Chipset specific details:
38 * NS 83903/902A paired
39 *    ccr base 0x1020
40 *    id register at 0x1000: 7-3 = 0, 2-0 = 1.
41 *	(maybe this test is too week)
42 *    misc register at 0x018:
43 *	6 WAIT_TOUTENABLE enable watchdog timeout
44 *	3 AUI/TPI 1 AUX, 0 TPI
45 *	2 loopback
46 *      1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47 *	0 0-no mam, 1 mam connected
48 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
49 * and the NEC PC9801N-J12 ccr base 0x2000!
50 *
51 * winbond 289c926
52 *    ccr base 0xfd0
53 *    cfb (am 0xff2):
54 *	0-1 PHY01	00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
55 *	2 LNKEN		0 - enable link and auto switch, 1 disable
56 *	3 LNKSTS	TPI + LNKEN=0 + link good == 1, else 0
57 *    sr (am 0xff4)
58 *	88 00 88 00 88 00, etc
59 *
60 * TMI tc3299a (cr PHY01 == 0)
61 *    ccr base 0x3f8
62 *    cra (io 0xa)
63 *    crb (io 0xb)
64 *	0-1 PHY01	00 auto, 01 res, 10 10B5, 11 TPI
65 *	2 GDLINK	1 disable checking of link
66 *	6 LINK		0 bad link, 1 good link
67 * TMI tc5299 10/100 chip, has a different MII interaction than
68 * dl100xx and ax88x90.
69 *
70 * EN5017A, EN5020	no data, but very popular
71 * Other chips?
72 * NetBSD supports RTL8019, but none have surfaced that I can see
73 */
74
75#include <sys/param.h>
76#include <sys/systm.h>
77#include <sys/socket.h>
78#include <sys/kernel.h>
79#include <sys/conf.h>
80#include <sys/uio.h>
81
82#include <sys/module.h>
83#include <sys/bus.h>
84#include <machine/bus.h>
85#include <sys/rman.h>
86#include <machine/resource.h>
87
88#include <net/ethernet.h>
89#include <net/if.h>
90#include <net/if_arp.h>
91#include <net/if_mib.h>
92#include <net/if_media.h>
93
94#include <dev/ed/if_edreg.h>
95#include <dev/ed/if_edvar.h>
96#include <dev/ed/ax88x90reg.h>
97#include <dev/ed/dl100xxreg.h>
98#include <dev/ed/tc5299jreg.h>
99#include <dev/pccard/pccardvar.h>
100#include <dev/pccard/pccardreg.h>
101#include <dev/pccard/pccard_cis.h>
102#include <dev/mii/mii.h>
103#include <dev/mii/miivar.h>
104
105#include "card_if.h"
106/* "device miibus" required.  See GENERIC if you get errors here. */
107#include "miibus_if.h"
108#include "pccarddevs.h"
109
110/*
111 * NE-2000 based PC Cards have a number of ways to get the MAC address.
112 * Some cards encode this as a FUNCE.  Others have this in the ROMs the
113 * same way that ISA cards do.  Some have it encoded in the attribute
114 * memory somewhere that isn't in the CIS.  Some new chipsets have it
115 * in special registers in the ASIC part of the chip.
116 *
117 * For those cards that have the MAC adress stored in attribute memory,
118 * nearly all of them have it at a fixed offset (0xff0).  We use that
119 * offset as a source of last resource if other offsets have failed.
120 */
121#define ED_DEFAULT_MAC_OFFSET	0xff0
122
123static const struct ed_product {
124	struct pccard_product	prod;
125	int flags;
126#define	NE2000DVF_DL100XX	0x0001		/* chip is D-Link DL10019/22 */
127#define	NE2000DVF_AX88X90	0x0002		/* chip is ASIX AX88[17]90 */
128#define NE2000DVF_TC5299J	0x0004		/* chip is Tamarack TC5299J */
129#define NE2000DVF_TOSHIBA	0x0008		/* Toshiba DP83902A */
130#define NE2000DVF_ENADDR	0x0100		/* Get MAC from attr mem */
131#define NE2000DVF_ANYFUNC	0x0200		/* Allow any function type */
132#define NE2000DVF_MODEM		0x0400		/* Has a modem/serial */
133	int enoff;
134} ed_pccard_products[] = {
135	{ PCMCIA_CARD(ACCTON, EN2212), 0},
136	{ PCMCIA_CARD(ACCTON, EN2216), 0},
137	{ PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
138	{ PCMCIA_CARD(AMBICOM, AMB8002T), 0},
139	{ PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
140	{ PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
141	{ PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
142	{ PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
143	{ PCMCIA_CARD(BROMAX, IPORT), 0},
144	{ PCMCIA_CARD(BROMAX, IPORT2), 0},
145	{ PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
146	{ PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
147	{ PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
148	{ PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
149	{ PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
150	{ PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
151	{ PCMCIA_CARD(CNET, NE2000), 0},
152	{ PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
153	{ PCMCIA_CARD(COMPEX, LANMODEM), 0},
154	{ PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
155	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
156	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
157	{ PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
158	{ PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
159	{ PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
160	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
161	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
162	{ PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
163	{ PCMCIA_CARD(COREGA, LAPCCTXD), 0},
164	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
165	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
166	{ PCMCIA_CARD(DLINK, DE650), 0 },
167	{ PCMCIA_CARD(DLINK, DE660), 0 },
168	{ PCMCIA_CARD(DLINK, DE660PLUS), 0},
169	{ PCMCIA_CARD(DYNALINK, L10C), 0},
170	{ PCMCIA_CARD(EDIMAX, EP4000A), 0},
171	{ PCMCIA_CARD(EPSON, EEN10B), NE2000DVF_ENADDR, 0xff0},
172	{ PCMCIA_CARD(EXP, THINLANCOMBO), 0},
173	{ PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
174	{ PCMCIA_CARD(GREY_CELL, TDK3000), 0},
175	{ PCMCIA_CARD(GREY_CELL, DMF650TX),
176	    NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
177	{ PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
178	{ PCMCIA_CARD(IBM, INFOMOVER), NE2000DVF_ENADDR, 0xff0},
179	{ PCMCIA_CARD(IODATA3, PCLAT), 0},
180	{ PCMCIA_CARD(KINGSTON, CIO10T), 0},
181	{ PCMCIA_CARD(KINGSTON, KNE2), 0},
182	{ PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
183	{ PCMCIA_CARD(LINKSYS, COMBO_ECARD),
184	    NE2000DVF_DL100XX | NE2000DVF_AX88X90},
185	{ PCMCIA_CARD(LINKSYS, ECARD_1), 0},
186	{ PCMCIA_CARD(LINKSYS, ECARD_2), 0},
187	{ PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
188	{ PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
189	{ PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
190	{ PCMCIA_CARD(MAGICRAM, ETHER), 0},
191	{ PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
192	{ PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
193	{ PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
194	{ PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
195	{ PCMCIA_CARD(NDC, ND5100_E), 0},
196	{ PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
197	/* Same ID as DLINK DFE-670TXD.  670 has DL10022, fa411 has ax88790 */
198	{ PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
199	{ PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
200	{ PCMCIA_CARD(NEWMEDIA, LANSURFER), 0},
201	{ PCMCIA_CARD(OEM2, ETHERNET), 0},
202	{ PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90 },
203	{ PCMCIA_CARD(OEM2, NE2000), 0},
204	{ PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
205	{ PCMCIA_CARD(PREMAX, PE200), 0},
206	{ PCMCIA_CARD(PSION, LANGLOBAL),
207	    NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
208	{ PCMCIA_CARD(RACORE, ETHERNET), 0},
209	{ PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
210	{ PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
211	{ PCMCIA_CARD(RELIA, COMBO), 0},
212	{ PCMCIA_CARD(RIOS, PCCARD3), 0},
213	{ PCMCIA_CARD(RPTI, EP400), 0},
214	{ PCMCIA_CARD(RPTI, EP401), 0},
215	{ PCMCIA_CARD(SMC, EZCARD), 0},
216	{ PCMCIA_CARD(SOCKET, EA_ETHER), 0},
217	{ PCMCIA_CARD(SOCKET, ES_1000), 0},
218	{ PCMCIA_CARD(SOCKET, LP_ETHER), 0},
219	{ PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
220	{ PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
221	{ PCMCIA_CARD(SVEC, COMBOCARD), 0},
222	{ PCMCIA_CARD(SVEC, LANCARD), 0},
223	{ PCMCIA_CARD(TAMARACK, ETHERNET), 0},
224	{ PCMCIA_CARD(TDK, CFE_10), 0},
225	{ PCMCIA_CARD(TDK, LAK_CD031), 0},
226	{ PCMCIA_CARD(TDK, DFL5610WS), 0},
227	{ PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
228	{ PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
229	{ PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
230	{ PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
231	{ PCMCIA_CARD(ZONET, ZEN), 0},
232	{ { NULL } }
233};
234
235/*
236 *      PC Card (PCMCIA) specific code.
237 */
238static int	ed_pccard_probe(device_t);
239static int	ed_pccard_attach(device_t);
240
241static int	ed_pccard_dl100xx(device_t dev, const struct ed_product *);
242static void	ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
243static u_int	ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
244static void	ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
245    int nbits);
246
247static int	ed_pccard_ax88x90(device_t dev, const struct ed_product *);
248static u_int	ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
249static void	ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
250    int nbits);
251
252static int	ed_miibus_readreg(device_t dev, int phy, int reg);
253static int	ed_ifmedia_upd(struct ifnet *);
254static void	ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
255
256static int	ed_pccard_tc5299j(device_t dev, const struct ed_product *);
257static void	ed_pccard_tc5299j_mii_reset(struct ed_softc *sc);
258static u_int	ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
259static void	ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
260    int nbits);
261
262static void
263ed_pccard_print_entry(const struct ed_product *pp)
264{
265	int i;
266
267	printf("Product entry: ");
268	if (pp->prod.pp_name)
269		printf("name='%s',", pp->prod.pp_name);
270	printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
271	    pp->prod.pp_product);
272	for (i = 0; i < 4; i++)
273		if (pp->prod.pp_cis[i])
274			printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
275	printf("\n");
276}
277
278static int
279ed_pccard_probe(device_t dev)
280{
281	const struct ed_product *pp, *pp2;
282	int		error, first = 1;
283	uint32_t	fcn = PCCARD_FUNCTION_UNSPEC;
284
285	/* Make sure we're a network function */
286	error = pccard_get_function(dev, &fcn);
287	if (error != 0)
288		return (error);
289
290	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
291	    (const struct pccard_product *) ed_pccard_products,
292	    sizeof(ed_pccard_products[0]), NULL)) != NULL) {
293		if (pp->prod.pp_name != NULL)
294			device_set_desc(dev, pp->prod.pp_name);
295		/*
296		 * Some devices don't ID themselves as network, but
297		 * that's OK if the flags say so.
298		 */
299		if (!(pp->flags & NE2000DVF_ANYFUNC) &&
300		    fcn != PCCARD_FUNCTION_NETWORK)
301			return (ENXIO);
302		/*
303		 * Some devices match multiple entries.  Report that
304		 * as a warning to help cull the table
305		 */
306		pp2 = pp;
307		while ((pp2 = (const struct ed_product *)pccard_product_lookup(
308		    dev, (const struct pccard_product *)(pp2 + 1),
309		    sizeof(ed_pccard_products[0]), NULL)) != NULL) {
310			if (first) {
311				device_printf(dev,
312    "Warning: card matches multiple entries.  Report to imp@freebsd.org\n");
313				ed_pccard_print_entry(pp);
314				first = 0;
315			}
316			ed_pccard_print_entry(pp2);
317		}
318
319		return (0);
320	}
321	return (ENXIO);
322}
323
324static int
325ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
326{
327	struct ed_softc *sc = device_get_softc(dev);
328	uint8_t romdata[32];
329	int i;
330
331	/*
332	 * Read in the rom data at location 0.  Since there are no
333	 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
334	 *
335	 * In researching what format this takes, I've found that the
336	 * following appears to be true for multiple cards based on
337	 * observation as well as datasheet digging.
338	 *
339	 * Data is stored in some ROM and is copied out 8 bits at a time
340	 * into 16-bit wide locations.  This means that the odd locations
341	 * of the ROM are not used (and can be either 0 or ff).
342	 *
343	 * The contents appears to be as follows:
344	 * PROM   RAM
345	 * Offset Offset	What
346	 *  0      0	ENETADDR 0
347	 *  1      2	ENETADDR 1
348	 *  2      4	ENETADDR 2
349	 *  3      6	ENETADDR 3
350	 *  4      8	ENETADDR 4
351	 *  5     10	ENETADDR 5
352	 *  6-13  12-26 Reserved (varies by manufacturer)
353	 * 14     28	0x57
354	 * 15     30    0x57
355	 *
356	 * Some manufacturers have another image of enetaddr from
357	 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
358	 * this doesn't appear to be universally documented in the
359	 * datasheets.  Some manufactuers have a card type, card config
360	 * checksums, etc encoded into PROM offset 6-13, but deciphering it
361	 * requires more knowledge about the exact underlying chipset than
362	 * we possess (and maybe can possess).
363	 */
364	ed_pio_readmem(sc, 0, romdata, 32);
365	if (bootverbose)
366		device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
367	if (romdata[28] != 0x57 || romdata[30] != 0x57)
368		return (0);
369	for (i = 0; i < ETHER_ADDR_LEN; i++)
370		enaddr[i] = romdata[i * 2];
371	return (1);
372}
373
374static int
375ed_pccard_add_modem(device_t dev)
376{
377	struct ed_softc *sc = device_get_softc(dev);
378
379	device_printf(dev, "Need to write this code: modem rid is %d\n",
380	    sc->modem_rid);
381	return 0;
382}
383
384static int
385ed_pccard_kick_phy(struct ed_softc *sc)
386{
387	struct mii_softc *miisc;
388	struct mii_data *mii;
389
390	/*
391	 * Many of the PHYs that wind up on PC Cards are weird in
392	 * this way.  Generally, we don't need to worry so much about
393	 * the Isolation protocol since there's only one PHY in
394	 * these designs, so this workaround is reasonable.
395	 */
396	mii = device_get_softc(sc->miibus);
397	LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
398		miisc->mii_flags |= MIIF_FORCEANEG;
399		mii_phy_reset(miisc);
400	}
401	return (mii_mediachg(mii));
402}
403
404static int
405ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
406{
407	struct mii_data *mii;
408
409	if (sc->miibus == NULL)
410		return (EINVAL);
411	mii = device_get_softc(sc->miibus);
412	return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
413}
414
415
416static void
417ed_pccard_mediachg(struct ed_softc *sc)
418{
419	struct mii_data *mii;
420
421	if (sc->miibus == NULL)
422		return;
423	mii = device_get_softc(sc->miibus);
424	mii_mediachg(mii);
425}
426
427static void
428ed_pccard_tick(void *arg)
429{
430	struct ed_softc *sc = arg;
431	struct mii_data *mii;
432	int media = 0;
433
434	ED_ASSERT_LOCKED(sc);
435	if (sc->miibus != NULL) {
436		mii = device_get_softc(sc->miibus);
437		media = mii->mii_media_status;
438		mii_tick(mii);
439		if (mii->mii_media_status & IFM_ACTIVE &&
440		    media != mii->mii_media_status && 0 &&
441		    sc->chip_type == ED_CHIP_TYPE_DL10022) {
442			ed_asic_outb(sc, ED_DL100XX_DIAG,
443			    (mii->mii_media_active & IFM_FDX) ?
444			    ED_DL100XX_COLLISON_DIS : 0);
445		}
446
447	}
448	callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc);
449}
450
451static int
452ed_pccard_attach(device_t dev)
453{
454	u_char sum;
455	u_char enaddr[ETHER_ADDR_LEN];
456	const struct ed_product *pp;
457	int	error, i, flags;
458	struct ed_softc *sc = device_get_softc(dev);
459	u_long size;
460	static uint16_t *intr_vals[] = {NULL, NULL};
461
462	sc->dev = dev;
463	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
464	    (const struct pccard_product *) ed_pccard_products,
465	    sizeof(ed_pccard_products[0]), NULL)) == NULL)
466		return (ENXIO);
467	sc->modem_rid = -1;
468	if (pp->flags & NE2000DVF_MODEM) {
469		sc->port_rid = -1;
470		for (i = 0; i < 4; i++) {
471			size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
472			if (size == ED_NOVELL_IO_PORTS)
473				sc->port_rid = i;
474			else if (size == 8)
475				sc->modem_rid = i;
476		}
477		if (sc->port_rid == -1) {
478			device_printf(dev, "Cannot locate my ports!\n");
479			return (ENXIO);
480		}
481	} else {
482		sc->port_rid = 0;
483	}
484	/* Allocate the port resource during setup. */
485	error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS);
486	if (error)
487		return (error);
488	error = ed_alloc_irq(dev, 0, 0);
489	if (error)
490		goto bad;
491
492	/*
493	 * Determine which chipset we are.  All the PC Card chipsets have the
494	 * ASIC and NIC offsets in the same place.
495	 */
496	sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
497	sc->nic_offset  = ED_NOVELL_NIC_OFFSET;
498	error = ENXIO;
499	flags = device_get_flags(dev);
500	if (error != 0)
501		error = ed_pccard_dl100xx(dev, pp);
502	if (error != 0)
503		error = ed_pccard_ax88x90(dev, pp);
504	if (error != 0)
505		error = ed_pccard_tc5299j(dev, pp);
506	if (error != 0)
507		error = ed_probe_Novell_generic(dev, flags);
508	if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
509		flags |= ED_FLAGS_TOSH_ETHER;
510		flags |= ED_FLAGS_PCCARD;
511		sc->asic_offset = ED_WD_ASIC_OFFSET;
512		sc->nic_offset  = ED_WD_NIC_OFFSET;
513		error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
514	}
515	if (error)
516		goto bad;
517
518	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
519	    NULL, edintr, sc, &sc->irq_handle);
520	if (error) {
521		device_printf(dev, "setup intr failed %d \n", error);
522		goto bad;
523	}
524
525	/*
526	 * For the older cards, we have to get the MAC address from
527	 * the card in some way.  Let's try the standard PCMCIA way
528	 * first.  If that fails, then check to see if we have valid
529	 * data from the standard NE-2000 data roms.  If that fails,
530	 * check to see if the card has a hint about where to look in
531	 * its CIS.  If that fails, maybe we should look at some
532	 * default value.  In all fails, we should fail the attach,
533	 * but don't right now.
534	 */
535	for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
536		sum |= sc->enaddr[i];
537	if (sc->chip_type == ED_CHIP_TYPE_DP8390 && sum == 0) {
538		pccard_get_ether(dev, enaddr);
539		if (bootverbose)
540			device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
541		for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
542			sum |= enaddr[i];
543		if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
544			if (bootverbose)
545				device_printf(dev, "ROM mac %6D\n", enaddr,
546				    ":");
547			sum++;
548		}
549		if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
550			for (i = 0; i < ETHER_ADDR_LEN; i++) {
551				pccard_attr_read_1(dev, pp->enoff + i * 2,
552				    enaddr + i);
553				sum |= enaddr[i];
554			}
555			if (bootverbose)
556				device_printf(dev, "Hint %x MAC %6D\n",
557				    pp->enoff, enaddr, ":");
558		}
559		if (sum == 0) {
560			for (i = 0; i < ETHER_ADDR_LEN; i++) {
561				pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
562				    i * 2, enaddr + i);
563				sum |= enaddr[i];
564			}
565			if (bootverbose)
566				device_printf(dev, "Fallback MAC %6D\n",
567				    enaddr, ":");
568		}
569		if (sum == 0) {
570			device_printf(dev, "Cannot extract MAC address.\n");
571			ed_release_resources(dev);
572			return (ENXIO);
573		}
574		bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
575	}
576
577	error = ed_attach(dev);
578	if (error)
579		goto bad;
580 	if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
581	    sc->chip_type == ED_CHIP_TYPE_DL10022) {
582		/* Probe for an MII bus, but ignore errors. */
583		ed_pccard_dl100xx_mii_reset(sc);
584		(void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
585		    ed_ifmedia_sts);
586	} else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
587	    sc->chip_type == ED_CHIP_TYPE_AX88790) {
588		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
589		     ed_ifmedia_sts)) != 0) {
590			device_printf(dev, "Missing mii %d!\n", error);
591			goto bad;
592		}
593
594	} else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
595		ed_pccard_tc5299j_mii_reset(sc);
596		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
597		     ed_ifmedia_sts)) != 0) {
598			device_printf(dev, "Missing mii!\n");
599			goto bad;
600		}
601
602	}
603	if (sc->miibus != NULL) {
604		sc->sc_tick = ed_pccard_tick;
605		sc->sc_mediachg = ed_pccard_mediachg;
606		sc->sc_media_ioctl = ed_pccard_media_ioctl;
607		ed_pccard_kick_phy(sc);
608	}
609	if (sc->modem_rid != -1)
610		ed_pccard_add_modem(dev);
611	return (0);
612bad:
613	ed_detach(dev);
614	return (error);
615}
616
617/*
618 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
619 * and compatible cards (DL10019C Ethernet controller).
620 *
621 * Note: The PAO patches try to use more memory for the card, but that
622 * seems to fail for my card.  A future optimization would add this back
623 * conditionally.
624 */
625static int
626ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
627{
628	struct ed_softc *sc = device_get_softc(dev);
629	u_char sum;
630	uint8_t id;
631	int i, error;
632
633	if (!(pp->flags & NE2000DVF_DL100XX))
634		return (ENXIO);
635	if (bootverbose)
636		device_printf(dev, "Trying DL100xx probing\n");
637	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
638	if (bootverbose && error)
639		device_printf(dev, "Novell generic probe failed: %d\n", error);
640	if (error != 0)
641		return (error);
642
643	/*
644	 * Linksys registers(offset from ASIC base)
645	 *
646	 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
647	 * 0x0A      : Card ID Register (CIR)
648	 * 0x0B      : Check Sum Register (SR)
649	 */
650	for (sum = 0, i = 0x04; i < 0x0c; i++)
651		sum += ed_asic_inb(sc, i);
652	if (sum != 0xff) {
653		if (bootverbose)
654			device_printf(dev, "Bad checksum %#x\n", sum);
655		return (ENXIO);		/* invalid DL10019C */
656	}
657	if (bootverbose)
658		device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
659	for (i = 0; i < ETHER_ADDR_LEN; i++)
660		sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
661	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
662	id = ed_asic_inb(sc, 0xf);
663	sc->isa16bit = 1;
664	sc->vendor = ED_VENDOR_NOVELL;
665	sc->type = ED_TYPE_NE2000;
666	sc->chip_type = (id & 0x90) == 0x90 ?
667	    ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
668	sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
669	sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
670	sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
671	return (0);
672}
673
674/* MII bit-twiddling routines for cards using Dlink chipset */
675#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
676    ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
677#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
678    ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
679
680static void
681ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
682{
683	if (sc->chip_type != ED_CHIP_TYPE_DL10022)
684		return;
685
686	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
687	DELAY(10);
688	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
689	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
690	DELAY(10);
691	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
692	DELAY(10);
693	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
694	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
695	DELAY(10);
696	ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
697}
698
699static void
700ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
701{
702	int i;
703
704	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
705		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_22);
706	else
707		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_19);
708
709	for (i = nbits - 1; i >= 0; i--) {
710		if ((val >> i) & 1)
711			DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
712		else
713			DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
714		DELAY(10);
715		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
716		DELAY(10);
717		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
718		DELAY(10);
719	}
720}
721
722static u_int
723ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
724{
725	int i;
726	u_int val = 0;
727
728	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
729		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_22);
730	else
731		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_19);
732
733	for (i = nbits - 1; i >= 0; i--) {
734		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
735		DELAY(10);
736		val <<= 1;
737		if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
738			val++;
739		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
740		DELAY(10);
741	}
742	return val;
743}
744
745static void
746ed_pccard_ax88x90_reset(struct ed_softc *sc)
747{
748	int i;
749
750	/* Reset Card */
751	ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
752	ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
753
754	/* Wait for the RST bit to assert, but cap it at 10ms */
755	for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
756	     i--)
757		continue;
758	ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST);	/* ACK INTR */
759	if (i == 0)
760		device_printf(sc->dev, "Reset didn't finish\n");
761}
762
763/*
764 * Probe and vendor-specific initialization routine for ax88x90 boards
765 */
766static int
767ed_probe_ax88x90_generic(device_t dev, int flags)
768{
769	struct ed_softc *sc = device_get_softc(dev);
770	u_int   memsize;
771	static char test_pattern[32] = "THIS is A memory TEST pattern";
772	char    test_buffer[32];
773
774	ed_pccard_ax88x90_reset(sc);
775	DELAY(10*1000);
776
777	/* Make sure that we really have an 8390 based board */
778	if (!ed_probe_generic8390(sc))
779		return (ENXIO);
780
781	sc->vendor = ED_VENDOR_NOVELL;
782	sc->mem_shared = 0;
783	sc->cr_proto = ED_CR_RD2;
784
785	/*
786	 * This prevents packets from being stored in the NIC memory when the
787	 * readmem routine turns on the start bit in the CR.  We write some
788	 * bytes in word mode and verify we can read them back.  If we can't
789	 * then we don't have an AX88x90 chip here.
790	 */
791	sc->isa16bit = 1;
792	ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
793	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
794	ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
795	ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
796	if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
797		return (ENXIO);
798
799	/*
800	 * Hard code values based on the datasheet.  We're NE-2000 compatible
801	 * NIC with 16kb of packet memory starting at 16k offset.
802	 */
803	sc->type = ED_TYPE_NE2000;
804	memsize = sc->mem_size = 16*1024;
805	sc->mem_start = 16 * 1024;
806	if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
807		sc->chip_type = ED_CHIP_TYPE_AX88790;
808	else {
809		sc->chip_type = ED_CHIP_TYPE_AX88190;
810		/*
811		 * The AX88190 (not A) has external 64k SRAM.  Probe for this
812		 * here.  Most of the cards I have either use the AX88190A
813		 * part, or have only 32k SRAM for some reason, so I don't
814		 * know if this works or not.
815		 */
816		ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern));
817		ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern));
818		if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
819			sc->mem_start = 2*1024;
820			memsize = sc->mem_size = 62 * 1024;
821		}
822	}
823	sc->mem_end = sc->mem_start + memsize;
824	sc->tx_page_start = memsize / ED_PAGE_SIZE;
825	if (sc->mem_size > 16 * 1024)
826		sc->txb_cnt = 3;
827	else
828		sc->txb_cnt = 2;
829	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
830	sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
831
832	sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
833
834	ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
835	ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
836
837	/* Get the mac before we go -- It's just at 0x400 in "SRAM" */
838	ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN);
839
840	/* clear any pending interrupts that might have occurred above */
841	ed_nic_outb(sc, ED_P0_ISR, 0xff);
842	sc->sc_write_mbufs = ed_pio_write_mbufs;
843	return (0);
844}
845
846static int
847ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
848{
849	int	i, id;
850
851	/*
852	 * All AX88x90 devices have MII and a PHY, so we use this to weed out
853	 * chips that would otherwise make it through the tests we have after
854	 * this point.
855	 */
856	for (i = 0; i < 32; i++) {
857		id = ed_miibus_readreg(dev, i, MII_BMSR);
858		if (id != 0 && id != 0xffff)
859			break;
860	}
861	/*
862	 * Found one, we're good.
863	 */
864	if (i != 32)
865		return (0);
866	/*
867	 * Didn't find anything, so try to power up and try again.  The PHY
868	 * may be not responding because we're in power down mode.
869	 */
870	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
871		return (ENXIO);
872	pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
873	for (i = 0; i < 32; i++) {
874		id = ed_miibus_readreg(dev, i, MII_BMSR);
875		if (id != 0 && id != 0xffff)
876			break;
877	}
878	/*
879	 * Still no joy?  We're AFU, punt.
880	 */
881	if (i == 32)
882		return (ENXIO);
883	return (0);
884
885}
886
887/*
888 * Special setup for AX88[17]90
889 */
890static int
891ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
892{
893	int	error;
894	int iobase;
895	struct	ed_softc *sc = device_get_softc(dev);
896
897	if (!(pp->flags & NE2000DVF_AX88X90))
898		return (ENXIO);
899
900	if (bootverbose)
901		device_printf(dev, "Checking AX88x90\n");
902
903	/*
904	 * Set the IOBASE Register.  The AX88x90 cards are potentially
905	 * multifunction cards, and thus requires a slight workaround.
906	 * We write the address the card is at, on the off chance that this
907	 * card is not MFC.
908	 * XXX I'm not sure that this is still needed...
909	 */
910	iobase = rman_get_start(sc->port_res);
911	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
912	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
913
914	sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
915	sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
916	error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
917	if (error) {
918		if (bootverbose)
919			device_printf(dev, "probe ax88x90 failed %d\n",
920			    error);
921		goto fail;
922	}
923	error = ed_pccard_ax88x90_check_mii(dev, sc);
924	if (error)
925		goto fail;
926	sc->vendor = ED_VENDOR_NOVELL;
927	sc->type = ED_TYPE_NE2000;
928	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
929		sc->type_str = "AX88190";
930	else
931		sc->type_str = "AX88790";
932	return (0);
933fail:;
934	sc->mii_readbits = 0;
935	sc->mii_writebits = 0;
936	return (error);
937}
938
939static void
940ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
941{
942	int i, data;
943
944	for (i = nbits - 1; i >= 0; i--) {
945		data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
946		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
947		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
948	}
949}
950
951static u_int
952ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
953{
954	int i;
955	u_int val = 0;
956	uint8_t mdio;
957
958	mdio = ED_AX88X90_MII_DIRIN;
959	for (i = nbits - 1; i >= 0; i--) {
960		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
961		val <<= 1;
962		if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
963			val++;
964		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
965	}
966	printf("AX88x90 %#x+%#x Reading %d bits: %x\n", (unsigned int)sc->port_bsh, sc->asic_offset, nbits, val);
967	return val;
968}
969
970/*
971 * Special setup for TC5299J
972 */
973static int
974ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
975{
976	int	error, i, id;
977	char *ts;
978	struct	ed_softc *sc = device_get_softc(dev);
979
980	if (!(pp->flags & NE2000DVF_TC5299J))
981		return (ENXIO);
982
983	if (bootverbose)
984		device_printf(dev, "Checking Tc5299j\n");
985
986	/*
987	 * Check to see if we have a MII PHY ID at any of the first 32
988	 * locations.  All TC5299J devices have MII and a PHY, so we use
989	 * this to weed out chips that would otherwise make it through
990	 * the tests we have after this point.
991	 */
992	sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
993	sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
994	for (i = 0; i < 32; i++) {
995		id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
996		if (id != 0 && id != 0xffff)
997			break;
998	}
999	if (i == 32) {
1000		sc->mii_readbits = 0;
1001		sc->mii_writebits = 0;
1002		return (ENXIO);
1003	}
1004
1005	ts = "TC5299J";
1006	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
1007	if (bootverbose)
1008		device_printf(dev, "probe novel returns %d\n", error);
1009	if (error != 0) {
1010		sc->mii_readbits = 0;
1011		sc->mii_writebits = 0;
1012		return (error);
1013	}
1014	if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
1015		sc->mii_readbits = 0;
1016		sc->mii_writebits = 0;
1017		return (ENXIO);
1018	}
1019	sc->vendor = ED_VENDOR_NOVELL;
1020	sc->type = ED_TYPE_NE2000;
1021	sc->chip_type = ED_CHIP_TYPE_TC5299J;
1022	sc->type_str = ts;
1023	return (0);
1024}
1025
1026/* MII bit-twiddling routines for cards using TC5299J chipset */
1027#define TC5299J_MIISET(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \
1028    ed_nic_inb(sc, ED_TC5299J_MIIBUS) | (x))
1029#define TC5299J_MIICLR(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \
1030    ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ~(x))
1031
1032static void
1033ed_pccard_tc5299j_mii_reset(struct ed_softc *sc)
1034{
1035	/* Do nothing! */
1036}
1037
1038static void
1039ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
1040{
1041	int i;
1042	uint8_t cr;
1043
1044	cr = ed_nic_inb(sc, ED_P0_CR);
1045	ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1046
1047	TC5299J_MIICLR(sc, ED_TC5299J_MII_DIROUT);
1048	for (i = nbits - 1; i >= 0; i--) {
1049		if ((val >> i) & 1)
1050			TC5299J_MIISET(sc, ED_TC5299J_MII_DATAOUT);
1051		else
1052			TC5299J_MIICLR(sc, ED_TC5299J_MII_DATAOUT);
1053		TC5299J_MIISET(sc, ED_TC5299J_MII_CLK);
1054		TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK);
1055	}
1056	ed_nic_outb(sc, ED_P0_CR, cr);
1057}
1058
1059static u_int
1060ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
1061{
1062	int i;
1063	u_int val = 0;
1064	uint8_t cr;
1065
1066	printf("Reading %d bits\n", nbits);
1067	cr = ed_nic_inb(sc, ED_P0_CR);
1068	ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1069
1070	TC5299J_MIISET(sc, ED_TC5299J_MII_DIROUT);
1071	for (i = nbits - 1; i >= 0; i--) {
1072		TC5299J_MIISET(sc, ED_TC5299J_MII_CLK);
1073		val <<= 1;
1074		if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
1075			val++;
1076		TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK);
1077	}
1078	ed_nic_outb(sc, ED_P0_CR, cr);
1079	return val;
1080}
1081
1082/*
1083 * MII bus support routines.
1084 */
1085static int
1086ed_miibus_readreg(device_t dev, int phy, int reg)
1087{
1088	struct ed_softc *sc;
1089	int failed, val;
1090
1091	sc = device_get_softc(dev);
1092	/*
1093	 * The AX88790 has an interesting quirk.  It has an internal phy that
1094	 * needs a special bit set to access, but can also have additional
1095	 * external PHYs set for things like HomeNET media.  When accessing
1096	 * the internal PHY, a bit has to be set, when accessing the external
1097	 * PHYs, it must be clear.  See Errata 1, page 51, in the AX88790
1098	 * datasheet for more details.
1099	 *
1100	 * Also, PHYs above 16 appear to be phantoms on some cards, but not
1101	 * others.  Registers read for this are often the same as prior values
1102	 * read.  Filter all register requests to 17-31.
1103	 *
1104	 * I can't explain it, since I don't have the DL100xx data sheets, but
1105	 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90
1106	 * chips have 14.  The linux pcnet and axnet drivers confirm this.
1107	 */
1108	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1109		if (phy > 0x10)
1110			return (0);
1111		if (phy == 0x10)
1112			ed_asic_outb(sc, ED_AX88X90_GPIO,
1113			    ED_AX88X90_GPIO_INT_PHY);
1114		else
1115			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1116	}
1117
1118	(*sc->mii_writebits)(sc, 0xffffffff, 32);
1119	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1120	(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
1121	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1122	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1123	if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
1124	    sc->chip_type == ED_CHIP_TYPE_AX88190)
1125		(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1126	failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1127	val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
1128	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1129	printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed);
1130	return (failed ? 0 : val);
1131}
1132
1133static int
1134ed_miibus_writereg(device_t dev, int phy, int reg, int data)
1135{
1136	struct ed_softc *sc;
1137
1138	printf("Writing phy %d reg %#x data %#x\n", phy, reg, data);
1139	sc = device_get_softc(dev);
1140	/* See ed_miibus_readreg for details */
1141	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1142		if (phy > 0x10)
1143			return (0);
1144		if (phy == 0x10)
1145			ed_asic_outb(sc, ED_AX88X90_GPIO,
1146			    ED_AX88X90_GPIO_INT_PHY);
1147		else
1148			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1149	}
1150	(*sc->mii_writebits)(sc, 0xffffffff, 32);
1151	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1152	(*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
1153	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1154	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1155	(*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
1156	(*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
1157	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1158	return (0);
1159}
1160
1161static int
1162ed_ifmedia_upd(struct ifnet *ifp)
1163{
1164	struct ed_softc *sc;
1165	int error;
1166
1167	sc = ifp->if_softc;
1168	if (sc->miibus == NULL)
1169		return (ENXIO);
1170	ED_LOCK(sc);
1171	error = ed_pccard_kick_phy(sc);
1172	ED_UNLOCK(sc);
1173	return (error);
1174}
1175
1176static void
1177ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1178{
1179	struct ed_softc *sc;
1180	struct mii_data *mii;
1181
1182	sc = ifp->if_softc;
1183	if (sc->miibus == NULL)
1184		return;
1185
1186	mii = device_get_softc(sc->miibus);
1187	mii_pollstat(mii);
1188	ifmr->ifm_active = mii->mii_media_active;
1189	ifmr->ifm_status = mii->mii_media_status;
1190}
1191
1192static void
1193ed_child_detached(device_t dev, device_t child)
1194{
1195	struct ed_softc *sc;
1196
1197	sc = device_get_softc(dev);
1198	if (child == sc->miibus)
1199		sc->miibus = NULL;
1200}
1201
1202static device_method_t ed_pccard_methods[] = {
1203	/* Device interface */
1204	DEVMETHOD(device_probe,		ed_pccard_probe),
1205	DEVMETHOD(device_attach,	ed_pccard_attach),
1206	DEVMETHOD(device_detach,	ed_detach),
1207
1208	/* Bus interface */
1209	DEVMETHOD(bus_child_detached,	ed_child_detached),
1210
1211	/* MII interface */
1212	DEVMETHOD(miibus_readreg,	ed_miibus_readreg),
1213	DEVMETHOD(miibus_writereg,	ed_miibus_writereg),
1214
1215	{ 0, 0 }
1216};
1217
1218static driver_t ed_pccard_driver = {
1219	"ed",
1220	ed_pccard_methods,
1221	sizeof(struct ed_softc)
1222};
1223
1224DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
1225DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
1226MODULE_DEPEND(ed, miibus, 1, 1, 1);
1227MODULE_DEPEND(ed, ether, 1, 1, 1);
1228