if_ed_pccard.c revision 190583
1/*-
2 * Copyright (c) 2005, M. Warner Losh
3 * Copyright (c) 1995, David Greenman
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice unmodified, this list of conditions, and the following
11 *    disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 190583 2009-03-31 01:59:47Z imp $
29 */
30
31/*
32 * Notes for adding media support.  Each chipset is somewhat different
33 * from the others.  Linux has a table of OIDs that it uses to see what
34 * supports the misc register of the NS83903.  But a sampling of datasheets
35 * I could dig up on cards I own paints a different picture.
36 *
37 * Chipset specific details:
38 * NS 83903/902A paired
39 *    ccr base 0x1020
40 *    id register at 0x1000: 7-3 = 0, 2-0 = 1.
41 *	(maybe this test is too week)
42 *    misc register at 0x018:
43 *	6 WAIT_TOUTENABLE enable watchdog timeout
44 *	3 AUI/TPI 1 AUX, 0 TPI
45 *	2 loopback
46 *      1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47 *	0 0-no mam, 1 mam connected
48 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
49 * and the NEC PC9801N-J12 ccr base 0x2000!
50 *
51 * winbond 289c926
52 *    ccr base 0xfd0
53 *    cfb (am 0xff2):
54 *	0-1 PHY01	00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
55 *	2 LNKEN		0 - enable link and auto switch, 1 disable
56 *	3 LNKSTS	TPI + LNKEN=0 + link good == 1, else 0
57 *    sr (am 0xff4)
58 *	88 00 88 00 88 00, etc
59 *
60 * TMI tc3299a (cr PHY01 == 0)
61 *    ccr base 0x3f8
62 *    cra (io 0xa)
63 *    crb (io 0xb)
64 *	0-1 PHY01	00 auto, 01 res, 10 10B5, 11 TPI
65 *	2 GDLINK	1 disable checking of link
66 *	6 LINK		0 bad link, 1 good link
67 * TMI tc5299 10/100 chip, has a different MII interaction than
68 * dl100xx and ax88x90.
69 *
70 * EN5017A, EN5020	no data, but very popular
71 * Other chips?
72 * NetBSD supports RTL8019, but none have surfaced that I can see
73 */
74
75#include <sys/param.h>
76#include <sys/systm.h>
77#include <sys/socket.h>
78#include <sys/kernel.h>
79#include <sys/conf.h>
80#include <sys/uio.h>
81
82#include <sys/module.h>
83#include <sys/bus.h>
84#include <machine/bus.h>
85#include <sys/rman.h>
86#include <machine/resource.h>
87
88#include <net/ethernet.h>
89#include <net/if.h>
90#include <net/if_arp.h>
91#include <net/if_mib.h>
92#include <net/if_media.h>
93
94#include <dev/ed/if_edreg.h>
95#include <dev/ed/if_edvar.h>
96#include <dev/ed/ax88x90reg.h>
97#include <dev/ed/dl100xxreg.h>
98#include <dev/ed/tc5299jreg.h>
99#include <dev/pccard/pccardvar.h>
100#include <dev/pccard/pccardreg.h>
101#include <dev/pccard/pccard_cis.h>
102#include <dev/mii/mii.h>
103#include <dev/mii/miivar.h>
104
105#include "card_if.h"
106/* "device miibus" required.  See GENERIC if you get errors here. */
107#include "miibus_if.h"
108#include "pccarddevs.h"
109
110/*
111 * NE-2000 based PC Cards have a number of ways to get the MAC address.
112 * Some cards encode this as a FUNCE.  Others have this in the ROMs the
113 * same way that ISA cards do.  Some have it encoded in the attribute
114 * memory somewhere that isn't in the CIS.  Some new chipsets have it
115 * in special registers in the ASIC part of the chip.
116 *
117 * For those cards that have the MAC adress stored in attribute memory,
118 * nearly all of them have it at a fixed offset (0xff0).  We use that
119 * offset as a source of last resource if other offsets have failed.
120 */
121#define ED_DEFAULT_MAC_OFFSET	0xff0
122
123static const struct ed_product {
124	struct pccard_product	prod;
125	int flags;
126#define	NE2000DVF_DL100XX	0x0001		/* chip is D-Link DL10019/22 */
127#define	NE2000DVF_AX88X90	0x0002		/* chip is ASIX AX88[17]90 */
128#define NE2000DVF_TC5299J	0x0004		/* chip is Tamarack TC5299J */
129#define NE2000DVF_TOSHIBA	0x0008		/* Toshiba DP83902A */
130#define NE2000DVF_ENADDR	0x0100		/* Get MAC from attr mem */
131#define NE2000DVF_ANYFUNC	0x0200		/* Allow any function type */
132#define NE2000DVF_MODEM		0x0400		/* Has a modem/serial */
133	int enoff;
134} ed_pccard_products[] = {
135	{ PCMCIA_CARD(ACCTON, EN2212), 0},
136	{ PCMCIA_CARD(ACCTON, EN2216), 0},
137	{ PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
138	{ PCMCIA_CARD(AMBICOM, AMB8002T), 0},
139	{ PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
140	{ PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
141	{ PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
142	{ PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
143	{ PCMCIA_CARD(BROMAX, IPORT), 0},
144	{ PCMCIA_CARD(BROMAX, IPORT2), 0},
145	{ PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
146	{ PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
147	{ PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
148	{ PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
149	{ PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
150	{ PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
151	{ PCMCIA_CARD(CNET, NE2000), 0},
152	{ PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
153	{ PCMCIA_CARD(COMPEX, LANMODEM), 0},
154	{ PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
155	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
156	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
157	{ PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
158	{ PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
159	{ PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
160	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
161	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
162	{ PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
163	{ PCMCIA_CARD(COREGA, LAPCCTXD), 0},
164	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
165	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
166	{ PCMCIA_CARD(DLINK, DE650), 0 },
167	{ PCMCIA_CARD(DLINK, DE660), 0 },
168	{ PCMCIA_CARD(DLINK, DE660PLUS), 0},
169	{ PCMCIA_CARD(DYNALINK, L10C), 0},
170	{ PCMCIA_CARD(EDIMAX, EP4000A), 0},
171	{ PCMCIA_CARD(EPSON, EEN10B), NE2000DVF_ENADDR, 0xff0},
172	{ PCMCIA_CARD(EXP, THINLANCOMBO), 0},
173	{ PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
174	{ PCMCIA_CARD(GREY_CELL, TDK3000), 0},
175	{ PCMCIA_CARD(GREY_CELL, DMF650TX),
176	    NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
177	{ PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
178	{ PCMCIA_CARD(IBM, INFOMOVER), NE2000DVF_ENADDR, 0xff0},
179	{ PCMCIA_CARD(IODATA3, PCLAT), 0},
180	{ PCMCIA_CARD(KINGSTON, CIO10T), 0},
181	{ PCMCIA_CARD(KINGSTON, KNE2), 0},
182	{ PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
183	{ PCMCIA_CARD(LINKSYS, COMBO_ECARD),
184	    NE2000DVF_DL100XX | NE2000DVF_AX88X90},
185	{ PCMCIA_CARD(LINKSYS, ECARD_1), 0},
186	{ PCMCIA_CARD(LINKSYS, ECARD_2), 0},
187	{ PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
188	{ PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
189	{ PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
190	{ PCMCIA_CARD(MAGICRAM, ETHER), 0},
191	{ PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
192	{ PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
193	{ PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
194	{ PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
195	{ PCMCIA_CARD(NDC, ND5100_E), 0},
196	{ PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
197	/* Same ID as DLINK DFE-670TXD.  670 has DL10022, fa411 has ax88790 */
198	{ PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
199	{ PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
200	{ PCMCIA_CARD(NEWMEDIA, LANSURFER), 0},
201	{ PCMCIA_CARD(OEM2, ETHERNET), 0},
202	{ PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90 },
203	{ PCMCIA_CARD(OEM2, NE2000), 0},
204	{ PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
205	{ PCMCIA_CARD(PREMAX, PE200), 0},
206	{ PCMCIA_CARD(PSION, LANGLOBAL),
207	    NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
208	{ PCMCIA_CARD(RACORE, ETHERNET), 0},
209	{ PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
210	{ PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
211	{ PCMCIA_CARD(RELIA, COMBO), 0},
212	{ PCMCIA_CARD(RIOS, PCCARD3), 0},
213	{ PCMCIA_CARD(RPTI, EP400), 0},
214	{ PCMCIA_CARD(RPTI, EP401), 0},
215	{ PCMCIA_CARD(SMC, EZCARD), 0},
216	{ PCMCIA_CARD(SOCKET, EA_ETHER), 0},
217	{ PCMCIA_CARD(SOCKET, ES_1000), 0},
218	{ PCMCIA_CARD(SOCKET, LP_ETHER), 0},
219	{ PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
220	{ PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
221	{ PCMCIA_CARD(SVEC, COMBOCARD), 0},
222	{ PCMCIA_CARD(SVEC, LANCARD), 0},
223	{ PCMCIA_CARD(TAMARACK, ETHERNET), 0},
224	{ PCMCIA_CARD(TDK, CFE_10), 0},
225	{ PCMCIA_CARD(TDK, LAK_CD031), 0},
226	{ PCMCIA_CARD(TDK, DFL5610WS), 0},
227	{ PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
228	{ PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
229	{ PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
230	{ PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
231	{ PCMCIA_CARD(ZONET, ZEN), 0},
232	{ { NULL } }
233};
234
235/*
236 *      PC Card (PCMCIA) specific code.
237 */
238static int	ed_pccard_probe(device_t);
239static int	ed_pccard_attach(device_t);
240
241static int	ed_pccard_dl100xx(device_t dev, const struct ed_product *);
242static void	ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
243static u_int	ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
244static void	ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
245    int nbits);
246
247static int	ed_pccard_ax88x90(device_t dev, const struct ed_product *);
248static u_int	ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
249static void	ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
250    int nbits);
251
252static int	ed_miibus_readreg(device_t dev, int phy, int reg);
253static int	ed_ifmedia_upd(struct ifnet *);
254static void	ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
255
256static int	ed_pccard_tc5299j(device_t dev, const struct ed_product *);
257static void	ed_pccard_tc5299j_mii_reset(struct ed_softc *sc);
258static u_int	ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
259static void	ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
260    int nbits);
261
262static void
263ed_pccard_print_entry(const struct ed_product *pp)
264{
265	int i;
266
267	printf("Product entry: ");
268	if (pp->prod.pp_name)
269		printf("name='%s',", pp->prod.pp_name);
270	printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
271	    pp->prod.pp_product);
272	for (i = 0; i < 4; i++)
273		if (pp->prod.pp_cis[i])
274			printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
275	printf("\n");
276}
277
278static int
279ed_pccard_probe(device_t dev)
280{
281	const struct ed_product *pp, *pp2;
282	int		error, first = 1;
283	uint32_t	fcn = PCCARD_FUNCTION_UNSPEC;
284
285	/* Make sure we're a network function */
286	error = pccard_get_function(dev, &fcn);
287	if (error != 0)
288		return (error);
289
290	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
291	    (const struct pccard_product *) ed_pccard_products,
292	    sizeof(ed_pccard_products[0]), NULL)) != NULL) {
293		if (pp->prod.pp_name != NULL)
294			device_set_desc(dev, pp->prod.pp_name);
295		/*
296		 * Some devices don't ID themselves as network, but
297		 * that's OK if the flags say so.
298		 */
299		if (!(pp->flags & NE2000DVF_ANYFUNC) &&
300		    fcn != PCCARD_FUNCTION_NETWORK)
301			return (ENXIO);
302		/*
303		 * Some devices match multiple entries.  Report that
304		 * as a warning to help cull the table
305		 */
306		pp2 = pp;
307		while ((pp2 = (const struct ed_product *)pccard_product_lookup(
308		    dev, (const struct pccard_product *)(pp2 + 1),
309		    sizeof(ed_pccard_products[0]), NULL)) != NULL) {
310			if (first) {
311				device_printf(dev,
312    "Warning: card matches multiple entries.  Report to imp@freebsd.org\n");
313				ed_pccard_print_entry(pp);
314				first = 0;
315			}
316			ed_pccard_print_entry(pp2);
317		}
318
319		return (0);
320	}
321	return (ENXIO);
322}
323
324static int
325ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
326{
327	struct ed_softc *sc = device_get_softc(dev);
328	uint8_t romdata[32];
329	int i;
330
331	/*
332	 * Read in the rom data at location 0.  Since there are no
333	 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
334	 *
335	 * In researching what format this takes, I've found that the
336	 * following appears to be true for multiple cards based on
337	 * observation as well as datasheet digging.
338	 *
339	 * Data is stored in some ROM and is copied out 8 bits at a time
340	 * into 16-bit wide locations.  This means that the odd locations
341	 * of the ROM are not used (and can be either 0 or ff).
342	 *
343	 * The contents appears to be as follows:
344	 * PROM   RAM
345	 * Offset Offset	What
346	 *  0      0	ENETADDR 0
347	 *  1      2	ENETADDR 1
348	 *  2      4	ENETADDR 2
349	 *  3      6	ENETADDR 3
350	 *  4      8	ENETADDR 4
351	 *  5     10	ENETADDR 5
352	 *  6-13  12-26 Reserved (varies by manufacturer)
353	 * 14     28	0x57
354	 * 15     30    0x57
355	 *
356	 * Some manufacturers have another image of enetaddr from
357	 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
358	 * this doesn't appear to be universally documented in the
359	 * datasheets.  Some manufactuers have a card type, card config
360	 * checksums, etc encoded into PROM offset 6-13, but deciphering it
361	 * requires more knowledge about the exact underlying chipset than
362	 * we possess (and maybe can possess).
363	 */
364	ed_pio_readmem(sc, 0, romdata, 32);
365	if (bootverbose)
366		device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
367	if (romdata[28] != 0x57 || romdata[30] != 0x57)
368		return (0);
369	for (i = 0; i < ETHER_ADDR_LEN; i++)
370		enaddr[i] = romdata[i * 2];
371	return (1);
372}
373
374static int
375ed_pccard_add_modem(device_t dev)
376{
377	struct ed_softc *sc = device_get_softc(dev);
378
379	device_printf(dev, "Need to write this code: modem rid is %d\n",
380	    sc->modem_rid);
381	return 0;
382}
383
384static int
385ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
386{
387	struct mii_data *mii;
388
389	if (sc->miibus == NULL)
390		return (EINVAL);
391	mii = device_get_softc(sc->miibus);
392	return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
393}
394
395
396static void
397ed_pccard_mediachg(struct ed_softc *sc)
398{
399	struct mii_data *mii;
400
401	if (sc->miibus == NULL)
402		return;
403	mii = device_get_softc(sc->miibus);
404	mii_mediachg(mii);
405}
406
407static void
408ed_pccard_tick(void *arg)
409{
410	struct ed_softc *sc = arg;
411	struct mii_data *mii;
412	int media = 0;
413
414	ED_ASSERT_LOCKED(sc);
415	if (sc->miibus != NULL) {
416		mii = device_get_softc(sc->miibus);
417		media = mii->mii_media_status;
418		mii_tick(mii);
419		if (mii->mii_media_status & IFM_ACTIVE &&
420		    media != mii->mii_media_status && 0 &&
421		    sc->chip_type == ED_CHIP_TYPE_DL10022) {
422			ed_asic_outb(sc, ED_DL100XX_DIAG,
423			    (mii->mii_media_active & IFM_FDX) ?
424			    ED_DL100XX_COLLISON_DIS : 0);
425		}
426
427	}
428	callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc);
429}
430
431static int
432ed_pccard_attach(device_t dev)
433{
434	u_char sum;
435	u_char enaddr[ETHER_ADDR_LEN];
436	const struct ed_product *pp;
437	int	error, i, flags;
438	struct ed_softc *sc = device_get_softc(dev);
439	u_long size;
440	static uint16_t *intr_vals[] = {NULL, NULL};
441
442	sc->dev = dev;
443	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
444	    (const struct pccard_product *) ed_pccard_products,
445	    sizeof(ed_pccard_products[0]), NULL)) == NULL)
446		return (ENXIO);
447	sc->modem_rid = -1;
448	if (pp->flags & NE2000DVF_MODEM) {
449		sc->port_rid = -1;
450		for (i = 0; i < 4; i++) {
451			size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
452			if (size == ED_NOVELL_IO_PORTS)
453				sc->port_rid = i;
454			else if (size == 8)
455				sc->modem_rid = i;
456		}
457		if (sc->port_rid == -1) {
458			device_printf(dev, "Cannot locate my ports!\n");
459			return (ENXIO);
460		}
461	} else {
462		sc->port_rid = 0;
463	}
464	/* Allocate the port resource during setup. */
465	error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS);
466	if (error)
467		return (error);
468	error = ed_alloc_irq(dev, 0, 0);
469	if (error)
470		goto bad;
471
472	/*
473	 * Determine which chipset we are.  All the PC Card chipsets have the
474	 * ASIC and NIC offsets in the same place.
475	 */
476	sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
477	sc->nic_offset  = ED_NOVELL_NIC_OFFSET;
478	error = ENXIO;
479	flags = device_get_flags(dev);
480	if (error != 0)
481		error = ed_pccard_dl100xx(dev, pp);
482	if (error != 0)
483		error = ed_pccard_ax88x90(dev, pp);
484	if (error != 0)
485		error = ed_pccard_tc5299j(dev, pp);
486	if (error != 0)
487		error = ed_probe_Novell_generic(dev, flags);
488	if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
489		flags |= ED_FLAGS_TOSH_ETHER;
490		flags |= ED_FLAGS_PCCARD;
491		sc->asic_offset = ED_WD_ASIC_OFFSET;
492		sc->nic_offset  = ED_WD_NIC_OFFSET;
493		error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
494	}
495	if (error)
496		goto bad;
497
498	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
499	    NULL, edintr, sc, &sc->irq_handle);
500	if (error) {
501		device_printf(dev, "setup intr failed %d \n", error);
502		goto bad;
503	}
504
505	/*
506	 * For the older cards, we have to get the MAC address from
507	 * the card in some way.  Let's try the standard PCMCIA way
508	 * first.  If that fails, then check to see if we have valid
509	 * data from the standard NE-2000 data roms.  If that fails,
510	 * check to see if the card has a hint about where to look in
511	 * its CIS.  If that fails, maybe we should look at some
512	 * default value.  In all fails, we should fail the attach,
513	 * but don't right now.
514	 */
515	for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
516		sum |= sc->enaddr[i];
517	if (sc->chip_type == ED_CHIP_TYPE_DP8390 && sum == 0) {
518		pccard_get_ether(dev, enaddr);
519		if (bootverbose)
520			device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
521		for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
522			sum |= enaddr[i];
523		if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
524			if (bootverbose)
525				device_printf(dev, "ROM mac %6D\n", enaddr,
526				    ":");
527			sum++;
528		}
529		if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
530			for (i = 0; i < ETHER_ADDR_LEN; i++) {
531				pccard_attr_read_1(dev, pp->enoff + i * 2,
532				    enaddr + i);
533				sum |= enaddr[i];
534			}
535			if (bootverbose)
536				device_printf(dev, "Hint %x MAC %6D\n",
537				    pp->enoff, enaddr, ":");
538		}
539		if (sum == 0) {
540			for (i = 0; i < ETHER_ADDR_LEN; i++) {
541				pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
542				    i * 2, enaddr + i);
543				sum |= enaddr[i];
544			}
545			if (bootverbose)
546				device_printf(dev, "Fallback MAC %6D\n",
547				    enaddr, ":");
548		}
549		if (sum == 0) {
550			device_printf(dev, "Cannot extract MAC address.\n");
551			ed_release_resources(dev);
552			return (ENXIO);
553		}
554		bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
555	}
556
557	error = ed_attach(dev);
558	if (error)
559		goto bad;
560 	if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
561	    sc->chip_type == ED_CHIP_TYPE_DL10022) {
562		/* Probe for an MII bus, but ignore errors. */
563		ed_pccard_dl100xx_mii_reset(sc);
564		(void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
565		    ed_ifmedia_sts);
566	} else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
567	    sc->chip_type == ED_CHIP_TYPE_AX88790) {
568		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
569		     ed_ifmedia_sts)) != 0) {
570			device_printf(dev, "Missing mii %d!\n", error);
571			goto bad;
572		}
573
574	} else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
575		ed_pccard_tc5299j_mii_reset(sc);
576		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
577		     ed_ifmedia_sts)) != 0) {
578			device_printf(dev, "Missing mii!\n");
579			goto bad;
580		}
581
582	}
583	if (sc->miibus != NULL) {
584		sc->sc_tick = ed_pccard_tick;
585		sc->sc_mediachg = ed_pccard_mediachg;
586		sc->sc_media_ioctl = ed_pccard_media_ioctl;
587	}
588	if (sc->modem_rid != -1)
589		ed_pccard_add_modem(dev);
590	return (0);
591bad:
592	ed_detach(dev);
593	return (error);
594}
595
596/*
597 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
598 * and compatible cards (DL10019C Ethernet controller).
599 *
600 * Note: The PAO patches try to use more memory for the card, but that
601 * seems to fail for my card.  A future optimization would add this back
602 * conditionally.
603 */
604static int
605ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
606{
607	struct ed_softc *sc = device_get_softc(dev);
608	u_char sum;
609	uint8_t id;
610	int i, error;
611
612	if (!(pp->flags & NE2000DVF_DL100XX))
613		return (ENXIO);
614	if (bootverbose)
615		device_printf(dev, "Trying DL100xx probing\n");
616	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
617	if (bootverbose && error)
618		device_printf(dev, "Novell generic probe failed: %d\n", error);
619	if (error != 0)
620		return (error);
621
622	/*
623	 * Linksys registers(offset from ASIC base)
624	 *
625	 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
626	 * 0x0A      : Card ID Register (CIR)
627	 * 0x0B      : Check Sum Register (SR)
628	 */
629	for (sum = 0, i = 0x04; i < 0x0c; i++)
630		sum += ed_asic_inb(sc, i);
631	if (sum != 0xff) {
632		if (bootverbose)
633			device_printf(dev, "Bad checksum %#x\n", sum);
634		return (ENXIO);		/* invalid DL10019C */
635	}
636	if (bootverbose)
637		device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
638	for (i = 0; i < ETHER_ADDR_LEN; i++)
639		sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
640	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
641	id = ed_asic_inb(sc, 0xf);
642	sc->isa16bit = 1;
643	sc->vendor = ED_VENDOR_NOVELL;
644	sc->type = ED_TYPE_NE2000;
645	sc->chip_type = (id & 0x90) == 0x90 ?
646	    ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
647	sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
648	sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
649	sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
650	return (0);
651}
652
653/* MII bit-twiddling routines for cards using Dlink chipset */
654#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
655    ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
656#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
657    ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
658
659static void
660ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
661{
662	if (sc->chip_type != ED_CHIP_TYPE_DL10022)
663		return;
664
665	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
666	DELAY(10);
667	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
668	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
669	DELAY(10);
670	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
671	DELAY(10);
672	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
673	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
674	DELAY(10);
675	ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
676}
677
678static void
679ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
680{
681	int i;
682
683	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
684		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_22);
685	else
686		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_19);
687
688	for (i = nbits - 1; i >= 0; i--) {
689		if ((val >> i) & 1)
690			DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
691		else
692			DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
693		DELAY(10);
694		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
695		DELAY(10);
696		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
697		DELAY(10);
698	}
699}
700
701static u_int
702ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
703{
704	int i;
705	u_int val = 0;
706
707	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
708		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_22);
709	else
710		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_19);
711
712	for (i = nbits - 1; i >= 0; i--) {
713		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
714		DELAY(10);
715		val <<= 1;
716		if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
717			val++;
718		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
719		DELAY(10);
720	}
721	return val;
722}
723
724static void
725ed_pccard_ax88x90_reset(struct ed_softc *sc)
726{
727	int i;
728
729	/* Reset Card */
730	ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
731	ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
732
733	/* Wait for the interrupt to fire */
734	for (i = 10000; i > 0; i--)
735		if (ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST)
736			break;
737	ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST);	/* ACK INTR */
738	if (i == 0)
739		device_printf(sc->dev, "Reset didn't finish\n");
740}
741
742/*
743 * Probe and vendor-specific initialization routine for ax88x90 boards
744 */
745static int
746ed_probe_ax88x90_generic(device_t dev, int flags)
747{
748	struct ed_softc *sc = device_get_softc(dev);
749	u_int   memsize;
750	static char test_pattern[32] = "THIS is A memory TEST pattern";
751	char    test_buffer[32];
752
753	ed_pccard_ax88x90_reset(sc);
754	DELAY(10 * 1000);
755
756	/* Make sure that we really have an 8390 based board */
757	if (!ed_probe_generic8390(sc))
758		return (ENXIO);
759
760	sc->vendor = ED_VENDOR_NOVELL;
761	sc->mem_shared = 0;
762	sc->cr_proto = ED_CR_RD2;
763
764	/*
765	 * Test the ability to read and write to the NIC memory.
766	 */
767
768	/*
769	 * This prevents packets from being stored in the NIC memory when the
770	 * readmem routine turns on the start bit in the CR.
771	 */
772	ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
773
774	/* Temporarily initialize DCR for byte operations */
775	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
776	sc->isa16bit = 1;
777	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
778	ed_nic_outb(sc, ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
779	ed_nic_outb(sc, ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
780	/*
781	 * Write a test pattern in word mode. If this also fails, then
782	 * we don't know what this board is.
783	 */
784	ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
785	ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
786	if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
787		return (ENXIO);
788	sc->type = ED_TYPE_NE2000;
789	if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
790		sc->chip_type = ED_CHIP_TYPE_AX88790;
791	else
792		sc->chip_type = ED_CHIP_TYPE_AX88190;
793
794	/* 8k of memory plus an additional 8k if 16bit */
795	memsize = 8192 + sc->isa16bit * 8192;
796	sc->mem_size = memsize;
797
798	/* NIC memory doesn't start at zero on an NE board */
799	/* The start address is tied to the bus width */
800	sc->mem_start = 8192 + sc->isa16bit * 8192;
801	sc->mem_end = sc->mem_start + memsize;
802	sc->tx_page_start = memsize / ED_PAGE_SIZE;
803	sc->txb_cnt = 2;
804	sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
805	sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
806
807	sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
808	/* clear any pending interrupts that might have occurred above */
809	ed_nic_outb(sc, ED_P0_ISR, 0xff);
810	sc->sc_write_mbufs = ed_pio_write_mbufs;
811	return (0);
812}
813
814static int
815ed_pccard_ax88x90_enaddr(struct ed_softc *sc)
816{
817	int i, j;
818	struct {
819		unsigned char offset, value;
820	} pg_seq[] = {
821						/* Select Page0 */
822		{ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0},
823		{ED_P0_DCR, 0x01},
824		{ED_P0_RBCR0, 0x00},		/* Clear the count regs. */
825		{ED_P0_RBCR1, 0x00},
826		{ED_P0_IMR, 0x00},		/* Mask completion irq. */
827		{ED_P0_ISR, 0xff},
828		{ED_P0_RCR, ED_RCR_MON | ED_RCR_INTT}, /* Set To Monitor */
829		{ED_P0_TCR, ED_TCR_LB0},	/* loopback mode. */
830		{ED_P0_RBCR0, 0x20},
831		{ED_P0_RBCR1, 0x00},
832		{ED_P0_RSAR0, 0x00},
833		{ED_P0_RSAR1, 0x04},
834		{ED_P0_CR, ED_CR_RD0 | ED_CR_STA | ED_CR_PAGE_0},
835	};
836
837	/* Card Settings */
838	for (i = 0; i < sizeof(pg_seq) / sizeof(pg_seq[0]); i++)
839		ed_nic_outb(sc, pg_seq[i].offset, pg_seq[i].value);
840
841	/* Get Data */
842	for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
843		j = ed_asic_inw(sc, 0);
844		sc->enaddr[i] = j & 0xff;
845		sc->enaddr[i + 1] = (j >> 8) & 0xff;
846	}
847	return (0);
848}
849
850static int
851ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
852{
853	int	i, id;
854
855	/*
856	 * All AX88x90 devices have MII and a PHY, so we use this to weed out
857	 * chips that would otherwise make it through the tests we have after
858	 * this point.
859	 */
860	for (i = 0; i < 32; i++) {
861		id = ed_miibus_readreg(dev, i, MII_BMSR);
862		if (id != 0 && id != 0xffff)
863			break;
864	}
865	/*
866	 * Found one, we're good.
867	 */
868	if (i != 32)
869		return (0);
870	/*
871	 * Didn't find anything, so try to power up and try again.  The PHY
872	 * may be not responding because we're in power down mode.
873	 */
874	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
875		return (ENXIO);
876	pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
877	for (i = 0; i < 32; i++) {
878		id = ed_miibus_readreg(dev, i, MII_BMSR);
879		if (id != 0 && id != 0xffff)
880			break;
881	}
882	/*
883	 * Still no joy?  We're AFU, punt.
884	 */
885	if (i == 32)
886		return (ENXIO);
887	return (0);
888
889}
890
891/*
892 * Special setup for AX88[17]90
893 */
894static int
895ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
896{
897	int	error;
898	int iobase;
899	struct	ed_softc *sc = device_get_softc(dev);
900
901	if (!(pp->flags & NE2000DVF_AX88X90))
902		return (ENXIO);
903
904	if (bootverbose)
905		device_printf(dev, "Checking AX88x90\n");
906
907	/*
908	 * Set the IOBASE Register.  The AX88x90 cards are potentially
909	 * multifunction cards, and thus requires a slight workaround.
910	 * We write the address the card is at, on the off chance that this
911	 * card is not MFC.
912	 * XXX I'm not sure that this is still needed...
913	 */
914	iobase = rman_get_start(sc->port_res);
915	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
916	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
917
918	sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
919	sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
920	error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
921	if (error) {
922		if (bootverbose)
923			device_printf(dev, "probe ax88x90 failed %d\n",
924			    error);
925		goto fail;
926	}
927	error = ed_pccard_ax88x90_enaddr(sc);
928	if (error)
929		goto fail;
930	error = ed_pccard_ax88x90_check_mii(dev, sc);
931	if (error)
932		goto fail;
933	sc->vendor = ED_VENDOR_NOVELL;
934	sc->type = ED_TYPE_NE2000;
935	if (sc->chip_type == ED_CHIP_TYPE_AX88190)
936		sc->type_str = "AX88190";
937	else
938		sc->type_str = "AX88790";
939	return (0);
940fail:;
941	sc->mii_readbits = 0;
942	sc->mii_writebits = 0;
943	return (error);
944}
945
946static void
947ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
948{
949	int i, data;
950
951	for (i = nbits - 1; i >= 0; i--) {
952		data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
953		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
954		ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
955	}
956}
957
958static u_int
959ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
960{
961	int i;
962	u_int val = 0;
963	uint8_t mdio;
964
965	mdio = ED_AX88X90_MII_DIRIN;
966	for (i = nbits - 1; i >= 0; i--) {
967		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
968		val <<= 1;
969		if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
970			val++;
971		ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
972	}
973	return val;
974}
975
976/*
977 * Special setup for TC5299J
978 */
979static int
980ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
981{
982	int	error, i, id;
983	char *ts;
984	struct	ed_softc *sc = device_get_softc(dev);
985
986	if (!(pp->flags & NE2000DVF_TC5299J))
987		return (ENXIO);
988
989	if (bootverbose)
990		device_printf(dev, "Checking Tc5299j\n");
991
992	/*
993	 * Check to see if we have a MII PHY ID at any of the first 32
994	 * locations.  All TC5299J devices have MII and a PHY, so we use
995	 * this to weed out chips that would otherwise make it through
996	 * the tests we have after this point.
997	 */
998	sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
999	sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
1000	for (i = 0; i < 32; i++) {
1001		id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
1002		if (id != 0 && id != 0xffff)
1003			break;
1004	}
1005	if (i == 32) {
1006		sc->mii_readbits = 0;
1007		sc->mii_writebits = 0;
1008		return (ENXIO);
1009	}
1010
1011	ts = "TC5299J";
1012	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
1013	if (bootverbose)
1014		device_printf(dev, "probe novel returns %d\n", error);
1015	if (error != 0) {
1016		sc->mii_readbits = 0;
1017		sc->mii_writebits = 0;
1018		return (error);
1019	}
1020	if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
1021		sc->mii_readbits = 0;
1022		sc->mii_writebits = 0;
1023		return (ENXIO);
1024	}
1025	sc->vendor = ED_VENDOR_NOVELL;
1026	sc->type = ED_TYPE_NE2000;
1027	sc->chip_type = ED_CHIP_TYPE_TC5299J;
1028	sc->type_str = ts;
1029	return (0);
1030}
1031
1032/* MII bit-twiddling routines for cards using TC5299J chipset */
1033#define TC5299J_MIISET(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \
1034    ed_nic_inb(sc, ED_TC5299J_MIIBUS) | (x))
1035#define TC5299J_MIICLR(sc, x) ed_nic_outb(sc, ED_TC5299J_MIIBUS, \
1036    ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ~(x))
1037
1038static void
1039ed_pccard_tc5299j_mii_reset(struct ed_softc *sc)
1040{
1041	/* Do nothing! */
1042}
1043
1044static void
1045ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
1046{
1047	int i;
1048	uint8_t cr;
1049
1050	cr = ed_nic_inb(sc, ED_P0_CR);
1051	ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1052
1053	TC5299J_MIICLR(sc, ED_TC5299J_MII_DIROUT);
1054	for (i = nbits - 1; i >= 0; i--) {
1055		if ((val >> i) & 1)
1056			TC5299J_MIISET(sc, ED_TC5299J_MII_DATAOUT);
1057		else
1058			TC5299J_MIICLR(sc, ED_TC5299J_MII_DATAOUT);
1059		TC5299J_MIISET(sc, ED_TC5299J_MII_CLK);
1060		TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK);
1061	}
1062	ed_nic_outb(sc, ED_P0_CR, cr);
1063}
1064
1065static u_int
1066ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
1067{
1068	int i;
1069	u_int val = 0;
1070	uint8_t cr;
1071
1072	cr = ed_nic_inb(sc, ED_P0_CR);
1073	ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1074
1075	TC5299J_MIISET(sc, ED_TC5299J_MII_DIROUT);
1076	for (i = nbits - 1; i >= 0; i--) {
1077		TC5299J_MIISET(sc, ED_TC5299J_MII_CLK);
1078		val <<= 1;
1079		if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
1080			val++;
1081		TC5299J_MIICLR(sc, ED_TC5299J_MII_CLK);
1082	}
1083	ed_nic_outb(sc, ED_P0_CR, cr);
1084	return val;
1085}
1086
1087/*
1088 * MII bus support routines.
1089 */
1090static int
1091ed_miibus_readreg(device_t dev, int phy, int reg)
1092{
1093	struct ed_softc *sc;
1094	int failed, val;
1095
1096	sc = device_get_softc(dev);
1097	/*
1098	 * The AX88790 has an interesting quirk.  It has an internal phy that
1099	 * needs a special bit set to access, but can also have additional
1100	 * external PHYs set for things like HomeNET media.  When accessing
1101	 * the internal PHY, a bit has to be set, when accessing the external
1102	 * PHYs, it must be clear.  See Errata 1, page 51, in the AX88790
1103	 * datasheet for more details.
1104	 */
1105	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1106		if (phy == 0x10)
1107			ed_asic_outb(sc, ED_AX88X90_GPIO,
1108			    ED_AX88X90_GPIO_INT_PHY);
1109		else
1110			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1111	}
1112
1113	(*sc->mii_writebits)(sc, 0xffffffff, 32);
1114	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1115	(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
1116	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1117	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1118	if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
1119	    sc->chip_type == ED_CHIP_TYPE_AX88190)
1120		(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1121	failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1122	val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
1123	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1124	return (failed ? 0 : val);
1125}
1126
1127static int
1128ed_miibus_writereg(device_t dev, int phy, int reg, int data)
1129{
1130	struct ed_softc *sc;
1131
1132	sc = device_get_softc(dev);
1133	/*
1134	 * The AX88790 has an interesting quirk.  It has an internal phy that
1135	 * needs a special bit set to access, but can also have additional
1136	 * external PHYs set for things like HomeNET media.  When accessing
1137	 * the internal PHY, a bit has to be set, when accessing the external
1138	 * PHYs, it must be clear.  See Errata 1, page 51, in the AX88790
1139	 * datasheet for more details.
1140	 */
1141	if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1142		if (phy == 0x10)
1143			ed_asic_outb(sc, ED_AX88X90_GPIO,
1144			    ED_AX88X90_GPIO_INT_PHY);
1145		else
1146			ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1147	}
1148	(*sc->mii_writebits)(sc, 0xffffffff, 32);
1149	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1150	(*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
1151	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1152	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1153	(*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
1154	(*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
1155	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1156	return (0);
1157}
1158
1159static int
1160ed_ifmedia_upd(struct ifnet *ifp)
1161{
1162	struct ed_softc *sc;
1163	struct mii_data *mii;
1164
1165	sc = ifp->if_softc;
1166	if (sc->miibus == NULL)
1167		return (ENXIO);
1168
1169	mii = device_get_softc(sc->miibus);
1170	return mii_mediachg(mii);
1171}
1172
1173static void
1174ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1175{
1176	struct ed_softc *sc;
1177	struct mii_data *mii;
1178
1179	sc = ifp->if_softc;
1180	if (sc->miibus == NULL)
1181		return;
1182
1183	mii = device_get_softc(sc->miibus);
1184	mii_pollstat(mii);
1185	ifmr->ifm_active = mii->mii_media_active;
1186	ifmr->ifm_status = mii->mii_media_status;
1187}
1188
1189static void
1190ed_child_detached(device_t dev, device_t child)
1191{
1192	struct ed_softc *sc;
1193
1194	sc = device_get_softc(dev);
1195	if (child == sc->miibus)
1196		sc->miibus = NULL;
1197}
1198
1199static device_method_t ed_pccard_methods[] = {
1200	/* Device interface */
1201	DEVMETHOD(device_probe,		ed_pccard_probe),
1202	DEVMETHOD(device_attach,	ed_pccard_attach),
1203	DEVMETHOD(device_detach,	ed_detach),
1204
1205	/* Bus interface */
1206	DEVMETHOD(bus_child_detached,	ed_child_detached),
1207
1208	/* MII interface */
1209	DEVMETHOD(miibus_readreg,	ed_miibus_readreg),
1210	DEVMETHOD(miibus_writereg,	ed_miibus_writereg),
1211
1212	{ 0, 0 }
1213};
1214
1215static driver_t ed_pccard_driver = {
1216	"ed",
1217	ed_pccard_methods,
1218	sizeof(struct ed_softc)
1219};
1220
1221DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
1222DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
1223MODULE_DEPEND(ed, miibus, 1, 1, 1);
1224MODULE_DEPEND(ed, ether, 1, 1, 1);
1225