if_ed_pccard.c revision 150520
10SN/A/*-
20SN/A * Copyright (c) 2005, M. Warner Losh
30SN/A * Copyright (c) 1995, David Greenman
40SN/A * All rights reserved.
50SN/A *
6940Slana * Redistribution and use in source and binary forms, with or without
7940Slana * modification, are permitted provided that the following conditions
8940Slana * are met:
9940Slana * 1. Redistributions of source code must retain the above copyright
10940Slana *    notice unmodified, this list of conditions, and the following
110SN/A *    disclaimer.
120SN/A * 2. Redistributions in binary form must reproduce the above copyright
130SN/A *    notice, this list of conditions and the following disclaimer in the
140SN/A *    documentation and/or other materials provided with the distribution.
150SN/A *
160SN/A * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
170SN/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
180SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
190SN/A * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
200SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
210SN/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
220SN/A * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
230SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
240SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25490SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26490SN/A * SUCH DAMAGE.
27490SN/A *
280SN/A * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 150520 2005-09-24 17:36:43Z imp $
29490SN/A */
30490SN/A
31490SN/A/*
32490SN/A * Notes for adding media support.  Each chipset is somewhat different
33490SN/A * from the others.  Linux has a table of OIDs that it uses to see what
34490SN/A * supports the misc register of the NS83903.  But a sampling of datasheets
35490SN/A * I could dig up on cards I own paints a different picture.
36490SN/A *
37490SN/A * Chipset specific details:
38490SN/A * NS 83903/902A paired
39490SN/A *    ccr base 0x1020
40490SN/A *    id register at 0x1000: 7-3 = 0, 2-0 = 1.
41490SN/A *	(maybe this test is too week)
42490SN/A *    misc register at 0x018:
43490SN/A *	6 WAIT_TOUTENABLE enable watchdog timeout
44490SN/A *	3 AUI/TPI 1 AUX, 0 TPI
45490SN/A *	2 loopback
460SN/A *      1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47490SN/A *	0 0-no mam, 1 mam connected
48490SN/A * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
49490SN/A * and the NEC PC9801N-J12 ccr base 0x2000!
50490SN/A *
51490SN/A * winbond 289c926
520SN/A *    ccr base 0xfd0
53490SN/A *    cfb (am 0xff2):
54490SN/A *	0-1 PHY01	00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
55490SN/A *	2 LNKEN		0 - enable link and auto switch, 1 disable
560SN/A *	3 LNKSTS	TPI + LNKEN=0 + link good == 1, else 0
57490SN/A *    sr (am 0xff4)
58490SN/A *	88 00 88 00 88 00, etc
59490SN/A *
60490SN/A * TMI tc3299a (cr PHY01 == 0)
61490SN/A *    ccr base 0x3f8
62490SN/A *    cra (io 0xa)
63490SN/A *    crb (io 0xb)
64490SN/A *	0-1 PHY01	00 auto, 01 res, 10 10B5, 11 TPI
65490SN/A *	2 GDLINK	1 disable checking of link
66490SN/A *	6 LINK		0 bad link, 1 good link
67490SN/A * TMI tc5299 (not seen in the wild, afaik) 10/100 chip
68490SN/A *
69490SN/A * EN5017A, EN5020	no data, but very popular
700SN/A * Other chips?
71490SN/A * NetBSD supports RTL8019, but none have surfaced that I can see
72490SN/A */
73490SN/A
74490SN/A#include <sys/param.h>
75490SN/A#include <sys/systm.h>
760SN/A#include <sys/socket.h>
77490SN/A#include <sys/kernel.h>
78490SN/A#include <sys/conf.h>
79490SN/A#include <sys/uio.h>
80490SN/A
81490SN/A#include <sys/module.h>
820SN/A#include <sys/bus.h>
83490SN/A#include <machine/bus.h>
84490SN/A#include <sys/rman.h>
85490SN/A#include <machine/resource.h>
86490SN/A
87490SN/A#include <net/ethernet.h>
88490SN/A#include <net/if.h>
89490SN/A#include <net/if_arp.h>
90490SN/A#include <net/if_mib.h>
91490SN/A#include <net/if_media.h>
92490SN/A
93490SN/A#include <dev/ed/if_edreg.h>
940SN/A#include <dev/ed/if_edvar.h>
95490SN/A#include <dev/pccard/pccardvar.h>
96490SN/A#include <dev/pccard/pccardreg.h>
97490SN/A#include <dev/pccard/pccard_cis.h>
98490SN/A#include <dev/mii/mii.h>
99490SN/A#include <dev/mii/miivar.h>
1000SN/A
101490SN/A#include "card_if.h"
102490SN/A/* "device miibus" required.  See GENERIC if you get errors here. */
103490SN/A#include "miibus_if.h"
104490SN/A#include "pccarddevs.h"
105490SN/A
106490SN/A/*
107490SN/A * PC Cards should be using a network specific FUNCE in the CIS to
1080SN/A * communicate their MAC address to the driver.  However, there are a
109490SN/A * large number of NE-2000ish PC Cards that don't do this.  Nearly all
110490SN/A * of them store the MAC address at a fixed offset into attribute
111490SN/A * memory, without any reference at all appearing in the CIS.  And
112490SN/A * nearly all of those store it at the same location.
113490SN/A *
114490SN/A * This applies only to the older, NE-2000 compatbile cards.  The newer
115490SN/A * cards based on the AX88x90 or DL100XX chipsets have a specific place
116490SN/A * to look for MAC information.  And only to those NE-2000 compatible cards
1170SN/A * that don't the NE-2000 compatible thing of placing the PROM contents
118490SN/A * starting at location 0 of memory.
119490SN/A */
120490SN/A#define ED_DEFAULT_MAC_OFFSET	0xff0
121490SN/A
122490SN/Astatic const struct ed_product {
123490SN/A	struct pccard_product	prod;
124490SN/A	int flags;
125490SN/A#define	NE2000DVF_DL100XX	0x0001		/* chip is D-Link DL10019/22 */
126490SN/A#define	NE2000DVF_AX88X90	0x0002		/* chip is ASIX AX88[17]90 */
1270SN/A#define NE2000DVF_ENADDR	0x0004		/* Get MAC from attr mem */
128490SN/A#define NE2000DVF_ANYFUNC	0x0008		/* Allow any function type */
129490SN/A#define NE2000DVF_MODEM		0x0010		/* Has a modem/serial */
1300SN/A	int enoff;
131490SN/A} ed_pccard_products[] = {
132490SN/A	{ PCMCIA_CARD(ACCTON, EN2212), 0},
133490SN/A	{ PCMCIA_CARD(ACCTON, EN2216), 0},
134490SN/A	{ PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
135490SN/A	{ PCMCIA_CARD(AMBICOM, AMB8002T), 0},
1360SN/A	{ PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
137490SN/A	{ PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
138490SN/A	{ PCMCIA_CARD(BROMAX, IPORT), 0},
139490SN/A	{ PCMCIA_CARD(BROMAX, IPORT2), 0},
140490SN/A	{ PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
141490SN/A	{ PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
1420SN/A	{ PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
143490SN/A	{ PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
144490SN/A	{ PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
145490SN/A	{ PCMCIA_CARD(CNET, NE2000), 0},
146490SN/A	{ PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
147490SN/A	{ PCMCIA_CARD(COMPEX, LANMODEM), 0},
1480SN/A	{ PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
149490SN/A	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
150490SN/A	{ PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
151490SN/A	{ PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
152490SN/A	{ PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
153490SN/A	{ PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
154490SN/A	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
155490SN/A	{ PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
156490SN/A	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
1570SN/A	{ PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
158490SN/A	{ PCMCIA_CARD(DLINK, DE660), 0 },
159490SN/A	{ PCMCIA_CARD(DLINK, DE660PLUS), 0},
160490SN/A	{ PCMCIA_CARD(DYNALINK, L10C), 0},
161490SN/A	{ PCMCIA_CARD(EDIMAX, EP4000A), 0},
162490SN/A	{ PCMCIA_CARD(EPSON, EEN10B), NE2000DVF_ENADDR, 0xff0},
1630SN/A	{ PCMCIA_CARD(EXP, THINLANCOMBO), 0},
164490SN/A	{ PCMCIA_CARD(GREY_CELL, TDK3000), 0},
165490SN/A	{ PCMCIA_CARD(GREY_CELL, DMF650TX),
166490SN/A	    NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
167490SN/A	{ PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
168490SN/A	{ PCMCIA_CARD(IBM, INFOMOVER), NE2000DVF_ENADDR, 0xff0},
1690SN/A	{ PCMCIA_CARD(IODATA3, PCLAT), 0},
170490SN/A	{ PCMCIA_CARD(KINGSTON, CIO10T), 0},
171490SN/A	{ PCMCIA_CARD(KINGSTON, KNE2), 0},
172490SN/A	{ PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
173490SN/A	{ PCMCIA_CARD(LINKSYS, COMBO_ECARD),
174490SN/A	    NE2000DVF_DL100XX | NE2000DVF_AX88X90},
1750SN/A	{ PCMCIA_CARD(LINKSYS, ECARD_1), 0},
176490SN/A	{ PCMCIA_CARD(LINKSYS, ECARD_2), 0},
177490SN/A	{ PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
178490SN/A	{ PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
179490SN/A	{ PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
180490SN/A	{ PCMCIA_CARD(MAGICRAM, ETHER), 0},
1810SN/A	{ PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
182490SN/A	{ PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
183490SN/A	{ PCMCIA_CARD(NDC, ND5100_E), 0},
1840SN/A	{ PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
185490SN/A	/* Same ID as DLINK DFE-670TXD.  670 has DL10022, fa411 has ax88790 */
186490SN/A	{ PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
187490SN/A	{ PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
188490SN/A	{ PCMCIA_CARD(NEWMEDIA, LANSURFER), 0},
189490SN/A	{ PCMCIA_CARD(OEM2, ETHERNET), 0},
1900SN/A	{ PCMCIA_CARD(OEM2, NE2000), 0},
191490SN/A	{ PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
192490SN/A	{ PCMCIA_CARD(PREMAX, PE200), 0},
193490SN/A	{ PCMCIA_CARD(PSION, LANGLOBAL),
194490SN/A	    NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
195490SN/A	{ PCMCIA_CARD(RACORE, ETHERNET), 0},
196490SN/A	{ PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
197490SN/A	{ PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90},
1980SN/A	{ PCMCIA_CARD(RELIA, COMBO), 0},
199490SN/A	{ PCMCIA_CARD(RPTI, EP400), 0},
200490SN/A	{ PCMCIA_CARD(RPTI, EP401), 0},
201490SN/A	{ PCMCIA_CARD(SMC, EZCARD), 0},
202940Slana	{ PCMCIA_CARD(SOCKET, EA_ETHER), 0},
203940Slana	{ PCMCIA_CARD(SOCKET, ES_1000), 0},
204940Slana	{ PCMCIA_CARD(SOCKET, LP_ETHER), 0},
205940Slana	{ PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
206940Slana	{ PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
207940Slana	{ PCMCIA_CARD(SVEC, COMBOCARD), 0},
208940Slana	{ PCMCIA_CARD(SVEC, LANCARD), 0},
209940Slana	{ PCMCIA_CARD(TAMARACK, ETHERNET), 0},
210940Slana	{ PCMCIA_CARD(TDK, CFE_10), 0},
211940Slana	{ PCMCIA_CARD(TDK, LAK_CD031), 0},
212940Slana	{ PCMCIA_CARD(TDK, DFL5610WS), 0},
213940Slana	{ PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
214940Slana	{ PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
215940Slana	{ PCMCIA_CARD(ZONET, ZEN), 0},
216940Slana	{ { NULL } }
217940Slana};
218940Slana
219940Slana/*
220940Slana *      PC Card (PCMCIA) specific code.
221940Slana */
222940Slanastatic int	ed_pccard_probe(device_t);
223940Slanastatic int	ed_pccard_attach(device_t);
224940Slana
225940Slanastatic int	ed_pccard_dl100xx(device_t dev, const struct ed_product *);
226940Slanastatic void	ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
227940Slanastatic u_int	ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
228940Slanastatic void	ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
229940Slana    int nbits);
230940Slana
231940Slanastatic void	ed_pccard_ax88x90_mii_reset(struct ed_softc *sc);
232940Slanastatic u_int	ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
233940Slanastatic void	ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
234940Slana    int nbits);
235940Slanastatic int	ed_miibus_readreg(device_t dev, int phy, int reg);
236940Slanastatic int	ed_ifmedia_upd(struct ifnet *);
237940Slanastatic void	ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
238940Slana
239940Slanastatic int	ed_pccard_ax88x90(device_t dev, const struct ed_product *);
240940Slana
241940Slanastatic int
242940Slanaed_pccard_probe(device_t dev)
243940Slana{
244940Slana	const struct ed_product *pp;
245940Slana	int		error;
246940Slana	uint32_t	fcn = PCCARD_FUNCTION_UNSPEC;
247940Slana
248940Slana	/* Make sure we're a network function */
249940Slana	error = pccard_get_function(dev, &fcn);
250940Slana	if (error != 0)
251940Slana		return (error);
252940Slana
253940Slana	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
254940Slana	    (const struct pccard_product *) ed_pccard_products,
255940Slana	    sizeof(ed_pccard_products[0]), NULL)) != NULL) {
256940Slana		if (pp->prod.pp_name != NULL)
257940Slana			device_set_desc(dev, pp->prod.pp_name);
258940Slana		/*
259940Slana		 * Some devices don't ID themselves as network, but
260940Slana		 * that's OK if the flags say so.
261940Slana		 */
262940Slana		if (!(pp->flags & NE2000DVF_ANYFUNC) &&
263940Slana		    fcn != PCCARD_FUNCTION_NETWORK)
264940Slana			return (ENXIO);
265940Slana		return (0);
266940Slana	}
267940Slana	return (ENXIO);
268940Slana}
269940Slana
270940Slanastatic int
271940Slanaed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
272940Slana{
273940Slana	struct ed_softc *sc = device_get_softc(dev);
274940Slana	uint8_t romdata[32];
275940Slana	int i;
276940Slana
277940Slana	/*
278940Slana	 * Read in the rom data at location 0.  Since there are no
279940Slana	 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
280940Slana	 *
281940Slana	 * In researching what format this takes, I've found that the
282940Slana	 * following appears to be true for multiple cards based on
283940Slana	 * observation as well as datasheet digging.
284940Slana	 *
285940Slana	 * Data is stored in some ROM and is copied out 8 bits at a time
286940Slana	 * into 16-bit wide locations.  This means that the odd locations
287940Slana	 * of the ROM are not used (and can be either 0 or ff).
288940Slana	 *
289940Slana	 * The contents appears to be as follows:
290940Slana	 * PROM   RAM
291940Slana	 * Offset Offset	What
292940Slana	 *  0      0	ENETADDR 0
293490SN/A	 *  1      2	ENETADDR 1
294490SN/A	 *  2      4	ENETADDR 2
295490SN/A	 *  3      6	ENETADDR 3
296490SN/A	 *  4      8	ENETADDR 4
297490SN/A	 *  5     10	ENETADDR 5
2980SN/A	 *  6-13  12-26 Reserved (varies by manufacturer)
299	 * 14     28	0x57
300	 * 15     30    0x57
301	 *
302	 * Some manufacturers have another image of enetaddr from
303	 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
304	 * this doesn't appear to be universally documented in the
305	 * datasheets.  Some manufactuers have a card type, card config
306	 * checksums, etc encoded into PROM offset 6-13, but deciphering it
307	 * requires more knowledge about the exact underlying chipset than
308	 * we possess (and maybe can possess).
309	 */
310	ed_pio_readmem(sc, 0, romdata, 32);
311	if (bootverbose)
312		printf("ROM DATA: %32D\n", romdata, " ");
313	if (romdata[28] != 0x57 || romdata[30] != 0x57)
314		return (0);
315	for (i = 0; i < ETHER_ADDR_LEN; i++)
316		enaddr[i] = romdata[i * 2];
317	return (1);
318}
319
320static int
321ed_pccard_add_modem(device_t dev)
322{
323	struct ed_softc *sc = device_get_softc(dev);
324
325	device_printf(dev, "Need to write this code: modem rid is %d\n",
326	    sc->modem_rid);
327	return 0;
328}
329
330static int
331ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
332{
333	struct mii_data *mii;
334
335	if (sc->miibus == NULL)
336		return (EINVAL);
337	mii = device_get_softc(sc->miibus);
338	return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
339}
340
341
342static void
343ed_pccard_mediachg(struct ed_softc *sc)
344{
345	struct mii_data *mii;
346
347	if (sc->miibus == NULL)
348		return;
349	mii = device_get_softc(sc->miibus);
350	mii_mediachg(mii);
351}
352
353static void
354ed_pccard_tick(void *arg)
355{
356	struct ed_softc *sc = arg;
357	struct mii_data *mii;
358
359	ED_ASSERT_LOCKED(sc);
360	if (sc->miibus != NULL) {
361		mii = device_get_softc(sc->miibus);
362		mii_tick(mii);
363	}
364	callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc);
365}
366
367static int
368ed_pccard_attach(device_t dev)
369{
370	u_char sum;
371	u_char enaddr[ETHER_ADDR_LEN];
372	const struct ed_product *pp;
373	int	error, i;
374	struct ed_softc *sc = device_get_softc(dev);
375	u_long size;
376
377	if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
378	    (const struct pccard_product *) ed_pccard_products,
379	    sizeof(ed_pccard_products[0]), NULL)) == NULL)
380		return (ENXIO);
381	sc->modem_rid = -1;
382	if (pp->flags & NE2000DVF_MODEM) {
383		sc->port_rid = -1;
384		for (i = 0; i < 4; i++) {
385			size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
386			if (size == ED_NOVELL_IO_PORTS)
387				sc->port_rid = i;
388			else if (size == 8)
389				sc->modem_rid = i;
390		}
391		if (sc->port_rid == -1) {
392			device_printf(dev, "Cannot locate my ports!\n");
393			return (ENXIO);
394		}
395	} else {
396		sc->port_rid = 0;
397	}
398	/* Allocate the port resource during setup. */
399	error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS);
400	if (error)
401		return (error);
402	error = ed_alloc_irq(dev, 0, 0);
403	if (error)
404		goto bad;
405
406	/*
407	 * Determine which chipset we are.  All the PC Card chipsets have the
408	 * ASIC and NIC offsets in the same place.
409	 */
410	sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
411	sc->nic_offset  = ED_NOVELL_NIC_OFFSET;
412	error = ENXIO;
413	if (error != 0)
414		error = ed_pccard_dl100xx(dev, pp);
415	if (error != 0)
416		error = ed_pccard_ax88x90(dev, pp);
417	if (error != 0)
418		error = ed_probe_Novell_generic(dev, device_get_flags(dev));
419	if (error)
420		goto bad;
421
422	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
423	    edintr, sc, &sc->irq_handle);
424	if (error) {
425		device_printf(dev, "setup intr failed %d \n", error);
426		goto bad;
427	}
428
429	/*
430	 * For the older cards, we have to get the MAC address from
431	 * the card in some way.  Let's try the standard PCMCIA way
432	 * first.  If that fails, then check to see if we have valid
433	 * data from the standard NE-2000 data roms.  If that fails,
434	 * check to see if the card has a hint about where to look in
435	 * its CIS.  If that fails, maybe we should look at some
436	 * default value.  In all fails, we should fail the attach,
437	 * but don't right now.
438	 */
439	if (sc->chip_type == ED_CHIP_TYPE_DP8390) {
440	    ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
441	    printf("%#x and %#x", ed_nic_inb(sc, 0xa), ed_nic_inb(sc, 0xb));
442		pccard_get_ether(dev, enaddr);
443		if (bootverbose)
444			device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
445		for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
446			sum |= enaddr[i];
447		if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
448			if (bootverbose)
449				device_printf(dev, "ROM mac %6D\n", enaddr,
450				    ":");
451			sum++;
452		}
453		if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
454			for (i = 0; i < ETHER_ADDR_LEN; i++) {
455				pccard_attr_read_1(dev, pp->enoff + i * 2,
456				    enaddr + i);
457				sum |= enaddr[i];
458			}
459			if (bootverbose)
460				device_printf(dev, "Hint %x MAC %6D\n",
461				    pp->enoff, enaddr, ":");
462		}
463		if (sum == 0) {
464			for (i = 0; i < ETHER_ADDR_LEN; i++) {
465				pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
466				    i * 2, enaddr + i);
467				sum |= enaddr[i];
468			}
469			if (bootverbose)
470				device_printf(dev, "Fallback MAC %6D\n",
471				    enaddr, ":");
472		}
473		if (sum == 0) {
474			device_printf(dev, "Cannot extract MAC address.\n");
475			ed_release_resources(dev);
476			return (ENXIO);
477		}
478		bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
479	}
480
481	error = ed_attach(dev);
482	if (error)
483		goto bad;
484 	if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
485	    sc->chip_type == ED_CHIP_TYPE_DL10022) {
486		/* Probe for an MII bus, but ignore errors. */
487		ed_pccard_dl100xx_mii_reset(sc);
488		mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
489		    ed_ifmedia_sts);
490	} else if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
491		ed_pccard_ax88x90_mii_reset(sc);
492		if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
493		     ed_ifmedia_sts)) != 0) {
494			device_printf(dev, "Missing mii!\n");
495			goto bad;
496		}
497
498	}
499	if (sc->miibus != NULL) {
500		sc->sc_tick = ed_pccard_tick;
501		sc->sc_mediachg = ed_pccard_mediachg;
502		sc->sc_media_ioctl = ed_pccard_media_ioctl;
503	}
504	if (sc->modem_rid != -1)
505		ed_pccard_add_modem(dev);
506	return (0);
507bad:
508	ed_release_resources(dev);
509	return (error);
510}
511
512/*
513 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
514 * and compatible cards (DL10019C Ethernet controller).
515 *
516 * Note: The PAO patches try to use more memory for the card, but that
517 * seems to fail for my card.  A future optimization would add this back
518 * conditionally.
519 */
520static int
521ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
522{
523	struct ed_softc *sc = device_get_softc(dev);
524	u_char sum;
525	uint8_t id;
526	int i, error;
527
528	if (!(pp->flags & NE2000DVF_DL100XX))
529		return (ENXIO);
530	if (bootverbose)
531		device_printf(dev, "Trying DL100xx probing\n");
532	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
533	if (bootverbose && error)
534		device_printf(dev, "Novell generic probe failed: %d\n", error);
535	if (error != 0)
536		return (error);
537
538	/*
539	 * Linksys registers(offset from ASIC base)
540	 *
541	 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
542	 * 0x0A      : Card ID Register (CIR)
543	 * 0x0B      : Check Sum Register (SR)
544	 */
545	for (sum = 0, i = 0x04; i < 0x0c; i++)
546		sum += ed_asic_inb(sc, i);
547	if (sum != 0xff) {
548		if (bootverbose)
549			device_printf(dev, "Bad checksum %#x\n", sum);
550		return (ENXIO);		/* invalid DL10019C */
551	}
552	if (bootverbose)
553		device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
554	for (i = 0; i < ETHER_ADDR_LEN; i++)
555		sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
556	ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
557	id = ed_asic_inb(sc, 0xf);
558	sc->isa16bit = 1;
559	sc->vendor = ED_VENDOR_NOVELL;
560	sc->type = ED_TYPE_NE2000;
561	sc->chip_type = (id & 0x90) == 0x90 ?
562	    ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
563	sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
564	sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
565	sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
566	return (0);
567}
568
569/* MII bit-twiddling routines for cards using Dlink chipset */
570#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
571    ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
572#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
573    ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
574
575static void
576ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
577{
578	if (sc->chip_type != ED_CHIP_TYPE_DL10022)
579		return;
580
581	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
582	DELAY(10);
583	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
584	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
585	DELAY(10);
586	ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
587	DELAY(10);
588	ed_asic_outb(sc, ED_DL100XX_MIIBUS,
589	    ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
590	DELAY(10);
591	ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
592}
593
594static void
595ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
596{
597	int i;
598
599	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
600		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_22);
601	else
602		DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_19);
603
604	for (i = nbits - 1; i >= 0; i--) {
605		if ((val >> i) & 1)
606			DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
607		else
608			DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
609		DELAY(10);
610		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
611		DELAY(10);
612		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
613		DELAY(10);
614	}
615}
616
617static u_int
618ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
619{
620	int i;
621	u_int val = 0;
622
623	if (sc->chip_type == ED_CHIP_TYPE_DL10022)
624		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_22);
625	else
626		DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_19);
627
628	for (i = nbits - 1; i >= 0; i--) {
629		DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
630		DELAY(10);
631		val <<= 1;
632		if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATATIN)
633			val++;
634		DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
635		DELAY(10);
636	}
637	return val;
638}
639
640static int
641ed_pccard_ax88x90_geteprom(struct ed_softc *sc)
642{
643	int prom[16],i;
644	u_char tmp;
645	struct {
646		unsigned char offset, value;
647	} pg_seq[] = {
648						/* Select Page0 */
649		{ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0},
650		{ED_P0_DCR, 0x01},
651		{ED_P0_RBCR0, 0x00},		/* Clear the count regs. */
652		{ED_P0_RBCR1, 0x00},
653		{ED_P0_IMR, 0x00},		/* Mask completion irq. */
654		{ED_P0_ISR, 0xff},
655		{ED_P0_RCR, ED_RCR_MON | ED_RCR_INTT}, /* Set To Monitor */
656		{ED_P0_TCR, ED_TCR_LB0},	/* loopback mode. */
657		{ED_P0_RBCR0, 32},
658		{ED_P0_RBCR1, 0x00},
659		{ED_P0_RSAR0, 0x00},
660		{ED_P0_RSAR1, 0x04},
661		{ED_P0_CR, ED_CR_RD0 | ED_CR_STA | ED_CR_PAGE_0},
662	};
663
664	/* Reset Card */
665	tmp = ed_asic_inb(sc, ED_NOVELL_RESET);
666	ed_asic_outb(sc, ED_NOVELL_RESET, tmp);
667	DELAY(5000);
668	ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
669	DELAY(5000);
670
671	/* Card Settings */
672	for (i = 0; i < sizeof(pg_seq) / sizeof(pg_seq[0]); i++)
673		ed_nic_outb(sc, pg_seq[i].offset, pg_seq[i].value);
674
675	/* Get Data */
676	for (i = 0; i < ETHER_ADDR_LEN / 2; i++)
677		prom[i] = ed_asic_inw(sc, 0);
678	for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
679		sc->enaddr[i] = prom[i / 2] & 0xff;
680		sc->enaddr[i + 1] = (prom[i / 2] >> 8) & 0xff;
681	}
682	return (0);
683}
684
685/*
686 * Special setup for AX88[17]90
687 */
688static int
689ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
690{
691	int	error, iobase, i, id;
692	char *ts;
693	struct	ed_softc *sc = device_get_softc(dev);
694
695	if (!(pp->flags & NE2000DVF_AX88X90))
696		return (ENXIO);
697
698	if (bootverbose)
699		device_printf(dev, "Checking AX88x90\n");
700
701	/*
702	 * Set the IOBASE Register.  The AX88x90 cards are potentially
703	 * multifunction cards, and thus requires a slight workaround.
704	 * We write the address the card is at.
705	 */
706	iobase = rman_get_start(sc->port_res);
707	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
708	pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
709
710	/*
711	 * Check to see if we have a MII PHY ID at any of the first 17
712	 * locations.  All AX88x90 devices have MII and a PHY, so we use
713	 * this to weed out chips that would otherwise make it through
714	 * the tests we have after this point.
715	 */
716	sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
717	sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
718	for (i = 0; i < 17; i++) {
719		id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
720		if (id != 0 && id != 0xffff)
721			break;
722	}
723	if (i == 17) {
724		sc->mii_readbits = 0;
725		sc->mii_writebits = 0;
726		return (ENXIO);
727	}
728
729
730	ts = "AX88190";
731	if (ed_asic_inb(sc, ED_ASIX_TEST) != 0) {
732		/*
733		 * AX88790 (and I think AX88190A) chips need to be
734		 * powered down.  There's an erratum that says we should
735		 * power down the PHY for 2.5s, but this seems to power
736		 * down the whole card.  I'm unsure why this was done, but
737		 * appears to be required for proper operation.
738		 */
739		pccard_ccr_write_1(dev, PCCARD_CCR_STATUS,
740		    PCCARD_CCR_STATUS_PWRDWN);
741		ts = "AX88790";
742	}
743	sc->chip_type = ED_CHIP_TYPE_AX88190;
744	error = ed_pccard_ax88x90_geteprom(sc);
745	if (error)
746		return (error);
747	error = ed_probe_Novell_generic(dev, device_get_flags(dev));
748	if (bootverbose)
749		device_printf(dev, "probe novel returns %d\n", error);
750	if (error == 0) {
751		sc->vendor = ED_VENDOR_NOVELL;
752		sc->type = ED_TYPE_NE2000;
753		sc->chip_type = ED_CHIP_TYPE_AX88190;
754		sc->type_str = ts;
755	}
756	return (error);
757}
758
759/* MII bit-twiddling routines for cards using Dlink chipset */
760#define AX88X90_MIISET(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \
761    ed_asic_inb(sc, ED_AX88X90_MIIBUS) | (x))
762#define AX88X90_MIICLR(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \
763    ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ~(x))
764
765static void
766ed_pccard_ax88x90_mii_reset(struct ed_softc *sc)
767{
768	/* Do nothing! */
769}
770
771static void
772ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
773{
774	int i;
775
776	AX88X90_MIICLR(sc, ED_AX88X90_MII_DIROUT);
777	for (i = nbits - 1; i >= 0; i--) {
778		if ((val >> i) & 1)
779			AX88X90_MIISET(sc, ED_AX88X90_MII_DATAOUT);
780		else
781			AX88X90_MIICLR(sc, ED_AX88X90_MII_DATAOUT);
782		DELAY(10);
783		AX88X90_MIISET(sc, ED_AX88X90_MII_CLK);
784		DELAY(10);
785		AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK);
786		DELAY(10);
787	}
788}
789
790static u_int
791ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
792{
793	int i;
794	u_int val = 0;
795
796	AX88X90_MIISET(sc, ED_AX88X90_MII_DIROUT);
797	for (i = nbits - 1; i >= 0; i--) {
798		AX88X90_MIISET(sc, ED_AX88X90_MII_CLK);
799		DELAY(10);
800		val <<= 1;
801		if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATATIN)
802			val++;
803		AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK);
804		DELAY(10);
805	}
806	return val;
807}
808
809/*
810 * MII bus support routines.
811 */
812static int
813ed_miibus_readreg(device_t dev, int phy, int reg)
814{
815	struct ed_softc *sc;
816	int failed, val;
817
818	/*
819	 * The AX88790 seem to have phy 0..f external, and 0x10 internal.
820	 * but they also seem to have a bogus one that shows up at phy
821	 * 0x11 through 0x1f.
822	 */
823	if (phy >= 0x11)
824		return (0);
825
826	sc = device_get_softc(dev);
827	(*sc->mii_writebits)(sc, 0xffffffff, 32);
828	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
829	(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
830	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
831	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
832	failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
833	val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
834	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
835	return (failed ? 0 : val);
836}
837
838static void
839ed_miibus_writereg(device_t dev, int phy, int reg, int data)
840{
841	struct ed_softc *sc;
842
843	/*
844	 * The AX88790 seem to have phy 0..f external, and 0x10 internal.
845	 * but they also seem to have a bogus one that shows up at phy
846	 * 0x11 through 0x1f.
847	 */
848	if (phy >= 0x11)
849		return;
850
851	sc = device_get_softc(dev);
852	(*sc->mii_writebits)(sc, 0xffffffff, 32);
853	(*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
854	(*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
855	(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
856	(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
857	(*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
858	(*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
859	(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
860}
861
862static int
863ed_ifmedia_upd(struct ifnet *ifp)
864{
865	struct ed_softc *sc;
866	struct mii_data *mii;
867
868	sc = ifp->if_softc;
869	if (sc->miibus == NULL)
870		return (ENXIO);
871
872	mii = device_get_softc(sc->miibus);
873	return mii_mediachg(mii);
874}
875
876static void
877ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
878{
879	struct ed_softc *sc;
880	struct mii_data *mii;
881
882	sc = ifp->if_softc;
883	if (sc->miibus == NULL)
884		return;
885
886	mii = device_get_softc(sc->miibus);
887	mii_pollstat(mii);
888	ifmr->ifm_active = mii->mii_media_active;
889	ifmr->ifm_status = mii->mii_media_status;
890}
891
892static void
893ed_child_detached(device_t dev, device_t child)
894{
895	struct ed_softc *sc;
896
897	sc = device_get_softc(dev);
898	if (child == sc->miibus)
899		sc->miibus = NULL;
900}
901
902static device_method_t ed_pccard_methods[] = {
903	/* Device interface */
904	DEVMETHOD(device_probe,		ed_pccard_probe),
905	DEVMETHOD(device_attach,	ed_pccard_attach),
906	DEVMETHOD(device_detach,	ed_detach),
907
908	/* Bus interface */
909	DEVMETHOD(bus_child_detached,	ed_child_detached),
910
911	/* MII interface */
912	DEVMETHOD(miibus_readreg,	ed_miibus_readreg),
913	DEVMETHOD(miibus_writereg,	ed_miibus_writereg),
914
915	{ 0, 0 }
916};
917
918static driver_t ed_pccard_driver = {
919	"ed",
920	ed_pccard_methods,
921	sizeof(struct ed_softc)
922};
923
924DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
925DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
926MODULE_DEPEND(ed, miibus, 1, 1, 1);
927MODULE_DEPEND(ed, ether, 1, 1, 1);
928