if_ed_pccard.c revision 150300
1/*- 2 * Copyright (c) 2005, M. Warner Losh 3 * Copyright (c) 1995, David Greenman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 150300 2005-09-18 20:51:34Z imp $ 29 */ 30 31#include "opt_ed.h" 32 33/* 34 * Notes for adding media support. Each chipset is somewhat different 35 * from the others. Linux has a table of OIDs that it uses to see what 36 * supports the misc register of the NS83903. But a sampling of datasheets 37 * I could dig up on cards I own paints a different picture. 38 * 39 * Chipset specific details: 40 * NS 83903/902A paired 41 * ccr base 0x1020 42 * id register at 0x1000: 7-3 = 0, 2-0 = 1. 43 * (maybe this test is too week) 44 * misc register at 0x018: 45 * 6 WAIT_TOUTENABLE enable watchdog timeout 46 * 3 AUI/TPI 1 AUX, 0 TPI 47 * 2 loopback 48 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad 49 * 0 0-no mam, 1 mam connected 50 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II 51 * and the NEC PC9801N-J12 ccr base 0x2000! 52 * 53 * winbond 289c926 54 * ccr base 0xfd0 55 * cfb (am 0xff2): 56 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ) 57 * 2 LNKEN 0 - enable link and auto switch, 1 disable 58 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0 59 * sr (am 0xff4) 60 * 88 00 88 00 88 00, etc 61 * 62 * TMI tc3299a (cr PHY01 == 0) 63 * ccr base 0x3f8 64 * cra (io 0xa) 65 * crb (io 0xb) 66 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI 67 * 2 GDLINK 1 disable checking of link 68 * 6 LINK 0 bad link, 1 good link 69 * TMI tc5299 (not seen in the wild, afaik) 10/100 chip 70 * 71 * EN5017A, EN5020 no data, but very popular 72 * Other chips? 73 * NetBSD supports RTL8019, but none have surfaced that I can see 74 */ 75 76#include <sys/param.h> 77#include <sys/systm.h> 78#include <sys/socket.h> 79#include <sys/kernel.h> 80#include <sys/conf.h> 81#include <sys/uio.h> 82 83#include <sys/module.h> 84#include <sys/bus.h> 85#include <machine/bus.h> 86#include <sys/rman.h> 87#include <machine/resource.h> 88 89#include <net/ethernet.h> 90#include <net/if.h> 91#include <net/if_arp.h> 92#include <net/if_mib.h> 93#include <net/if_media.h> 94 95#include <dev/ed/if_edreg.h> 96#include <dev/ed/if_edvar.h> 97#include <dev/pccard/pccardvar.h> 98#include <dev/pccard/pccardreg.h> 99#include <dev/pccard/pccard_cis.h> 100#include <dev/mii/mii.h> 101#include <dev/mii/miivar.h> 102 103#include "card_if.h" 104/* "device miibus" required. See GENERIC if you get errors here. */ 105#include "miibus_if.h" 106#include "pccarddevs.h" 107 108/* 109 * PC Cards should be using a network specific FUNCE in the CIS to 110 * communicate their MAC address to the driver. However, there are a 111 * large number of NE-2000ish PC Cards that don't do this. Nearly all 112 * of them store the MAC address at a fixed offset into attribute 113 * memory, without any reference at all appearing in the CIS. And 114 * nearly all of those store it at the same location. 115 * 116 * This applies only to the older, NE-2000 compatbile cards. The newer 117 * cards based on the AX88x90 or DL100XX chipsets have a specific place 118 * to look for MAC information. And only to those NE-2000 compatible cards 119 * that don't the NE-2000 compatible thing of placing the PROM contents 120 * starting at location 0 of memory. 121 */ 122#define ED_DEFAULT_MAC_OFFSET 0xff0 123 124static const struct ed_product { 125 struct pccard_product prod; 126 int flags; 127#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */ 128#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */ 129#define NE2000DVF_ENADDR 0x0004 /* Get MAC from attr mem */ 130#define NE2000DVF_ANYFUNC 0x0008 /* Allow any function type */ 131#define NE2000DVF_MODEM 0x0010 /* Has a modem/serial */ 132 int enoff; 133} ed_pccard_products[] = { 134 { PCMCIA_CARD(ACCTON, EN2212), 0}, 135 { PCMCIA_CARD(ACCTON, EN2216), 0}, 136 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0}, 137 { PCMCIA_CARD(AMBICOM, AMB8002T), 0}, 138 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0}, 139 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0}, 140 { PCMCIA_CARD(BROMAX, IPORT), 0}, 141 { PCMCIA_CARD(BROMAX, IPORT2), 0}, 142 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0}, 143 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0}, 144 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90}, 145 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90}, 146 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0}, 147 { PCMCIA_CARD(CNET, NE2000), 0}, 148 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90}, 149 { PCMCIA_CARD(COMPEX, LANMODEM), 0}, 150 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0}, 151 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0}, 152 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0}, 153 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0}, 154 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0}, 155 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX}, 156 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90}, 157 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX}, 158 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0}, 159 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0}, 160 { PCMCIA_CARD(DLINK, DE650), 0}, 161 { PCMCIA_CARD(DLINK, DE660), 0 }, 162 { PCMCIA_CARD(DLINK, DE660PLUS), 0}, 163 { PCMCIA_CARD(DYNALINK, L10C), 0}, 164 { PCMCIA_CARD(EDIMAX, EP4000A), 0}, 165 /* { PCMCIA_CARD(EPSON, EEN10B), NE2000DVF_ENADDR, 0xff0}, */ 166 { PCMCIA_CARD(EPSON, EEN10B), 0}, 167 { PCMCIA_CARD(EXP, THINLANCOMBO), 0}, 168 { PCMCIA_CARD(GREY_CELL, TDK3000), 0}, 169 { PCMCIA_CARD(GREY_CELL, DMF650TX), 170 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM}, 171 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0}, 172 { PCMCIA_CARD(IBM, INFOMOVER), NE2000DVF_ENADDR, 0xff0}, 173 { PCMCIA_CARD(IODATA3, PCLAT), 0}, 174 { PCMCIA_CARD(KINGSTON, CIO10T), 0}, 175 { PCMCIA_CARD(KINGSTON, KNE2), 0}, 176 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90}, 177 { PCMCIA_CARD(LINKSYS, COMBO_ECARD), 178 NE2000DVF_DL100XX | NE2000DVF_AX88X90}, 179 { PCMCIA_CARD(LINKSYS, ECARD_1), 0}, 180 { PCMCIA_CARD(LINKSYS, ECARD_2), 0}, 181 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX}, 182 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0}, 183 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0}, 184 { PCMCIA_CARD(MAGICRAM, ETHER), 0}, 185 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90}, 186 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90}, 187 { PCMCIA_CARD(NDC, ND5100_E), 0}, 188 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX}, 189 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */ 190 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX}, 191 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0}, 192 { PCMCIA_CARD(NEWMEDIA, LANSURFER), 0}, 193 { PCMCIA_CARD(OEM2, ETHERNET), 0}, 194 { PCMCIA_CARD(OEM2, NE2000), 0}, 195 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 }, 196 { PCMCIA_CARD(PREMAX, PE200), 0}, 197 { PCMCIA_CARD(PSION, LANGLOBAL), 198 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM}, 199 { PCMCIA_CARD(RACORE, ETHERNET), 0}, 200 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90}, 201 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90}, 202 { PCMCIA_CARD(RELIA, COMBO), 0}, 203 { PCMCIA_CARD(RPTI, EP400), 0}, 204 { PCMCIA_CARD(RPTI, EP401), 0}, 205 { PCMCIA_CARD(SMC, EZCARD), 0}, 206 { PCMCIA_CARD(SOCKET, EA_ETHER), 0}, 207 { PCMCIA_CARD(SOCKET, ES_1000), 0}, 208 { PCMCIA_CARD(SOCKET, LP_ETHER), 0}, 209 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0}, 210 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX}, 211 { PCMCIA_CARD(SVEC, COMBOCARD), 0}, 212 { PCMCIA_CARD(SVEC, LANCARD), 0}, 213 { PCMCIA_CARD(TAMARACK, ETHERNET), 0}, 214 { PCMCIA_CARD(TDK, CFE_10), 0}, 215 { PCMCIA_CARD(TDK, LAK_CD031), 0}, 216 { PCMCIA_CARD(TDK, DFL5610WS), 0}, 217 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 }, 218 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90}, 219 { PCMCIA_CARD(ZONET, ZEN), 0}, 220 { { NULL } } 221}; 222 223/* 224 * PC Card (PCMCIA) specific code. 225 */ 226static int ed_pccard_probe(device_t); 227static int ed_pccard_attach(device_t); 228 229static int ed_pccard_dl100xx(device_t dev, const struct ed_product *); 230static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc); 231static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits); 232static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, 233 int nbits); 234 235static void ed_pccard_ax88x90_mii_reset(struct ed_softc *sc); 236static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits); 237static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, 238 int nbits); 239static int ed_miibus_readreg(device_t dev, int phy, int reg); 240static int ed_ifmedia_upd(struct ifnet *); 241static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *); 242 243static int ed_pccard_ax88x90(device_t dev, const struct ed_product *); 244 245static int 246ed_pccard_probe(device_t dev) 247{ 248 const struct ed_product *pp; 249 int error; 250 uint32_t fcn = PCCARD_FUNCTION_UNSPEC; 251 252 /* Make sure we're a network function */ 253 error = pccard_get_function(dev, &fcn); 254 if (error != 0) 255 return (error); 256 257 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 258 (const struct pccard_product *) ed_pccard_products, 259 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 260 if (pp->prod.pp_name != NULL) 261 device_set_desc(dev, pp->prod.pp_name); 262 /* 263 * Some devices don't ID themselves as network, but 264 * that's OK if the flags say so. 265 */ 266 if (!(pp->flags & NE2000DVF_ANYFUNC) && 267 fcn != PCCARD_FUNCTION_NETWORK) 268 return (ENXIO); 269 return (0); 270 } 271 return (ENXIO); 272} 273 274static int 275ed_pccard_rom_mac(device_t dev, uint8_t *enaddr) 276{ 277 struct ed_softc *sc = device_get_softc(dev); 278 uint8_t romdata[32]; 279 int i; 280 281 /* 282 * Read in the rom data at location 0. Since there are no 283 * NE-1000 based PC Card devices, we'll assume we're 16-bit. 284 * 285 * In researching what format this takes, I've found that the 286 * following appears to be true for multiple cards based on 287 * observation as well as datasheet digging. 288 * 289 * Data is stored in some ROM and is copied out 8 bits at a time 290 * into 16-bit wide locations. This means that the odd locations 291 * of the ROM are not used (and can be either 0 or ff). 292 * 293 * The contents appears to be as follows: 294 * PROM RAM 295 * Offset Offset What 296 * 0 0 ENETADDR 0 297 * 1 2 ENETADDR 1 298 * 2 4 ENETADDR 2 299 * 3 6 ENETADDR 3 300 * 4 8 ENETADDR 4 301 * 5 10 ENETADDR 5 302 * 6-13 12-26 Reserved (varies by manufacturer) 303 * 14 28 0x57 304 * 15 30 0x57 305 * 306 * Some manufacturers have another image of enetaddr from 307 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but 308 * this doesn't appear to be universally documented in the 309 * datasheets. Some manufactuers have a card type, card config 310 * checksums, etc encoded into PROM offset 6-13, but deciphering it 311 * requires more knowledge about the exact underlying chipset than 312 * we possess (and maybe can possess). 313 */ 314 ed_pio_readmem(sc, 0, romdata, 32); 315 if (bootverbose) 316 printf("ROM DATA: %32D\n", romdata, " "); 317 if (romdata[28] != 0x57 || romdata[30] != 0x57) 318 return (0); 319 for (i = 0; i < ETHER_ADDR_LEN; i++) 320 enaddr[i] = romdata[i * 2]; 321 return (1); 322} 323 324static int 325ed_pccard_add_modem(device_t dev) 326{ 327 struct ed_softc *sc = device_get_softc(dev); 328 329 device_printf(dev, "Need to write this code: modem rid is %d\n", 330 sc->modem_rid); 331 return 0; 332} 333 334static int 335ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command) 336{ 337 struct mii_data *mii; 338 339 if (sc->miibus == NULL) 340 return (EINVAL); 341 mii = device_get_softc(sc->miibus); 342 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command)); 343} 344 345 346static void 347ed_pccard_mediachg(struct ed_softc *sc) 348{ 349 struct mii_data *mii; 350 351 if (sc->miibus == NULL) 352 return; 353 mii = device_get_softc(sc->miibus); 354 mii_mediachg(mii); 355} 356 357static void 358ed_pccard_tick(void *arg) 359{ 360 struct ed_softc *sc = arg; 361 struct mii_data *mii; 362 363 ED_ASSERT_LOCKED(sc); 364 if (sc->miibus != NULL) { 365 mii = device_get_softc(sc->miibus); 366 mii_tick(mii); 367 } 368 callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc); 369} 370 371static int 372ed_pccard_attach(device_t dev) 373{ 374 u_char sum; 375 u_char enaddr[ETHER_ADDR_LEN]; 376 const struct ed_product *pp; 377 int error, i; 378 struct ed_softc *sc = device_get_softc(dev); 379 u_long size; 380 381 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 382 (const struct pccard_product *) ed_pccard_products, 383 sizeof(ed_pccard_products[0]), NULL)) == NULL) 384 return (ENXIO); 385 sc->modem_rid = -1; 386 if (pp->flags & NE2000DVF_MODEM) { 387 sc->port_rid = -1; 388 for (i = 0; i < 4; i++) { 389 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i); 390 if (size == ED_NOVELL_IO_PORTS) 391 sc->port_rid = i; 392 else if (size == 8) 393 sc->modem_rid = i; 394 } 395 if (sc->port_rid == -1) { 396 device_printf(dev, "Cannot locate my ports!\n"); 397 return (ENXIO); 398 } 399 } else { 400 sc->port_rid = 0; 401 } 402 /* Allocate the port resource during setup. */ 403 error = ed_alloc_port(dev, sc->port_rid, ED_NOVELL_IO_PORTS); 404 if (error) 405 return (error); 406 error = ed_alloc_irq(dev, 0, 0); 407 if (error) 408 goto bad; 409 410 /* 411 * Determine which chipset we are. All the PC Card chipsets have the 412 * ASIC and NIC offsets in the same place. 413 */ 414 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 415 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 416 error = ENXIO; 417 if (error != 0) 418 error = ed_pccard_dl100xx(dev, pp); 419 if (error != 0) 420 error = ed_pccard_ax88x90(dev, pp); 421 if (error != 0) 422 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 423 if (error) 424 goto bad; 425 426 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 427 edintr, sc, &sc->irq_handle); 428 if (error) { 429 device_printf(dev, "setup intr failed %d \n", error); 430 goto bad; 431 } 432 433 /* 434 * For the older cards, we have to get the MAC address from 435 * the card in some way. Let's try the standard PCMCIA way 436 * first. If that fails, then check to see if we have valid 437 * data from the standard NE-2000 data roms. If that fails, 438 * check to see if the card has a hint about where to look in 439 * its CIS. If that fails, maybe we should look at some 440 * default value. In all fails, we should fail the attach, 441 * but don't right now. 442 */ 443 if (sc->chip_type == ED_CHIP_TYPE_DP8390) { 444 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 445 printf("%#x and %#x", ed_nic_inb(sc, 0xa), ed_nic_inb(sc, 0xb)); 446 pccard_get_ether(dev, enaddr); 447 if (bootverbose) 448 device_printf(dev, "CIS MAC %6D\n", enaddr, ":"); 449 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 450 sum |= enaddr[i]; 451 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) { 452 if (bootverbose) 453 device_printf(dev, "ROM mac %6D\n", enaddr, 454 ":"); 455 sum++; 456 } 457 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) { 458 for (i = 0; i < ETHER_ADDR_LEN; i++) { 459 pccard_attr_read_1(dev, pp->enoff + i * 2, 460 enaddr + i); 461 sum |= enaddr[i]; 462 } 463 if (bootverbose) 464 device_printf(dev, "Hint %x MAC %6D\n", 465 pp->enoff, enaddr, ":"); 466 } 467 if (sum == 0) { 468 for (i = 0; i < ETHER_ADDR_LEN; i++) { 469 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET + 470 i * 2, enaddr + i); 471 sum |= enaddr[i]; 472 } 473 if (bootverbose) 474 device_printf(dev, "Fallback MAC %6D\n", 475 enaddr, ":"); 476 } 477 if (sum == 0) { 478 device_printf(dev, "Cannot extract MAC address.\n"); 479 ed_release_resources(dev); 480 return (ENXIO); 481 } 482 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN); 483 } 484 485 error = ed_attach(dev); 486 if (error) 487 goto bad; 488 if (sc->chip_type == ED_CHIP_TYPE_DL10019 || 489 sc->chip_type == ED_CHIP_TYPE_DL10022) { 490 /* Probe for an MII bus, but ignore errors. */ 491 ed_pccard_dl100xx_mii_reset(sc); 492 mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 493 ed_ifmedia_sts); 494 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190) { 495 ed_pccard_ax88x90_mii_reset(sc); 496 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, 497 ed_ifmedia_sts)) != 0) { 498 device_printf(dev, "Missing mii!\n"); 499 goto bad; 500 } 501 502 } 503 if (sc->miibus != NULL) { 504 sc->sc_tick = ed_pccard_tick; 505 sc->sc_mediachg = ed_pccard_mediachg; 506 sc->sc_media_ioctl = ed_pccard_media_ioctl; 507 } 508 if (sc->modem_rid != -1) 509 ed_pccard_add_modem(dev); 510 return (0); 511bad: 512 ed_release_resources(dev); 513 return (error); 514} 515 516/* 517 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100 518 * and compatible cards (DL10019C Ethernet controller). 519 * 520 * Note: The PAO patches try to use more memory for the card, but that 521 * seems to fail for my card. A future optimization would add this back 522 * conditionally. 523 */ 524static int 525ed_pccard_dl100xx(device_t dev, const struct ed_product *pp) 526{ 527 struct ed_softc *sc = device_get_softc(dev); 528 u_char sum; 529 uint8_t id; 530 int i, error; 531 532 if (!(pp->flags & NE2000DVF_DL100XX)) 533 return (ENXIO); 534 if (bootverbose) 535 device_printf(dev, "Trying DL100xx probing\n"); 536 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 537 if (bootverbose && error) 538 device_printf(dev, "Novell generic probe failed: %d\n", error); 539 if (error != 0) 540 return (error); 541 542 /* 543 * Linksys registers(offset from ASIC base) 544 * 545 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5) 546 * 0x0A : Card ID Register (CIR) 547 * 0x0B : Check Sum Register (SR) 548 */ 549 for (sum = 0, i = 0x04; i < 0x0c; i++) 550 sum += ed_asic_inb(sc, i); 551 if (sum != 0xff) { 552 if (bootverbose) 553 device_printf(dev, "Bad checksum %#x\n", sum); 554 return (ENXIO); /* invalid DL10019C */ 555 } 556 if (bootverbose) 557 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa)); 558 for (i = 0; i < ETHER_ADDR_LEN; i++) 559 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i); 560 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 561 id = ed_asic_inb(sc, 0xf); 562 sc->isa16bit = 1; 563 sc->vendor = ED_VENDOR_NOVELL; 564 sc->type = ED_TYPE_NE2000; 565 sc->chip_type = (id & 0x90) == 0x90 ? 566 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019; 567 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019"; 568 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits; 569 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits; 570 return (0); 571} 572 573/* MII bit-twiddling routines for cards using Dlink chipset */ 574#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 575 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x)) 576#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 577 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x)) 578 579static void 580ed_pccard_dl100xx_mii_reset(struct ed_softc *sc) 581{ 582 if (sc->chip_type != ED_CHIP_TYPE_DL10022) 583 return; 584 585 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2); 586 DELAY(10); 587 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 588 ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1); 589 DELAY(10); 590 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2); 591 DELAY(10); 592 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 593 ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1); 594 DELAY(10); 595 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0); 596} 597 598static void 599ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 600{ 601 int i; 602 603 if (sc->chip_type == ED_CHIP_TYPE_DL10022) 604 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_22); 605 else 606 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT_19); 607 608 for (i = nbits - 1; i >= 0; i--) { 609 if ((val >> i) & 1) 610 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT); 611 else 612 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT); 613 DELAY(10); 614 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 615 DELAY(10); 616 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 617 DELAY(10); 618 } 619} 620 621static u_int 622ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits) 623{ 624 int i; 625 u_int val = 0; 626 627 if (sc->chip_type == ED_CHIP_TYPE_DL10022) 628 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_22); 629 else 630 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT_19); 631 632 for (i = nbits - 1; i >= 0; i--) { 633 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 634 DELAY(10); 635 val <<= 1; 636 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATATIN) 637 val++; 638 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 639 DELAY(10); 640 } 641 return val; 642} 643 644static int 645ed_pccard_ax88x90_geteprom(struct ed_softc *sc) 646{ 647 int prom[16],i; 648 u_char tmp; 649 struct { 650 unsigned char offset, value; 651 } pg_seq[] = { 652 /* Select Page0 */ 653 {ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0}, 654 {ED_P0_DCR, 0x01}, 655 {ED_P0_RBCR0, 0x00}, /* Clear the count regs. */ 656 {ED_P0_RBCR1, 0x00}, 657 {ED_P0_IMR, 0x00}, /* Mask completion irq. */ 658 {ED_P0_ISR, 0xff}, 659 {ED_P0_RCR, ED_RCR_MON | ED_RCR_INTT}, /* Set To Monitor */ 660 {ED_P0_TCR, ED_TCR_LB0}, /* loopback mode. */ 661 {ED_P0_RBCR0, 32}, 662 {ED_P0_RBCR1, 0x00}, 663 {ED_P0_RSAR0, 0x00}, 664 {ED_P0_RSAR1, 0x04}, 665 {ED_P0_CR, ED_CR_RD0 | ED_CR_STA | ED_CR_PAGE_0}, 666 }; 667 668 /* Reset Card */ 669 tmp = ed_asic_inb(sc, ED_NOVELL_RESET); 670 ed_asic_outb(sc, ED_NOVELL_RESET, tmp); 671 DELAY(5000); 672 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 673 DELAY(5000); 674 675 /* Card Settings */ 676 for (i = 0; i < sizeof(pg_seq) / sizeof(pg_seq[0]); i++) 677 ed_nic_outb(sc, pg_seq[i].offset, pg_seq[i].value); 678 679 /* Get Data */ 680 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) 681 prom[i] = ed_asic_inw(sc, 0); 682 for (i = 0; i < ETHER_ADDR_LEN; i += 2) { 683 sc->enaddr[i] = prom[i / 2] & 0xff; 684 sc->enaddr[i + 1] = (prom[i / 2] >> 8) & 0xff; 685 } 686 return (0); 687} 688 689/* 690 * Special setup for AX88[17]90 691 */ 692static int 693ed_pccard_ax88x90(device_t dev, const struct ed_product *pp) 694{ 695 int error, iobase, i, id; 696 char *ts; 697 struct ed_softc *sc = device_get_softc(dev); 698 699 if (!(pp->flags & NE2000DVF_AX88X90)) 700 return (ENXIO); 701 702 if (bootverbose) 703 device_printf(dev, "Checking AX88x90\n"); 704 705 /* 706 * Set the IOBASE Register. The AX88x90 cards are potentially 707 * multifunction cards, and thus requires a slight workaround. 708 * We write the address the card is at. 709 */ 710 iobase = rman_get_start(sc->port_res); 711 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff); 712 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff); 713 714 /* 715 * Check to see if we have a MII PHY ID at any of the first 17 716 * locations. All AX88x90 devices have MII and a PHY, so we use 717 * this to weed out chips that would otherwise make it through 718 * the tests we have after this point. 719 */ 720 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits; 721 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits; 722 for (i = 0; i < 17; i++) { 723 id = ed_miibus_readreg(dev, i, MII_PHYIDR1); 724 if (id != 0 && id != 0xffff) 725 break; 726 } 727 if (i == 17) { 728 sc->mii_readbits = 0; 729 sc->mii_writebits = 0; 730 return (ENXIO); 731 } 732 733 734 ts = "AX88190"; 735 if (ed_asic_inb(sc, ED_ASIX_TEST) != 0) { 736 /* 737 * AX88790 (and I think AX88190A) chips need to be 738 * powered down. There's an erratum that says we should 739 * power down the PHY for 2.5s, but this seems to power 740 * down the whole card. I'm unsure why this was done, but 741 * appears to be required for proper operation. 742 */ 743 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, 744 PCCARD_CCR_STATUS_PWRDWN); 745 ts = "AX88790"; 746 } 747 sc->chip_type = ED_CHIP_TYPE_AX88190; 748 error = ed_pccard_ax88x90_geteprom(sc); 749 if (error) 750 return (error); 751 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 752 if (bootverbose) 753 device_printf(dev, "probe novel returns %d\n", error); 754 if (error == 0) { 755 sc->vendor = ED_VENDOR_NOVELL; 756 sc->type = ED_TYPE_NE2000; 757 sc->chip_type = ED_CHIP_TYPE_AX88190; 758 sc->type_str = ts; 759 } 760 return (error); 761} 762 763/* MII bit-twiddling routines for cards using Dlink chipset */ 764#define AX88X90_MIISET(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \ 765 ed_asic_inb(sc, ED_AX88X90_MIIBUS) | (x)) 766#define AX88X90_MIICLR(sc, x) ed_asic_outb(sc, ED_AX88X90_MIIBUS, \ 767 ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ~(x)) 768 769static void 770ed_pccard_ax88x90_mii_reset(struct ed_softc *sc) 771{ 772 /* Do nothing! */ 773} 774 775static void 776ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 777{ 778 int i; 779 780 AX88X90_MIICLR(sc, ED_AX88X90_MII_DIROUT); 781 for (i = nbits - 1; i >= 0; i--) { 782 if ((val >> i) & 1) 783 AX88X90_MIISET(sc, ED_AX88X90_MII_DATAOUT); 784 else 785 AX88X90_MIICLR(sc, ED_AX88X90_MII_DATAOUT); 786 DELAY(10); 787 AX88X90_MIISET(sc, ED_AX88X90_MII_CLK); 788 DELAY(10); 789 AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK); 790 DELAY(10); 791 } 792} 793 794static u_int 795ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits) 796{ 797 int i; 798 u_int val = 0; 799 800 AX88X90_MIISET(sc, ED_AX88X90_MII_DIROUT); 801 for (i = nbits - 1; i >= 0; i--) { 802 AX88X90_MIISET(sc, ED_AX88X90_MII_CLK); 803 DELAY(10); 804 val <<= 1; 805 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATATIN) 806 val++; 807 AX88X90_MIICLR(sc, ED_AX88X90_MII_CLK); 808 DELAY(10); 809 } 810 return val; 811} 812 813/* 814 * MII bus support routines. 815 */ 816static int 817ed_miibus_readreg(device_t dev, int phy, int reg) 818{ 819 struct ed_softc *sc; 820 int failed, val; 821 822 /* 823 * The AX88790 seem to have phy 0..f external, and 0x10 internal. 824 * but they also seem to have a bogus one that shows up at phy 825 * 0x11 through 0x1f. 826 */ 827 if (phy >= 0x11) 828 return (0); 829 830 sc = device_get_softc(dev); 831 (*sc->mii_writebits)(sc, 0xffffffff, 32); 832 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 833 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); 834 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 835 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 836 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 837 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); 838 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 839 return (failed ? 0 : val); 840} 841 842static void 843ed_miibus_writereg(device_t dev, int phy, int reg, int data) 844{ 845 struct ed_softc *sc; 846 847 /* 848 * The AX88790 seem to have phy 0..f external, and 0x10 internal. 849 * but they also seem to have a bogus one that shows up at phy 850 * 0x11 through 0x1f. 851 */ 852 if (phy >= 0x11) 853 return; 854 855 sc = device_get_softc(dev); 856 (*sc->mii_writebits)(sc, 0xffffffff, 32); 857 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 858 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS); 859 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 860 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 861 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS); 862 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS); 863 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 864} 865 866static int 867ed_ifmedia_upd(struct ifnet *ifp) 868{ 869 struct ed_softc *sc; 870 struct mii_data *mii; 871 872 sc = ifp->if_softc; 873 if (sc->miibus == NULL) 874 return (ENXIO); 875 876 mii = device_get_softc(sc->miibus); 877 return mii_mediachg(mii); 878} 879 880static void 881ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 882{ 883 struct ed_softc *sc; 884 struct mii_data *mii; 885 886 sc = ifp->if_softc; 887 if (sc->miibus == NULL) 888 return; 889 890 mii = device_get_softc(sc->miibus); 891 mii_pollstat(mii); 892 ifmr->ifm_active = mii->mii_media_active; 893 ifmr->ifm_status = mii->mii_media_status; 894} 895 896static void 897ed_child_detached(device_t dev, device_t child) 898{ 899 struct ed_softc *sc; 900 901 sc = device_get_softc(dev); 902 if (child == sc->miibus) 903 sc->miibus = NULL; 904} 905 906static device_method_t ed_pccard_methods[] = { 907 /* Device interface */ 908 DEVMETHOD(device_probe, ed_pccard_probe), 909 DEVMETHOD(device_attach, ed_pccard_attach), 910 DEVMETHOD(device_detach, ed_detach), 911 912 /* Bus interface */ 913 DEVMETHOD(bus_child_detached, ed_child_detached), 914 915 /* MII interface */ 916 DEVMETHOD(miibus_readreg, ed_miibus_readreg), 917 DEVMETHOD(miibus_writereg, ed_miibus_writereg), 918 919 { 0, 0 } 920}; 921 922static driver_t ed_pccard_driver = { 923 "ed", 924 ed_pccard_methods, 925 sizeof(struct ed_softc) 926}; 927 928DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0); 929DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0); 930MODULE_DEPEND(ed, miibus, 1, 1, 1); 931MODULE_DEPEND(ed, ether, 1, 1, 1); 932