e1000_phy.h revision 178523
1221828Sgrehan/****************************************************************************** 2221828Sgrehan 3221828Sgrehan Copyright (c) 2001-2008, Intel Corporation 4221828Sgrehan All rights reserved. 5221828Sgrehan 6221828Sgrehan Redistribution and use in source and binary forms, with or without 7221828Sgrehan modification, are permitted provided that the following conditions are met: 8221828Sgrehan 9221828Sgrehan 1. Redistributions of source code must retain the above copyright notice, 10221828Sgrehan this list of conditions and the following disclaimer. 11221828Sgrehan 12221828Sgrehan 2. Redistributions in binary form must reproduce the above copyright 13221828Sgrehan notice, this list of conditions and the following disclaimer in the 14221828Sgrehan documentation and/or other materials provided with the distribution. 15221828Sgrehan 16221828Sgrehan 3. Neither the name of the Intel Corporation nor the names of its 17221828Sgrehan contributors may be used to endorse or promote products derived from 18221828Sgrehan this software without specific prior written permission. 19221828Sgrehan 20221828Sgrehan THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21221828Sgrehan AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22221828Sgrehan IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23221828Sgrehan ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24221828Sgrehan LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25221828Sgrehan CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26221828Sgrehan SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27221828Sgrehan INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28221828Sgrehan CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29221828Sgrehan ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30221828Sgrehan POSSIBILITY OF SUCH DAMAGE. 31221828Sgrehan 32221828Sgrehan******************************************************************************/ 33221828Sgrehan/*$FreeBSD: head/sys/dev/em/e1000_phy.h 178523 2008-04-25 21:19:41Z jfv $*/ 34221828Sgrehan 35221828Sgrehan#ifndef _E1000_PHY_H_ 36221828Sgrehan#define _E1000_PHY_H_ 37221828Sgrehan 38221828Sgrehantypedef enum { 39221828Sgrehan e1000_ms_hw_default = 0, 40221828Sgrehan e1000_ms_force_master, 41221828Sgrehan e1000_ms_force_slave, 42221828Sgrehan e1000_ms_auto 43221828Sgrehan} e1000_ms_type; 44221828Sgrehan 45221828Sgrehantypedef enum { 46221828Sgrehan e1000_smart_speed_default = 0, 47221828Sgrehan e1000_smart_speed_on, 48221828Sgrehan e1000_smart_speed_off 49266339Sjhb} e1000_smart_speed; 50249879Sgrehan 51249879Sgrehanvoid e1000_init_phy_ops_generic(struct e1000_hw *hw); 52268953Sjhbs32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data); 53221828Sgrehanvoid e1000_null_phy_generic(struct e1000_hw *hw); 54268953Sjhbs32 e1000_null_lplu_state(struct e1000_hw *hw, bool active); 55221828Sgrehans32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data); 56221828Sgrehans32 e1000_check_downshift_generic(struct e1000_hw *hw); 57276349Sneels32 e1000_check_polarity_m88(struct e1000_hw *hw); 58276349Sneels32 e1000_check_polarity_igp(struct e1000_hw *hw); 59276349Sneels32 e1000_check_reset_block_generic(struct e1000_hw *hw); 60276349Sneels32 e1000_copper_link_autoneg(struct e1000_hw *hw); 61262352Sjhbs32 e1000_copper_link_setup_igp(struct e1000_hw *hw); 62262352Sjhbs32 e1000_copper_link_setup_m88(struct e1000_hw *hw); 63262352Sjhbs32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw); 64262352Sjhbs32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw); 65262352Sjhbs32 e1000_get_cable_length_m88(struct e1000_hw *hw); 66262352Sjhbs32 e1000_get_cable_length_igp_2(struct e1000_hw *hw); 67262352Sjhbs32 e1000_get_cfg_done_generic(struct e1000_hw *hw); 68262352Sjhbs32 e1000_get_phy_id(struct e1000_hw *hw); 69262352Sjhbs32 e1000_get_phy_info_igp(struct e1000_hw *hw); 70262352Sjhbs32 e1000_get_phy_info_m88(struct e1000_hw *hw); 71262352Sjhbs32 e1000_phy_sw_reset_generic(struct e1000_hw *hw); 72262352Sjhbvoid e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 73262352Sjhbs32 e1000_phy_hw_reset_generic(struct e1000_hw *hw); 74262352Sjhbs32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw); 75262352Sjhbs32 e1000_phy_setup_autoneg(struct e1000_hw *hw); 76262352Sjhbs32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data); 77262352Sjhbs32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); 78262352Sjhbs32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 79262352Sjhbs32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active); 80276349Sneels32 e1000_setup_copper_link_generic(struct e1000_hw *hw); 81262352Sjhbs32 e1000_wait_autoneg_generic(struct e1000_hw *hw); 82221828Sgrehans32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data); 83221828Sgrehans32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); 84221828Sgrehans32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 85221828Sgrehans32 e1000_phy_reset_dsp(struct e1000_hw *hw); 86221828Sgrehans32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 87234761Sgrehan u32 usec_interval, bool *success); 88240941Sneels32 e1000_phy_init_script_igp3(struct e1000_hw *hw); 89243640Sneele1000_phy_type e1000_get_phy_type_from_id(u32 phy_id); 90256072Sneels32 e1000_determine_phy_address(struct e1000_hw* hw); 91256072Sneels32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 92221828Sgrehans32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 93221828Sgrehans32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data, 94221828Sgrehan bool read); 95222605Sjhbs32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); 96222605Sjhbs32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 97221828Sgrehanvoid e1000_power_up_phy_copper(struct e1000_hw *hw); 98221828Sgrehanvoid e1000_power_down_phy_copper(struct e1000_hw *hw); 99221828Sgrehans32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); 100221828Sgrehans32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); 101221828Sgrehan 102221828Sgrehan#define E1000_MAX_PHY_ADDR 4 103221828Sgrehan 104221828Sgrehan/* IGP01E1000 Specific Registers */ 105266339Sjhb#define IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */ 106221828Sgrehan#define IGP01E1000_PHY_PORT_STATUS 0x11 /* Status */ 107221828Sgrehan#define IGP01E1000_PHY_PORT_CTRL 0x12 /* Control */ 108221828Sgrehan#define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */ 109221828Sgrehan#define IGP01E1000_GMII_FIFO 0x14 /* GMII FIFO */ 110221828Sgrehan#define IGP01E1000_PHY_CHANNEL_QUALITY 0x15 /* PHY Channel Quality */ 111221828Sgrehan#define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */ 112221828Sgrehan#define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */ 113221828Sgrehan#define BM_PHY_PAGE_SELECT 22 /* Page Select for BM */ 114221828Sgrehan#define IGP_PAGE_SHIFT 5 115221828Sgrehan#define PHY_REG_MASK 0x1F 116266339Sjhb 117221828Sgrehan#define BM_WUC_PAGE 800 118221828Sgrehan#define BM_WUC_ADDRESS_OPCODE 0x11 119221828Sgrehan#define BM_WUC_DATA_OPCODE 0x12 120221828Sgrehan#define BM_WUC_ENABLE_PAGE 769 121221828Sgrehan#define BM_WUC_ENABLE_REG 17 122221828Sgrehan#define BM_WUC_ENABLE_BIT (1 << 2) 123221828Sgrehan#define BM_WUC_HOST_WU_BIT (1 << 4) 124221828Sgrehan 125221828Sgrehan/* BM PHY Copper Specific Control 1 */ 126221828Sgrehan#define BM_CS_CTRL1 16 127221828Sgrehan#define BM_CS_CTRL1_ENERGY_DETECT 0x0300 /* Enable Energy Detect */ 128221828Sgrehan 129221828Sgrehan/* BM PHY Copper Specific States */ 130221828Sgrehan#define BM_CS_STATUS 17 131221828Sgrehan#define BM_CS_STATUS_ENERGY_DETECT 0x0010 /* Energy Detect Status */ 132221828Sgrehan 133221828Sgrehan#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 134221828Sgrehan#define IGP01E1000_PHY_POLARITY_MASK 0x0078 135221828Sgrehan 136221828Sgrehan#define IGP01E1000_PSCR_AUTO_MDIX 0x1000 137221828Sgrehan#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */ 138266339Sjhb 139221828Sgrehan#define IGP01E1000_PSCFR_SMART_SPEED 0x0080 140266339Sjhb 141266339Sjhb/* Enable flexible speed on link-up */ 142266339Sjhb#define IGP01E1000_GMII_FLEX_SPD 0x0010 143266339Sjhb#define IGP01E1000_GMII_SPD 0x0020 /* Enable SPD */ 144266339Sjhb 145221828Sgrehan#define IGP02E1000_PM_SPD 0x0001 /* Smart Power Down */ 146221828Sgrehan#define IGP02E1000_PM_D0_LPLU 0x0002 /* For D0a states */ 147221828Sgrehan#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */ 148221828Sgrehan 149221828Sgrehan#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000 150221828Sgrehan 151221828Sgrehan#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002 152221828Sgrehan#define IGP01E1000_PSSR_MDIX 0x0008 153221828Sgrehan#define IGP01E1000_PSSR_SPEED_MASK 0xC000 154221828Sgrehan#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000 155221828Sgrehan 156221828Sgrehan#define IGP02E1000_PHY_CHANNEL_NUM 4 157221828Sgrehan#define IGP02E1000_PHY_AGC_A 0x11B1 158221828Sgrehan#define IGP02E1000_PHY_AGC_B 0x12B1 159221828Sgrehan#define IGP02E1000_PHY_AGC_C 0x14B1 160221828Sgrehan#define IGP02E1000_PHY_AGC_D 0x18B1 161221828Sgrehan 162221828Sgrehan#define IGP02E1000_AGC_LENGTH_SHIFT 9 /* Course - 15:13, Fine - 12:9 */ 163221828Sgrehan#define IGP02E1000_AGC_LENGTH_MASK 0x7F 164221828Sgrehan#define IGP02E1000_AGC_RANGE 15 165221828Sgrehan 166221828Sgrehan#define IGP03E1000_PHY_MISC_CTRL 0x1B 167221828Sgrehan#define IGP03E1000_PHY_MISC_DUPLEX_MANUAL_SET 0x1000 /* Manually Set Duplex */ 168221828Sgrehan 169221828Sgrehan#define E1000_CABLE_LENGTH_UNDEFINED 0xFF 170221828Sgrehan 171221828Sgrehan#define E1000_KMRNCTRLSTA_OFFSET 0x001F0000 172221828Sgrehan#define E1000_KMRNCTRLSTA_OFFSET_SHIFT 16 173221828Sgrehan#define E1000_KMRNCTRLSTA_REN 0x00200000 174221828Sgrehan#define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ 175221828Sgrehan#define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ 176221828Sgrehan 177221828Sgrehan#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 178221828Sgrehan#define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY Special Control */ 179221828Sgrehan#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */ 180221828Sgrehan#define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control */ 181221828Sgrehan 182221828Sgrehan/* IFE PHY Extended Status Control */ 183221828Sgrehan#define IFE_PESC_POLARITY_REVERSED 0x0100 184221828Sgrehan 185221828Sgrehan/* IFE PHY Special Control */ 186221828Sgrehan#define IFE_PSC_AUTO_POLARITY_DISABLE 0x0010 187221828Sgrehan#define IFE_PSC_FORCE_POLARITY 0x0020 188266339Sjhb#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100 189266339Sjhb 190221828Sgrehan/* IFE PHY Special Control and LED Control */ 191221828Sgrehan#define IFE_PSCL_PROBE_MODE 0x0020 192221828Sgrehan#define IFE_PSCL_PROBE_LEDS_OFF 0x0006 /* Force LEDs 0 and 2 off */ 193221828Sgrehan#define IFE_PSCL_PROBE_LEDS_ON 0x0007 /* Force LEDs 0 and 2 on */ 194221828Sgrehan 195221828Sgrehan/* IFE PHY MDIX Control */ 196221828Sgrehan#define IFE_PMC_MDIX_STATUS 0x0020 /* 1=MDI-X, 0=MDI */ 197221828Sgrehan#define IFE_PMC_FORCE_MDIX 0x0040 /* 1=force MDI-X, 0=force MDI */ 198221828Sgrehan#define IFE_PMC_AUTO_MDIX 0x0080 /* 1=enable auto MDI/MDI-X, 0=disable */ 199221828Sgrehan 200221828Sgrehan#endif 201221828Sgrehan