e1000_phy.h revision 176667 
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32*******************************************************************************/
33/* $FreeBSD: head/sys/dev/em/e1000_phy.h 176667 2008-02-29 21:50:11Z jfv $ */
34
35
36#ifndef _E1000_PHY_H_
37#define _E1000_PHY_H_
38
39typedef enum {
40	e1000_ms_hw_default = 0,
41	e1000_ms_force_master,
42	e1000_ms_force_slave,
43	e1000_ms_auto
44} e1000_ms_type;
45
46typedef enum {
47	e1000_smart_speed_default = 0,
48	e1000_smart_speed_on,
49	e1000_smart_speed_off
50} e1000_smart_speed;
51
52s32  e1000_check_downshift_generic(struct e1000_hw *hw);
53s32  e1000_check_polarity_m88(struct e1000_hw *hw);
54s32  e1000_check_polarity_igp(struct e1000_hw *hw);
55s32  e1000_check_reset_block_generic(struct e1000_hw *hw);
56s32  e1000_copper_link_autoneg(struct e1000_hw *hw);
57s32  e1000_phy_force_speed_duplex(struct e1000_hw *hw);
58s32  e1000_copper_link_setup_igp(struct e1000_hw *hw);
59s32  e1000_copper_link_setup_m88(struct e1000_hw *hw);
60s32  e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw);
61s32  e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw);
62s32  e1000_get_cable_length_m88(struct e1000_hw *hw);
63s32  e1000_get_cable_length_igp_2(struct e1000_hw *hw);
64s32  e1000_get_cfg_done_generic(struct e1000_hw *hw);
65s32  e1000_get_phy_id(struct e1000_hw *hw);
66s32  e1000_get_phy_info_igp(struct e1000_hw *hw);
67s32  e1000_get_phy_info_m88(struct e1000_hw *hw);
68s32  e1000_phy_sw_reset_generic(struct e1000_hw *hw);
69void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
70s32  e1000_phy_hw_reset_generic(struct e1000_hw *hw);
71s32  e1000_phy_reset_dsp_generic(struct e1000_hw *hw);
72s32  e1000_phy_setup_autoneg(struct e1000_hw *hw);
73s32  e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
74s32  e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
75s32  e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
76s32  e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active);
77s32  e1000_setup_copper_link_generic(struct e1000_hw *hw);
78s32  e1000_wait_autoneg_generic(struct e1000_hw *hw);
79s32  e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
80s32  e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
81s32  e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
82s32  e1000_phy_reset_dsp(struct e1000_hw *hw);
83s32  e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
84                                u32 usec_interval, bool *success);
85s32  e1000_phy_init_script_igp3(struct e1000_hw *hw);
86e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id);
87s32 e1000_determine_phy_address(struct e1000_hw* hw);
88s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
89s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
90s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data,
91                                   bool read);
92s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
93s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
94void e1000_power_up_phy_copper(struct e1000_hw *hw);
95void e1000_power_down_phy_copper(struct e1000_hw *hw);
96s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
97s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
98
99#define E1000_MAX_PHY_ADDR                4
100
101/* IGP01E1000 Specific Registers */
102#define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */
103#define IGP01E1000_PHY_PORT_STATUS        0x11 /* Status */
104#define IGP01E1000_PHY_PORT_CTRL          0x12 /* Control */
105#define IGP01E1000_PHY_LINK_HEALTH        0x13 /* PHY Link Health */
106#define IGP01E1000_GMII_FIFO              0x14 /* GMII FIFO */
107#define IGP01E1000_PHY_CHANNEL_QUALITY    0x15 /* PHY Channel Quality */
108#define IGP02E1000_PHY_POWER_MGMT         0x19 /* Power Management */
109#define IGP01E1000_PHY_PAGE_SELECT        0x1F /* Page Select */
110#define BM_PHY_PAGE_SELECT                22   /* Page Select for BM */
111#define IGP_PAGE_SHIFT                    5
112#define PHY_REG_MASK                      0x1F
113
114#define BM_WUC_PAGE                       800
115#define BM_WUC_ADDRESS_OPCODE             0x11
116#define BM_WUC_DATA_OPCODE                0x12
117#define BM_WUC_ENABLE_PAGE                769
118#define BM_WUC_ENABLE_REG                 17
119#define BM_WUC_ENABLE_BIT                 (1 << 2)
120#define BM_WUC_HOST_WU_BIT                (1 << 4)
121
122/* BM PHY Copper Specific Control 1 */
123#define BM_CS_CTRL1                       16
124#define BM_CR_CTRL1_ENERGY_DETECT         0x0300 /* Enable Energy Detect */
125
126#define IGP01E1000_PHY_PCS_INIT_REG       0x00B4
127#define IGP01E1000_PHY_POLARITY_MASK      0x0078
128
129#define IGP01E1000_PSCR_AUTO_MDIX         0x1000
130#define IGP01E1000_PSCR_FORCE_MDI_MDIX    0x2000 /* 0=MDI, 1=MDIX */
131
132#define IGP01E1000_PSCFR_SMART_SPEED      0x0080
133
134/* Enable flexible speed on link-up */
135#define IGP01E1000_GMII_FLEX_SPD          0x0010
136#define IGP01E1000_GMII_SPD               0x0020 /* Enable SPD */
137
138#define IGP02E1000_PM_SPD                 0x0001 /* Smart Power Down */
139#define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */
140#define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */
141
142#define IGP01E1000_PLHR_SS_DOWNGRADE      0x8000
143
144#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
145#define IGP01E1000_PSSR_MDIX              0x0008
146#define IGP01E1000_PSSR_SPEED_MASK        0xC000
147#define IGP01E1000_PSSR_SPEED_1000MBPS    0xC000
148
149#define IGP02E1000_PHY_CHANNEL_NUM        4
150#define IGP02E1000_PHY_AGC_A              0x11B1
151#define IGP02E1000_PHY_AGC_B              0x12B1
152#define IGP02E1000_PHY_AGC_C              0x14B1
153#define IGP02E1000_PHY_AGC_D              0x18B1
154
155#define IGP02E1000_AGC_LENGTH_SHIFT       9   /* Course - 15:13, Fine - 12:9 */
156#define IGP02E1000_AGC_LENGTH_MASK        0x7F
157#define IGP02E1000_AGC_RANGE              15
158
159#define IGP03E1000_PHY_MISC_CTRL          0x1B
160#define IGP03E1000_PHY_MISC_DUPLEX_MANUAL_SET  0x1000 /* Manually Set Duplex */
161
162#define E1000_CABLE_LENGTH_UNDEFINED      0xFF
163
164#define E1000_KMRNCTRLSTA_OFFSET          0x001F0000
165#define E1000_KMRNCTRLSTA_OFFSET_SHIFT    16
166#define E1000_KMRNCTRLSTA_REN             0x00200000
167#define E1000_KMRNCTRLSTA_DIAG_OFFSET     0x3    /* Kumeran Diagnostic */
168#define E1000_KMRNCTRLSTA_DIAG_NELPBK     0x1000 /* Nearend Loopback mode */
169
170#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10
171#define IFE_PHY_SPECIAL_CONTROL     0x11 /* 100BaseTx PHY Special Control */
172#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */
173#define IFE_PHY_MDIX_CONTROL        0x1C /* MDI/MDI-X Control */
174
175/* IFE PHY Extended Status Control */
176#define IFE_PESC_POLARITY_REVERSED    0x0100
177
178/* IFE PHY Special Control */
179#define IFE_PSC_AUTO_POLARITY_DISABLE      0x0010
180#define IFE_PSC_FORCE_POLARITY             0x0020
181#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100
182
183/* IFE PHY Special Control and LED Control */
184#define IFE_PSCL_PROBE_MODE            0x0020
185#define IFE_PSCL_PROBE_LEDS_OFF        0x0006 /* Force LEDs 0 and 2 off */
186#define IFE_PSCL_PROBE_LEDS_ON         0x0007 /* Force LEDs 0 and 2 on */
187
188/* IFE PHY MDIX Control */
189#define IFE_PMC_MDIX_STATUS      0x0020 /* 1=MDI-X, 0=MDI */
190#define IFE_PMC_FORCE_MDIX       0x0040 /* 1=force MDI-X, 0=force MDI */
191#define IFE_PMC_AUTO_MDIX        0x0080 /* 1=enable auto MDI/MDI-X, 0=disable */
192
193#endif
194