e1000_manage.h revision 173788
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30SN/A  Copyright (c) 2001-2007, Intel Corporation
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320SN/A*******************************************************************************/
330SN/A/* $FreeBSD: head/sys/dev/em/e1000_manage.h 173788 2007-11-20 21:41:22Z jfv $ */
340SN/A
350SN/A
360SN/A#ifndef _E1000_MANAGE_H_
370SN/A#define _E1000_MANAGE_H_
380SN/A
390SN/Abool e1000_check_mng_mode_generic(struct e1000_hw *hw);
400SN/Abool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
410SN/As32  e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
420SN/As32  e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
430SN/A                                     u16 length, u16 offset, u8 *sum);
440SN/As32  e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
450SN/A                                    struct e1000_host_mng_command_header *hdr);
460SN/As32  e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
470SN/A                                       u8 *buffer, u16 length);
480SN/A
490SN/Atypedef enum {
500SN/A	e1000_mng_mode_none = 0,
510SN/A	e1000_mng_mode_asf,
520SN/A	e1000_mng_mode_pt,
530SN/A	e1000_mng_mode_ipmi,
540SN/A	e1000_mng_mode_host_if_only
550SN/A} e1000_mng_mode;
560SN/A
570SN/A#define E1000_FACTPS_MNGCG    0x20000000
580SN/A
590SN/A#define E1000_FWSM_MODE_MASK  0xE
600SN/A#define E1000_FWSM_MODE_SHIFT 1
610SN/A
620SN/A#define E1000_MNG_IAMT_MODE                  0x3
630SN/A#define E1000_MNG_DHCP_COOKIE_LENGTH         0x10
640SN/A#define E1000_MNG_DHCP_COOKIE_OFFSET         0x6F0
650SN/A#define E1000_MNG_DHCP_COMMAND_TIMEOUT       10
660SN/A#define E1000_MNG_DHCP_TX_PAYLOAD_CMD        64
670SN/A#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
680SN/A#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN    0x2
690SN/A
700SN/A#define E1000_VFTA_ENTRY_SHIFT               5
710SN/A#define E1000_VFTA_ENTRY_MASK                0x7F
720SN/A#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
730SN/A
740SN/A#define E1000_HI_MAX_BLOCK_BYTE_LENGTH       1792 /* Number of bytes in range */
750SN/A#define E1000_HI_MAX_BLOCK_DWORD_LENGTH      448 /* Number of dwords in range */
760SN/A#define E1000_HI_COMMAND_TIMEOUT             500 /* Process HI command limit */
770SN/A
780SN/A#define E1000_HICR_EN              0x01  /* Enable bit - RO */
790SN/A/* Driver sets this bit when done to put command in RAM */
800SN/A#define E1000_HICR_C               0x02
810SN/A#define E1000_HICR_SV              0x04  /* Status Validity */
820SN/A#define E1000_HICR_FW_RESET_ENABLE 0x40
830SN/A#define E1000_HICR_FW_RESET        0x80
840SN/A
850SN/A/* Intel(R) Active Management Technology signature */
860SN/A#define E1000_IAMT_SIGNATURE  0x544D4149
870SN/A
880SN/A#endif
890SN/A