e1000_i210.h revision 287492
1239281Sgonzo/******************************************************************************
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32239281Sgonzo******************************************************************************/
33239281Sgonzo/*$FreeBSD: head/sys/dev/e1000/e1000_i210.h 287492 2015-09-05 21:12:19Z sbruno $*/
34239281Sgonzo
35239281Sgonzo#ifndef _E1000_I210_H_
36239281Sgonzo#define _E1000_I210_H_
37239281Sgonzo
38239281Sgonzobool e1000_get_flash_presence_i210(struct e1000_hw *hw);
39239281Sgonzos32 e1000_update_flash_i210(struct e1000_hw *hw);
40239281Sgonzos32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
41s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
42s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
43			      u16 words, u16 *data);
44s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
45			     u16 words, u16 *data);
46s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
47void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
48s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
49			 u16 *data);
50s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
51			  u16 data);
52s32 e1000_init_hw_i210(struct e1000_hw *hw);
53
54#define E1000_STM_OPCODE		0xDB00
55#define E1000_EEPROM_FLASH_SIZE_WORD	0x11
56
57#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
58	(u8)((invm_dword) & 0x7)
59#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
60	(u8)(((invm_dword) & 0x0000FE00) >> 9)
61#define INVM_DWORD_TO_WORD_DATA(invm_dword) \
62	(u16)(((invm_dword) & 0xFFFF0000) >> 16)
63
64enum E1000_INVM_STRUCTURE_TYPE {
65	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,
66	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,
67	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,
68	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,
69	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,
70	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,
71};
72
73#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8
74#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1
75#define E1000_INVM_ULT_BYTES_SIZE	8
76#define E1000_INVM_RECORD_SIZE_IN_BYTES	4
77#define E1000_INVM_VER_FIELD_ONE	0x1FF8
78#define E1000_INVM_VER_FIELD_TWO	0x7FE000
79#define E1000_INVM_IMGTYPE_FIELD	0x1F800000
80
81#define E1000_INVM_MAJOR_MASK	0x3F0
82#define E1000_INVM_MINOR_MASK	0xF
83#define E1000_INVM_MAJOR_SHIFT	4
84
85#define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  << 8) | \
86					 (ID_LED_DEF1_DEF2 <<  4) | \
87					 (ID_LED_OFF1_OFF2))
88#define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 << 8) | \
89					 (ID_LED_DEF1_DEF2 <<  4) | \
90					 (ID_LED_OFF1_ON2))
91
92/* NVM offset defaults for I211 devices */
93#define NVM_INIT_CTRL_2_DEFAULT_I211	0X7243
94#define NVM_INIT_CTRL_4_DEFAULT_I211	0x00C1
95#define NVM_LED_1_CFG_DEFAULT_I211	0x0184
96#define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C
97
98/* PLL Defines */
99#define E1000_PCI_PMCSR			0x44
100#define E1000_PCI_PMCSR_D3		0x03
101#define E1000_MAX_PLL_TRIES		5
102#define E1000_PHY_PLL_UNCONF		0xFF
103#define E1000_PHY_PLL_FREQ_PAGE		0xFC0000
104#define E1000_PHY_PLL_FREQ_REG		0x000E
105#define E1000_INVM_DEFAULT_AL		0x202F
106#define E1000_INVM_AUTOLOAD		0x0A
107#define E1000_INVM_PLL_WO_VAL		0x0010
108
109#endif
110