dc21040reg.h revision 36945
136945Speter/* $NetBSD: dc21040reg.h,v 1.15 1998/05/22 18:50:59 matt Exp $ */ 236945Speter/* $Id: dc21040reg.h,v 1.3 1998/03/08 16:53:50 peter Exp $ */ 330549Speter 426790Speter/*- 526790Speter * Copyright (c) 1994, 1995, 1996 Matt Thomas <matt@3am-software.com> 626790Speter * All rights reserved. 726790Speter * 826790Speter * Redistribution and use in source and binary forms, with or without 926790Speter * modification, are permitted provided that the following conditions 1026790Speter * are met: 1126790Speter * 1. Redistributions of source code must retain the above copyright 1226790Speter * notice, this list of conditions and the following disclaimer. 1326790Speter * 2. The name of the author may not be used to endorse or promote products 1426790Speter * derived from this software withough specific prior written permission 1526790Speter * 1626790Speter * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1726790Speter * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1826790Speter * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1926790Speter * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2026790Speter * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2126790Speter * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2226790Speter * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2326790Speter * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2426790Speter * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2526790Speter * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2626790Speter * 2730549Speter * Id: dc21040reg.h,v 1.24 1997/05/16 19:47:09 thomas Exp 2826790Speter */ 2926790Speter 3026790Speter#if !defined(_DC21040_H) 3126790Speter#define _DC21040_H 3226790Speter 3326790Speter#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN 3426790Speter#define TULIP_BITFIELD2(a, b) b, a 3526790Speter#define TULIP_BITFIELD3(a, b, c) c, b, a 3626790Speter#define TULIP_BITFIELD4(a, b, c, d) d, c, b, a 3726790Speter#else 3826790Speter#define TULIP_BITFIELD2(a, b) a, b 3926790Speter#define TULIP_BITFIELD3(a, b, c) a, b, c 4026790Speter#define TULIP_BITFIELD4(a, b, c, d) a, b, c, d 4126790Speter#endif 4226790Speter 4326790Spetertypedef struct { 4426790Speter u_int32_t d_status; 4526790Speter u_int32_t TULIP_BITFIELD3(d_length1 : 11, 4626790Speter d_length2 : 11, 4726790Speter d_flag : 10); 4826790Speter u_int32_t d_addr1; 4926790Speter u_int32_t d_addr2; 5026790Speter} tulip_desc_t; 5126790Speter 5226790Speter#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = 21040) */ 5326790Speter#define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */ 5426790Speter/* 5526790Speter * Transmit Status 5626790Speter */ 5726790Speter#define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */ 5826790Speter#define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */ 5926790Speter#define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */ 6026790Speter#define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */ 6126790Speter#define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */ 6226790Speter#define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */ 6326790Speter#define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */ 6426790Speter#define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */ 6526790Speter#define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */ 6626790Speter#define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */ 6726790Speter#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */ 6826790Speter/* 6926790Speter * Receive Status 7026790Speter */ 7126790Speter#define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */ 7226790Speter#define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */ 7326790Speter#define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */ 7426790Speter#define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */ 7526790Speter#define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */ 7626790Speter#define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */ 7726790Speter#define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */ 7826790Speter#define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */ 7926790Speter#define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */ 8026790Speter#define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */ 8126790Speter#define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */ 8226790Speter#define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */ 8326790Speter#define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */ 8426790Speter 8526790Speter 8626790Speter#define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */ 8726790Speter#define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */ 8826790Speter 8926790Speter#define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */ 9026790Speter#define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */ 9126790Speter#define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */ 9226790Speter#define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */ 9326790Speter#define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */ 9426790Speter#define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */ 9526790Speter#define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */ 9626790Speter#define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */ 9726790Speter 9826790Speter/* 9926790Speter * The 21040 Registers (IO Space Addresses) 10026790Speter */ 10126790Speter#define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */ 10226790Speter#define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */ 10326790Speter#define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */ 10426790Speter#define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */ 10526790Speter#define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */ 10626790Speter#define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */ 10726790Speter#define TULIP_REG_CMD 0x30 /* CSR6 -- Command */ 10826790Speter#define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */ 10926790Speter#define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */ 11026790Speter#define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */ 11126790Speter#define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */ 11226790Speter#define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */ 11326790Speter#define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */ 11426790Speter#define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */ 11526790Speter#define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */ 11626790Speter#define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */ 11726790Speter 11826790Speter/* 11926790Speter * CSR5 -- Status Register 12026790Speter * CSR7 -- Interrupt Control 12126790Speter */ 12226790Speter#define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */ 12326790Speter#define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */ 12426790Speter#define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */ 12526790Speter#define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */ 12626790Speter#define TULIP_STS_ERR_SHIFT 23 12726790Speter#define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */ 12826790Speter#define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */ 12926790Speter#define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */ 13026790Speter#define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */ 13126790Speter#define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */ 13226790Speter#define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */ 13326790Speter#define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */ 13426790Speter#define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an 13526790Speter unavailable transmit descriptor */ 13626790Speter#define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */ 13726790Speter#define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/ 13826790Speter#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */ 13926790Speter#define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */ 14026790Speter#define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive 14126790Speter packet before prefetch of next descriptor */ 14226790Speter#define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */ 14326790Speter#define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of 14426790Speter unavailable receive buffers */ 14526790Speter#define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */ 14626790Speter#define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame 14726790Speter from the receive FIFO as a result of 14826790Speter an unavailable receive buffer */ 14926790Speter#define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame 15026790Speter from the receive FIFO into the receive 15126790Speter buffer. */ 15226790Speter#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */ 15326790Speter#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */ 15426790Speter#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */ 15526790Speter#define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure (21040) */ 15626790Speter#define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd (21040) */ 15726790Speter#define TULIP_STS_GPTIMEOUT 0x00000800L /* (RW) General Purpose Timeout (21140) */ 15826790Speter#define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch (21040) */ 15926790Speter#define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */ 16026790Speter#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */ 16126790Speter#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */ 16226790Speter#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */ 16326790Speter#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */ 16426790Speter#define TULIP_STS_LINKPASS 0x00000010L /* (RW) LinkPass (21041) */ 16526790Speter#define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */ 16626790Speter#define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */ 16726790Speter#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */ 16826790Speter#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */ 16926790Speter 17026790Speter/* 17126790Speter * CSR6 -- Command (Operation Mode) Register 17226790Speter */ 17326790Speter#define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (21140) */ 17426790Speter#define TULIP_CMD_SCRAMBLER 0x01000000L /* (RW) Scrambler Mode (21140) */ 17526790Speter#define TULIP_CMD_PCSFUNCTION 0x00800000L /* (RW) PCS Function (21140) */ 17626790Speter#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */ 17726790Speter#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (21140) */ 17826790Speter#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */ 17926790Speter#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */ 18026790Speter#define TULIP_CMD_ENHCAPTEFFCT 0x00040000L /* (RW) Enhanced Capture Effecty (21041) */ 18126790Speter#define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */ 18226790Speter#define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) (21040) */ 18326790Speter#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */ 18426790Speter#define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */ 18526790Speter#define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */ 18626790Speter#define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */ 18726790Speter#define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */ 18826790Speter#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */ 18926790Speter#define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */ 19026790Speter#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */ 19126790Speter#define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */ 19226790Speter#define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */ 19326790Speter#define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */ 19426790Speter#define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */ 19526790Speter#define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */ 19626790Speter#define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */ 19726790Speter#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */ 19826790Speter#define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */ 19926790Speter#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */ 20026790Speter#define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */ 20126790Speter 20226790Speter#define TULIP_SIASTS_OTHERRXACTIVITY 0x00000200L 20326790Speter#define TULIP_SIASTS_RXACTIVITY 0x00000100L 20426790Speter#define TULIP_SIASTS_LINKFAIL 0x00000004L 20530549Speter#define TULIP_SIASTS_LINK100FAIL 0x00000002L 20626790Speter#define TULIP_SIACONN_RESET 0x00000000L 20726790Speter 20826790Speter/* 20926790Speter * 21040 SIA definitions 21026790Speter */ 21126790Speter#define TULIP_21040_PROBE_10BASET_TIMEOUT 2500 21226790Speter#define TULIP_21040_PROBE_AUIBNC_TIMEOUT 300 21326790Speter#define TULIP_21040_PROBE_EXTSIA_TIMEOUT 300 21426790Speter 21536945Speter#define TULIP_21040_SIACONN_10BASET 0x0000EF01L 21626790Speter#define TULIP_21040_SIATXRX_10BASET 0x0000FFFFL 21726790Speter#define TULIP_21040_SIAGEN_10BASET 0x00000000L 21826790Speter 21936945Speter#define TULIP_21040_SIACONN_10BASET_FD 0x0000EF01L 22026790Speter#define TULIP_21040_SIATXRX_10BASET_FD 0x0000FFFDL 22126790Speter#define TULIP_21040_SIAGEN_10BASET_FD 0x00000000L 22226790Speter 22336945Speter#define TULIP_21040_SIACONN_AUIBNC 0x0000EF09L 22426790Speter#define TULIP_21040_SIATXRX_AUIBNC 0x00000705L 22526790Speter#define TULIP_21040_SIAGEN_AUIBNC 0x00000006L 22626790Speter 22726790Speter#define TULIP_21040_SIACONN_EXTSIA 0x00003041L 22826790Speter#define TULIP_21040_SIATXRX_EXTSIA 0x00000000L 22926790Speter#define TULIP_21040_SIAGEN_EXTSIA 0x00000006L 23026790Speter 23126790Speter/* 23226790Speter * 21041 SIA definitions 23326790Speter */ 23426790Speter 23526790Speter#define TULIP_21041_PROBE_10BASET_TIMEOUT 2500 23626790Speter#define TULIP_21041_PROBE_AUIBNC_TIMEOUT 300 23726790Speter 23826790Speter#define TULIP_21041_SIACONN_10BASET 0x0000EF01L 23926790Speter#define TULIP_21041_SIATXRX_10BASET 0x0000FF3FL 24026790Speter#define TULIP_21041_SIAGEN_10BASET 0x00000000L 24126790Speter 24226790Speter#define TULIP_21041P2_SIACONN_10BASET 0x0000EF01L 24326790Speter#define TULIP_21041P2_SIATXRX_10BASET 0x0000FFFFL 24426790Speter#define TULIP_21041P2_SIAGEN_10BASET 0x00000000L 24526790Speter 24626790Speter#define TULIP_21041_SIACONN_10BASET_FD 0x0000EF01L 24726790Speter#define TULIP_21041_SIATXRX_10BASET_FD 0x0000FF3DL 24826790Speter#define TULIP_21041_SIAGEN_10BASET_FD 0x00000000L 24926790Speter 25026790Speter#define TULIP_21041P2_SIACONN_10BASET_FD 0x0000EF01L 25126790Speter#define TULIP_21041P2_SIATXRX_10BASET_FD 0x0000FFFFL 25226790Speter#define TULIP_21041P2_SIAGEN_10BASET_FD 0x00000000L 25326790Speter 25426790Speter#define TULIP_21041_SIACONN_AUI 0x0000EF09L 25526790Speter#define TULIP_21041_SIATXRX_AUI 0x0000F73DL 25626790Speter#define TULIP_21041_SIAGEN_AUI 0x0000000EL 25726790Speter 25826790Speter#define TULIP_21041P2_SIACONN_AUI 0x0000EF09L 25926790Speter#define TULIP_21041P2_SIATXRX_AUI 0x0000F7FDL 26026790Speter#define TULIP_21041P2_SIAGEN_AUI 0x0000000EL 26126790Speter 26226790Speter#define TULIP_21041_SIACONN_BNC 0x0000EF09L 26326790Speter#define TULIP_21041_SIATXRX_BNC 0x0000F73DL 26426790Speter#define TULIP_21041_SIAGEN_BNC 0x00000006L 26526790Speter 26626790Speter#define TULIP_21041P2_SIACONN_BNC 0x0000EF09L 26726790Speter#define TULIP_21041P2_SIATXRX_BNC 0x0000F7FDL 26826790Speter#define TULIP_21041P2_SIAGEN_BNC 0x00000006L 26926790Speter 27026790Speter/* 27126790Speter * 21142 SIA definitions 27226790Speter */ 27326790Speter 27426790Speter#define TULIP_21142_PROBE_10BASET_TIMEOUT 2500 27526790Speter#define TULIP_21142_PROBE_AUIBNC_TIMEOUT 300 27626790Speter 27726790Speter#define TULIP_21142_SIACONN_10BASET 0x00000001L 27830549Speter#define TULIP_21142_SIATXRX_10BASET 0x00007F3FL 27930549Speter#define TULIP_21142_SIAGEN_10BASET 0x00000008L 28026790Speter 28126790Speter#define TULIP_21142_SIACONN_10BASET_FD 0x00000001L 28230549Speter#define TULIP_21142_SIATXRX_10BASET_FD 0x00007F3DL 28330549Speter#define TULIP_21142_SIAGEN_10BASET_FD 0x00000008L 28426790Speter 28526790Speter#define TULIP_21142_SIACONN_AUI 0x00000009L 28630549Speter#define TULIP_21142_SIATXRX_AUI 0x00000705L 28726790Speter#define TULIP_21142_SIAGEN_AUI 0x0000000EL 28826790Speter 28926790Speter#define TULIP_21142_SIACONN_BNC 0x00000009L 29030549Speter#define TULIP_21142_SIATXRX_BNC 0x00000705L 29126790Speter#define TULIP_21142_SIAGEN_BNC 0x00000006L 29226790Speter 29326790Speter 29426790Speter 29526790Speter 29626790Speter#define TULIP_WATCHDOG_TXDISABLE 0x00000001L 29726790Speter#define TULIP_WATCHDOG_RXDISABLE 0x00000010L 29826790Speter 29926790Speter#define TULIP_BUSMODE_SWRESET 0x00000001L 30026790Speter#define TULIP_BUSMODE_DESCSKIPLEN_MASK 0x0000007CL 30126790Speter#define TULIP_BUSMODE_BIGENDIAN 0x00000080L 30226790Speter#define TULIP_BUSMODE_BURSTLEN_MASK 0x00003F00L 30326790Speter#define TULIP_BUSMODE_BURSTLEN_DEFAULT 0x00000000L 30426790Speter#define TULIP_BUSMODE_BURSTLEN_1LW 0x00000100L 30526790Speter#define TULIP_BUSMODE_BURSTLEN_2LW 0x00000200L 30626790Speter#define TULIP_BUSMODE_BURSTLEN_4LW 0x00000400L 30726790Speter#define TULIP_BUSMODE_BURSTLEN_8LW 0x00000800L 30826790Speter#define TULIP_BUSMODE_BURSTLEN_16LW 0x00001000L 30926790Speter#define TULIP_BUSMODE_BURSTLEN_32LW 0x00002000L 31026790Speter#define TULIP_BUSMODE_CACHE_NOALIGN 0x00000000L 31126790Speter#define TULIP_BUSMODE_CACHE_ALIGN8 0x00004000L 31226790Speter#define TULIP_BUSMODE_CACHE_ALIGN16 0x00008000L 31326790Speter#define TULIP_BUSMODE_CACHE_ALIGN32 0x0000C000L 31426790Speter#define TULIP_BUSMODE_TXPOLL_NEVER 0x00000000L 31526790Speter#define TULIP_BUSMODE_TXPOLL_200000ns 0x00020000L 31626790Speter#define TULIP_BUSMODE_TXPOLL_800000ns 0x00040000L 31726790Speter#define TULIP_BUSMODE_TXPOLL_1600000ns 0x00060000L 31826790Speter#define TULIP_BUSMODE_TXPOLL_12800ns 0x00080000L /* 21041 only */ 31926790Speter#define TULIP_BUSMODE_TXPOLL_25600ns 0x000A0000L /* 21041 only */ 32026790Speter#define TULIP_BUSMODE_TXPOLL_51200ns 0x000C0000L /* 21041 only */ 32126790Speter#define TULIP_BUSMODE_TXPOLL_102400ns 0x000E0000L /* 21041 only */ 32226790Speter#define TULIP_BUSMODE_DESC_BIGENDIAN 0x00100000L /* 21041 only */ 32326790Speter#define TULIP_BUSMODE_READMULTIPLE 0x00200000L /* */ 32426790Speter 32526790Speter#define TULIP_REG_CFDA 0x40 32626790Speter#define TULIP_CFDA_SLEEP 0x80000000L 32726790Speter#define TULIP_CFDA_SNOOZE 0x40000000L 32826790Speter 32926790Speter#define TULIP_GP_PINSET 0x00000100L 33026790Speter/* 33126790Speter * These are the defintitions used for the DEC 21140 33226790Speter * evaluation board. 33326790Speter */ 33426790Speter#define TULIP_GP_EB_PINS 0x0000001F /* General Purpose Pin directions */ 33526790Speter#define TULIP_GP_EB_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ 33626790Speter#define TULIP_GP_EB_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ 33726790Speter#define TULIP_GP_EB_INIT 0x0000000B /* No loopback --- point-to-point */ 33826790Speter 33926790Speter/* 34026790Speter * These are the defintitions used for the SMC9332 (21140) board. 34126790Speter */ 34226790Speter#define TULIP_GP_SMC_9332_PINS 0x0000003F /* General Purpose Pin directions */ 34326790Speter#define TULIP_GP_SMC_9332_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ 34426790Speter#define TULIP_GP_SMC_9332_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ 34526790Speter#define TULIP_GP_SMC_9332_INIT 0x00000009 /* No loopback --- point-to-point */ 34626790Speter 34726790Speter#define TULIP_OUI_SMC_0 0x00 34826790Speter#define TULIP_OUI_SMC_1 0x00 34926790Speter#define TULIP_OUI_SMC_2 0xC0 35026790Speter 35126790Speter/* 35226790Speter * There are the definitions used for the DEC DE500 35326790Speter * 10/100 family of boards 35426790Speter */ 35526790Speter#define TULIP_GP_DE500_PINS 0x0000001FL 35626790Speter#define TULIP_GP_DE500_LINK_PASS 0x00000080L 35726790Speter#define TULIP_GP_DE500_SYM_LINK 0x00000040L 35826790Speter#define TULIP_GP_DE500_SIGNAL_DETECT 0x00000020L 35926790Speter#define TULIP_GP_DE500_PHY_RESET 0x00000010L 36026790Speter#define TULIP_GP_DE500_HALFDUPLEX 0x00000008L 36126790Speter#define TULIP_GP_DE500_PHY_LOOPBACK 0x00000004L 36226790Speter#define TULIP_GP_DE500_FORCE_LED 0x00000002L 36326790Speter#define TULIP_GP_DE500_FORCE_100 0x00000001L 36426790Speter 36526790Speter/* 36626790Speter * These are the defintitions used for the Cogent EM100 36726790Speter * 21140 board. 36826790Speter */ 36926790Speter#define TULIP_GP_EM100_PINS 0x0000003F /* General Purpose Pin directions */ 37026790Speter#define TULIP_GP_EM100_INIT 0x00000009 /* No loopback --- point-to-point */ 37126790Speter#define TULIP_OUI_COGENT_0 0x00 37226790Speter#define TULIP_OUI_COGENT_1 0x00 37326790Speter#define TULIP_OUI_COGENT_2 0x92 37427859Speter#define TULIP_COGENT_EM100TX_ID 0x12 37527859Speter#define TULIP_COGENT_EM100FX_ID 0x15 37626790Speter 37726790Speter 37826790Speter/* 37926790Speter * These are the defintitions used for the Znyx ZX342 38026790Speter * 10/100 board 38126790Speter */ 38226790Speter#define TULIP_OUI_ZNYX_0 0x00 38326790Speter#define TULIP_OUI_ZNYX_1 0xC0 38426790Speter#define TULIP_OUI_ZNYX_2 0x95 38526790Speter 38626790Speter#define TULIP_ZNYX_ID_ZX312 0x0602 38726790Speter#define TULIP_ZNYX_ID_ZX312T 0x0622 38826790Speter#define TULIP_ZNYX_ID_ZX314_INTA 0x0701 38926790Speter#define TULIP_ZNYX_ID_ZX314 0x0711 39026790Speter#define TULIP_ZNYX_ID_ZX315_INTA 0x0801 39126790Speter#define TULIP_ZNYX_ID_ZX315 0x0811 39226790Speter#define TULIP_ZNYX_ID_ZX342 0x0901 39326790Speter#define TULIP_ZNYX_ID_ZX342B 0x0921 39426790Speter#define TULIP_ZNYX_ID_ZX342_X3 0x0902 39526790Speter#define TULIP_ZNYX_ID_ZX342_X4 0x0903 39626790Speter#define TULIP_ZNYX_ID_ZX344 0x0A01 39726790Speter#define TULIP_ZNYX_ID_ZX351 0x0B01 39826790Speter#define TULIP_ZNYX_ID_ZX345 0x0C01 39926790Speter#define TULIP_ZNYX_ID_ZX311 0x0D01 40026790Speter#define TULIP_ZNYX_ID_ZX346 0x0E01 40126790Speter 40226790Speter#define TULIP_GP_ZX34X_PINS 0x0000001F /* General Purpose Pin directions */ 40326790Speter#define TULIP_GP_ZX344_PINS 0x0000000B /* General Purpose Pin directions */ 40426790Speter#define TULIP_GP_ZX345_PINS 0x00000003 /* General Purpose Pin directions */ 40526790Speter#define TULIP_GP_ZX346_PINS 0x00000043 /* General Purpose Pin directions */ 40626790Speter#define TULIP_GP_ZX34X_LNKFAIL 0x00000080 /* 10Mb/s Link Failure */ 40726790Speter#define TULIP_GP_ZX34X_SYMDET 0x00000040 /* 100Mb/s Symbol Detect */ 40826790Speter#define TULIP_GP_ZX345_PHYACT 0x00000040 /* PHY Activity */ 40926790Speter#define TULIP_GP_ZX34X_SIGDET 0x00000020 /* 100Mb/s Signal Detect */ 41026790Speter#define TULIP_GP_ZX346_AUTONEG_ENABLED 0x00000020 /* 802.3u autoneg enabled */ 41126790Speter#define TULIP_GP_ZX342_COLENA 0x00000008 /* 10t Ext LB */ 41226790Speter#define TULIP_GP_ZX344_ROTINT 0x00000008 /* PPB IRQ rotation */ 41326790Speter#define TULIP_GP_ZX345_SPEED10 0x00000008 /* 10Mb speed detect */ 41426790Speter#define TULIP_GP_ZX346_SPEED100 0x00000008 /* 100Mb speed detect */ 41526790Speter#define TULIP_GP_ZX34X_NCOLENA 0x00000004 /* 10t Int LB */ 41626790Speter#define TULIP_GP_ZX34X_RXMATCH 0x00000004 /* RX Match */ 41726790Speter#define TULIP_GP_ZX346_FULLDUPLEX 0x00000004 /* Full Duplex Sensed */ 41826790Speter#define TULIP_GP_ZX34X_LB102 0x00000002 /* 100tx twister LB */ 41926790Speter#define TULIP_GP_ZX34X_NLB101 0x00000001 /* PDT/PDR LB */ 42026790Speter#define TULIP_GP_ZX34X_INIT 0x00000009 42126790Speter 42226790Speter/* 42326790Speter * Compex's OUI. We need to twiddle a bit on their 21041 card. 42426790Speter */ 42526790Speter#define TULIP_OUI_COMPEX_0 0x00 42626790Speter#define TULIP_OUI_COMPEX_1 0x80 42726790Speter#define TULIP_OUI_COMPEX_2 0x48 42826790Speter#define TULIP_21041_COMPEX_XREGDATA 1 42926790Speter 43026790Speter/* 43126790Speter * Asante's OUI and stuff... 43226790Speter */ 43326790Speter#define TULIP_OUI_ASANTE_0 0x00 43426790Speter#define TULIP_OUI_ASANTE_1 0x00 43526790Speter#define TULIP_OUI_ASANTE_2 0x94 43626790Speter#define TULIP_GP_ASANTE_PINS 0x000000bf /* GP pin config */ 43726790Speter#define TULIP_GP_ASANTE_PHYRESET 0x00000008 /* Reset PHY */ 43826790Speter 43926790Speter/* 44030549Speter * ACCTON EN1207 specialties 44130549Speter */ 44230549Speter 44330549Speter#define TULIP_OUI_EN1207_0 0x00 44430549Speter#define TULIP_OUI_EN1207_1 0x00 44530549Speter#define TULIP_OUI_EN1207_2 0xE8 44630549Speter 44730549Speter#define TULIP_CSR8_EN1207 0x08 44830549Speter#define TULIP_CSR9_EN1207 0x00 44930549Speter#define TULIP_CSR10_EN1207 0x03 45030549Speter#define TULIP_CSR11_EN1207 0x1F 45130549Speter 45230549Speter#define TULIP_GP_EN1207_BNC_INIT 0x0000011B 45330549Speter#define TULIP_GP_EN1207_UTP_INIT 0x9E00000B 45430549Speter#define TULIP_GP_EN1207_100_INIT 0x6D00031B 45530549Speter 45630549Speter/* 45726790Speter * SROM definitions for the 21140 and 21041. 45826790Speter */ 45926790Speter#define SROMXREG 0x0400 46026790Speter#define SROMSEL 0x0800 46126790Speter#define SROMRD 0x4000 46226790Speter#define SROMWR 0x2000 46326790Speter#define SROMDIN 0x0008 46426790Speter#define SROMDOUT 0x0004 46526790Speter#define SROMDOUTON 0x0004 46626790Speter#define SROMDOUTOFF 0x0004 46726790Speter#define SROMCLKON 0x0002 46826790Speter#define SROMCLKOFF 0x0002 46926790Speter#define SROMCSON 0x0001 47026790Speter#define SROMCSOFF 0x0001 47126790Speter#define SROMCS 0x0001 47226790Speter 47326790Speter#define SROMCMD_MODE 4 47426790Speter#define SROMCMD_WR 5 47526790Speter#define SROMCMD_RD 6 47626790Speter 47726790Speter#define SROM_BITWIDTH 6 47826790Speter 47926790Speter/* 48026790Speter * MII Definitions for the 21041 and 21140/21140A/21142 48126790Speter */ 48226790Speter#define MII_PREAMBLE (~0) 48326790Speter#define MII_TEST 0xAAAAAAAA 48426790Speter#define MII_RDCMD 0xF6 /* 1111.0110 */ 48526790Speter#define MII_WRCMD 0xF5 /* 1111.0101 */ 48626790Speter#define MII_DIN 0x00080000 48726790Speter#define MII_RD 0x00040000 48826790Speter#define MII_WR 0x00000000 48926790Speter#define MII_DOUT 0x00020000 49026790Speter#define MII_CLK 0x00010000 49126790Speter#define MII_CLKON MII_CLK 49226790Speter#define MII_CLKOFF MII_CLK 49326790Speter 49426790Speter#define PHYREG_CONTROL 0 49526790Speter#define PHYREG_STATUS 1 49626790Speter#define PHYREG_IDLOW 2 49726790Speter#define PHYREG_IDHIGH 3 49826790Speter#define PHYREG_AUTONEG_ADVERTISEMENT 4 49926790Speter#define PHYREG_AUTONEG_ABILITIES 5 50026790Speter#define PHYREG_AUTONEG_EXPANSION 6 50126790Speter#define PHYREG_AUTONEG_NEXTPAGE 7 50226790Speter 50326790Speter#define PHYSTS_100BASET4 0x8000 50426790Speter#define PHYSTS_100BASETX_FD 0x4000 50526790Speter#define PHYSTS_100BASETX 0x2000 50626790Speter#define PHYSTS_10BASET_FD 0x1000 50726790Speter#define PHYSTS_10BASET 0x0800 50826790Speter#define PHYSTS_AUTONEG_DONE 0x0020 50926790Speter#define PHYSTS_REMOTE_FAULT 0x0010 51026790Speter#define PHYSTS_CAN_AUTONEG 0x0008 51126790Speter#define PHYSTS_LINK_UP 0x0004 51226790Speter#define PHYSTS_JABBER_DETECT 0x0002 51326790Speter#define PHYSTS_EXTENDED_REGS 0x0001 51426790Speter 51526790Speter#define PHYCTL_RESET 0x8000 51626790Speter#define PHYCTL_SELECT_100MB 0x2000 51726790Speter#define PHYCTL_AUTONEG_ENABLE 0x1000 51826790Speter#define PHYCTL_ISOLATE 0x0400 51926790Speter#define PHYCTL_AUTONEG_RESTART 0x0200 52026790Speter#define PHYCTL_FULL_DUPLEX 0x0100 52126790Speter 52226790Speter/* 52326790Speter * Definitions for the DE425. 52426790Speter */ 52526790Speter#define DE425_CFID 0x08 /* Configuration Id */ 52626790Speter#define DE425_CFCS 0x0C /* Configuration Command-Status */ 52726790Speter#define DE425_CFRV 0x18 /* Configuration Revision */ 52826790Speter#define DE425_CFLT 0x1C /* Configuration Latency Timer */ 52926790Speter#define DE425_CBIO 0x28 /* Configuration Base IO Address */ 53026790Speter#define DE425_CFDA 0x2C /* Configuration Driver Area */ 53126790Speter#define DE425_ENETROM_OFFSET 0xC90 /* Offset in I/O space for ENETROM */ 53226790Speter#define DE425_CFG0 0xC88 /* IRQ register */ 53326790Speter#define DE425_EISAID 0x10a34250 /* EISA device id */ 53426790Speter#define DE425_EISA_IOSIZE 0x100 53526790Speter 53626790Speter#define DEC_VENDORID 0x1011 53726790Speter#define CHIPID_21040 0x0002 53826790Speter#define CHIPID_21140 0x0009 53926790Speter#define CHIPID_21041 0x0014 54026790Speter#define CHIPID_21142 0x0019 54126790Speter#define PCI_VENDORID(x) ((x) & 0xFFFF) 54226790Speter#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF) 54326790Speter 54426790Speter/* 54526790Speter * Generic SROM Format 54626790Speter * 54726790Speter * 54826790Speter */ 54926790Speter 55026790Spetertypedef struct { 55126790Speter u_int8_t sh_idbuf[18]; 55226790Speter u_int8_t sh_version; 55326790Speter u_int8_t sh_adapter_count; 55426790Speter u_int8_t sh_ieee802_address[6]; 55526790Speter} tulip_srom_header_t; 55626790Speter 55726790Spetertypedef struct { 55826790Speter u_int8_t sai_device; 55926790Speter u_int8_t sai_leaf_offset_lowbyte; 56026790Speter u_int8_t sai_leaf_offset_highbyte; 56126790Speter} tulip_srom_adapter_info_t; 56226790Speter 56326790Spetertypedef enum { 56426790Speter TULIP_SROM_CONNTYPE_10BASET =0x0000, 56526790Speter TULIP_SROM_CONNTYPE_BNC =0x0001, 56626790Speter TULIP_SROM_CONNTYPE_AUI =0x0002, 56726790Speter TULIP_SROM_CONNTYPE_100BASETX =0x0003, 56826790Speter TULIP_SROM_CONNTYPE_100BASET4 =0x0006, 56926790Speter TULIP_SROM_CONNTYPE_100BASEFX =0x0007, 57026790Speter TULIP_SROM_CONNTYPE_MII_10BASET =0x0009, 57126790Speter TULIP_SROM_CONNTYPE_MII_100BASETX =0x000D, 57226790Speter TULIP_SROM_CONNTYPE_MII_100BASET4 =0x000F, 57326790Speter TULIP_SROM_CONNTYPE_MII_100BASEFX =0x0010, 57426790Speter TULIP_SROM_CONNTYPE_10BASET_NWAY =0x0100, 57526790Speter TULIP_SROM_CONNTYPE_10BASET_FD =0x0204, 57626790Speter TULIP_SROM_CONNTYPE_MII_10BASET_FD =0x020A, 57726790Speter TULIP_SROM_CONNTYPE_100BASETX_FD =0x020E, 57826790Speter TULIP_SROM_CONNTYPE_MII_100BASETX_FD =0x0211, 57926790Speter TULIP_SROM_CONNTYPE_10BASET_NOLINKPASS =0x0400, 58026790Speter TULIP_SROM_CONNTYPE_AUTOSENSE =0x0800, 58126790Speter TULIP_SROM_CONNTYPE_AUTOSENSE_POWERUP =0x8800, 58226790Speter TULIP_SROM_CONNTYPE_AUTOSENSE_NWAY =0x9000, 58326790Speter TULIP_SROM_CONNTYPE_NOT_USED =0xFFFF 58426790Speter} tulip_srom_connection_t; 58526790Speter 58626790Spetertypedef enum { 58726790Speter TULIP_SROM_MEDIA_10BASET =0x0000, 58826790Speter TULIP_SROM_MEDIA_BNC =0x0001, 58926790Speter TULIP_SROM_MEDIA_AUI =0x0002, 59026790Speter TULIP_SROM_MEDIA_100BASETX =0x0003, 59126790Speter TULIP_SROM_MEDIA_10BASET_FD =0x0004, 59226790Speter TULIP_SROM_MEDIA_100BASETX_FD =0x0005, 59326790Speter TULIP_SROM_MEDIA_100BASET4 =0x0006, 59426790Speter TULIP_SROM_MEDIA_100BASEFX =0x0007, 59526790Speter TULIP_SROM_MEDIA_100BASEFX_FD =0x0008 59626790Speter} tulip_srom_media_t; 59726790Speter 59826790Speter#define TULIP_SROM_21041_EXTENDED 0x40 59926790Speter 60026790Speter#define TULIP_SROM_2114X_NOINDICATOR 0x8000 60126790Speter#define TULIP_SROM_2114X_DEFAULT 0x4000 60226790Speter#define TULIP_SROM_2114X_POLARITY 0x0080 60326790Speter#define TULIP_SROM_2114X_CMDBITS(n) (((n) & 0x0071) << 18) 60426790Speter#define TULIP_SROM_2114X_BITPOS(b) (1 << (((b) & 0x0E) >> 1)) 60526790Speter 60626790Speter 60726790Speter 60826790Speter#endif /* !defined(_DC21040_H) */ 609