dc21040reg.h revision 298955
136945Speter/* $NetBSD: dc21040reg.h,v 1.15 1998/05/22 18:50:59 matt Exp $ */ 230549Speter 349562Speter/* $FreeBSD: head/sys/dev/de/dc21040reg.h 298955 2016-05-03 03:41:25Z pfg $ */ 449562Speter 526790Speter/*- 626790Speter * Copyright (c) 1994, 1995, 1996 Matt Thomas <matt@3am-software.com> 726790Speter * All rights reserved. 826790Speter * 926790Speter * Redistribution and use in source and binary forms, with or without 1026790Speter * modification, are permitted provided that the following conditions 1126790Speter * are met: 1226790Speter * 1. Redistributions of source code must retain the above copyright 1326790Speter * notice, this list of conditions and the following disclaimer. 1426790Speter * 2. The name of the author may not be used to endorse or promote products 1597748Sschweikh * derived from this software without specific prior written permission 1626790Speter * 1726790Speter * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1826790Speter * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1926790Speter * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2026790Speter * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2126790Speter * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2226790Speter * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2326790Speter * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2426790Speter * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2526790Speter * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2626790Speter * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2726790Speter * 2830549Speter * Id: dc21040reg.h,v 1.24 1997/05/16 19:47:09 thomas Exp 2926790Speter */ 3026790Speter 3126790Speter#if !defined(_DC21040_H) 3226790Speter#define _DC21040_H 3326790Speter 3426790Speter#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN 3526790Speter#define TULIP_BITFIELD2(a, b) b, a 3626790Speter#define TULIP_BITFIELD3(a, b, c) c, b, a 3726790Speter#define TULIP_BITFIELD4(a, b, c, d) d, c, b, a 3826790Speter#else 3926790Speter#define TULIP_BITFIELD2(a, b) a, b 4026790Speter#define TULIP_BITFIELD3(a, b, c) a, b, c 4126790Speter#define TULIP_BITFIELD4(a, b, c, d) a, b, c, d 4226790Speter#endif 4326790Speter 4426790Spetertypedef struct { 4526790Speter u_int32_t d_status; 4626790Speter u_int32_t TULIP_BITFIELD3(d_length1 : 11, 4726790Speter d_length2 : 11, 4826790Speter d_flag : 10); 4926790Speter u_int32_t d_addr1; 5026790Speter u_int32_t d_addr2; 5126790Speter} tulip_desc_t; 5226790Speter 5326790Speter#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = 21040) */ 5426790Speter#define TULIP_DSTS_ERRSUM 0x00008000 /* Error Summary */ 5526790Speter/* 5626790Speter * Transmit Status 5726790Speter */ 5826790Speter#define TULIP_DSTS_TxBABBLE 0x00004000 /* Transmitter Babbled */ 5926790Speter#define TULIP_DSTS_TxCARRLOSS 0x00000800 /* Carrier Loss */ 6026790Speter#define TULIP_DSTS_TxNOCARR 0x00000400 /* No Carrier */ 6126790Speter#define TULIP_DSTS_TxLATECOLL 0x00000200 /* Late Collision */ 6226790Speter#define TULIP_DSTS_TxEXCCOLL 0x00000100 /* Excessive Collisions */ 6326790Speter#define TULIP_DSTS_TxNOHRTBT 0x00000080 /* No Heartbeat */ 6426790Speter#define TULIP_DSTS_TxCOLLMASK 0x00000078 /* Collision Count (mask) */ 6526790Speter#define TULIP_DSTS_V_TxCOLLCNT 0x00000003 /* Collision Count (bit) */ 6626790Speter#define TULIP_DSTS_TxLINKFAIL 0x00000004 /* Link Failure */ 6726790Speter#define TULIP_DSTS_TxUNDERFLOW 0x00000002 /* Underflow Error */ 6826790Speter#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */ 6926790Speter/* 7026790Speter * Receive Status 7126790Speter */ 7226790Speter#define TULIP_DSTS_RxBADLENGTH 0x00004000 /* Length Error */ 7326790Speter#define TULIP_DSTS_RxDATATYPE 0x00003000 /* Data Type */ 7426790Speter#define TULIP_DSTS_RxRUNT 0x00000800 /* Runt Frame */ 7526790Speter#define TULIP_DSTS_RxMULTICAST 0x00000400 /* Multicast Frame */ 7626790Speter#define TULIP_DSTS_RxFIRSTDESC 0x00000200 /* First Descriptor */ 7726790Speter#define TULIP_DSTS_RxLASTDESC 0x00000100 /* Last Descriptor */ 7826790Speter#define TULIP_DSTS_RxTOOLONG 0x00000080 /* Frame Too Long */ 7926790Speter#define TULIP_DSTS_RxCOLLSEEN 0x00000040 /* Collision Seen */ 8026790Speter#define TULIP_DSTS_RxFRAMETYPE 0x00000020 /* Frame Type */ 8126790Speter#define TULIP_DSTS_RxWATCHDOG 0x00000010 /* Receive Watchdog */ 8226790Speter#define TULIP_DSTS_RxDRBBLBIT 0x00000004 /* Dribble Bit */ 8326790Speter#define TULIP_DSTS_RxBADCRC 0x00000002 /* CRC Error */ 8426790Speter#define TULIP_DSTS_RxOVERFLOW 0x00000001 /* Overflow */ 8526790Speter 8626790Speter 8726790Speter#define TULIP_DFLAG_ENDRING 0x0008 /* End of Transmit Ring */ 8826790Speter#define TULIP_DFLAG_CHAIN 0x0004 /* Chain using d_addr2 */ 8926790Speter 9026790Speter#define TULIP_DFLAG_TxWANTINTR 0x0200 /* Signal Interrupt on Completion */ 9126790Speter#define TULIP_DFLAG_TxLASTSEG 0x0100 /* Last Segment */ 9226790Speter#define TULIP_DFLAG_TxFIRSTSEG 0x0080 /* First Segment */ 9326790Speter#define TULIP_DFLAG_TxINVRSFILT 0x0040 /* Inverse Filtering */ 9426790Speter#define TULIP_DFLAG_TxSETUPPKT 0x0020 /* Setup Packet */ 9526790Speter#define TULIP_DFLAG_TxHASCRC 0x0010 /* Don't Append the CRC */ 9626790Speter#define TULIP_DFLAG_TxNOPADDING 0x0002 /* Don't AutoPad */ 9726790Speter#define TULIP_DFLAG_TxHASHFILT 0x0001 /* Hash/Perfect Filtering */ 9826790Speter 9926790Speter/* 10026790Speter * The 21040 Registers (IO Space Addresses) 10126790Speter */ 10226790Speter#define TULIP_REG_BUSMODE 0x00 /* CSR0 -- Bus Mode */ 10326790Speter#define TULIP_REG_TXPOLL 0x08 /* CSR1 -- Transmit Poll Demand */ 10426790Speter#define TULIP_REG_RXPOLL 0x10 /* CSR2 -- Receive Poll Demand */ 10526790Speter#define TULIP_REG_RXLIST 0x18 /* CSR3 -- Receive List Base Addr */ 10626790Speter#define TULIP_REG_TXLIST 0x20 /* CSR4 -- Transmit List Base Addr */ 10726790Speter#define TULIP_REG_STATUS 0x28 /* CSR5 -- Status */ 10826790Speter#define TULIP_REG_CMD 0x30 /* CSR6 -- Command */ 10926790Speter#define TULIP_REG_INTR 0x38 /* CSR7 -- Interrupt Control */ 11026790Speter#define TULIP_REG_MISSES 0x40 /* CSR8 -- Missed Frame Counter */ 11126790Speter#define TULIP_REG_ADDRROM 0x48 /* CSR9 -- ENET ROM Register */ 11226790Speter#define TULIP_REG_RSRVD 0x50 /* CSR10 -- Reserved */ 11326790Speter#define TULIP_REG_FULL_DUPLEX 0x58 /* CSR11 -- Full Duplex */ 11426790Speter#define TULIP_REG_SIA_STATUS 0x60 /* CSR12 -- SIA Status */ 11526790Speter#define TULIP_REG_SIA_CONN 0x68 /* CSR13 -- SIA Connectivity */ 11626790Speter#define TULIP_REG_SIA_TXRX 0x70 /* CSR14 -- SIA Tx Rx */ 11726790Speter#define TULIP_REG_SIA_GEN 0x78 /* CSR15 -- SIA General */ 11826790Speter 11926790Speter/* 12026790Speter * CSR5 -- Status Register 12126790Speter * CSR7 -- Interrupt Control 12226790Speter */ 12326790Speter#define TULIP_STS_ERRORMASK 0x03800000L /* ( R) Error Bits (Valid when SYSERROR is set) */ 12426790Speter#define TULIP_STS_ERR_PARITY 0x00000000L /* 000 - Parity Error (Perform Reset) */ 12526790Speter#define TULIP_STS_ERR_MASTER 0x00800000L /* 001 - Master Abort */ 12626790Speter#define TULIP_STS_ERR_TARGET 0x01000000L /* 010 - Target Abort */ 12726790Speter#define TULIP_STS_ERR_SHIFT 23 12826790Speter#define TULIP_STS_TXSTATEMASK 0x00700000L /* ( R) Transmission Process State */ 12926790Speter#define TULIP_STS_TXS_RESET 0x00000000L /* 000 - Rset or transmit jabber expired */ 13026790Speter#define TULIP_STS_TXS_FETCH 0x00100000L /* 001 - Fetching transmit descriptor */ 13126790Speter#define TULIP_STS_TXS_WAITEND 0x00200000L /* 010 - Wait for end of transmission */ 13226790Speter#define TULIP_STS_TXS_READING 0x00300000L /* 011 - Read buffer and enqueue data */ 13326790Speter#define TULIP_STS_TXS_RSRVD 0x00400000L /* 100 - Reserved */ 13426790Speter#define TULIP_STS_TXS_SETUP 0x00500000L /* 101 - Setup Packet */ 13526790Speter#define TULIP_STS_TXS_SUSPEND 0x00600000L /* 110 - Transmit FIFO underflow or an 13626790Speter unavailable transmit descriptor */ 13726790Speter#define TULIP_STS_TXS_CLOSE 0x00700000L /* 111 - Close transmit descriptor */ 13826790Speter#define TULIP_STS_RXSTATEMASK 0x000E0000L /* ( R) Receive Process State*/ 13926790Speter#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */ 14026790Speter#define TULIP_STS_RXS_FETCH 0x00020000L /* 001 - Running -- Fetch receive descriptor */ 14126790Speter#define TULIP_STS_RXS_ENDCHECK 0x00040000L /* 010 - Running -- Check for end of receive 14226790Speter packet before prefetch of next descriptor */ 14326790Speter#define TULIP_STS_RXS_WAIT 0x00060000L /* 011 - Running -- Wait for receive packet */ 14426790Speter#define TULIP_STS_RXS_SUSPEND 0x00080000L /* 100 - Suspended -- As a result of 14526790Speter unavailable receive buffers */ 14626790Speter#define TULIP_STS_RXS_CLOSE 0x000A0000L /* 101 - Running -- Close receive descriptor */ 14726790Speter#define TULIP_STS_RXS_FLUSH 0x000C0000L /* 110 - Running -- Flush the current frame 14826790Speter from the receive FIFO as a result of 14926790Speter an unavailable receive buffer */ 15026790Speter#define TULIP_STS_RXS_DEQUEUE 0x000E0000L /* 111 - Running -- Dequeue the receive frame 15126790Speter from the receive FIFO into the receive 15226790Speter buffer. */ 15326790Speter#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */ 15426790Speter#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */ 15526790Speter#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */ 15626790Speter#define TULIP_STS_LINKFAIL 0x00001000L /* (RW) Link Failure (21040) */ 15726790Speter#define TULIP_STS_FULDPLXSHRT 0x00000800L /* (RW) Full Duplex Short Fram Rcvd (21040) */ 15826790Speter#define TULIP_STS_GPTIMEOUT 0x00000800L /* (RW) General Purpose Timeout (21140) */ 15926790Speter#define TULIP_STS_AUI 0x00000400L /* (RW) AUI/TP Switch (21040) */ 16026790Speter#define TULIP_STS_RXTIMEOUT 0x00000200L /* (RW) Receive Watchbog Timeout */ 16126790Speter#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */ 16226790Speter#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buffer Unavailable */ 16326790Speter#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */ 16426790Speter#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */ 16526790Speter#define TULIP_STS_LINKPASS 0x00000010L /* (RW) LinkPass (21041) */ 16626790Speter#define TULIP_STS_TXBABBLE 0x00000008L /* (RW) Transmit Jabber Timeout */ 16726790Speter#define TULIP_STS_TXNOBUF 0x00000004L /* (RW) Transmit Buffer Unavailable */ 16826790Speter#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */ 16926790Speter#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */ 17026790Speter 17126790Speter/* 17226790Speter * CSR6 -- Command (Operation Mode) Register 17326790Speter */ 17426790Speter#define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (21140) */ 17526790Speter#define TULIP_CMD_SCRAMBLER 0x01000000L /* (RW) Scrambler Mode (21140) */ 17626790Speter#define TULIP_CMD_PCSFUNCTION 0x00800000L /* (RW) PCS Function (21140) */ 17726790Speter#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */ 178298955Spfg#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Forward (21140) */ 17926790Speter#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */ 18026790Speter#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */ 18126790Speter#define TULIP_CMD_ENHCAPTEFFCT 0x00040000L /* (RW) Enhanced Capture Effecty (21041) */ 18226790Speter#define TULIP_CMD_CAPTREFFCT 0x00020000L /* (RW) Capture Effect (!802.3) */ 18326790Speter#define TULIP_CMD_BACKPRESSURE 0x00010000L /* (RW) Back Pressure (!802.3) (21040) */ 18426790Speter#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */ 18526790Speter#define TULIP_CMD_THRSHLD72 0x00000000L /* 00 - 72 Bytes */ 18626790Speter#define TULIP_CMD_THRSHLD96 0x00004000L /* 01 - 96 Bytes */ 18726790Speter#define TULIP_CMD_THRSHLD128 0x00008000L /* 10 - 128 bytes */ 18826790Speter#define TULIP_CMD_THRSHLD160 0x0000C000L /* 11 - 160 Bytes */ 18926790Speter#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */ 19026790Speter#define TULIP_CMD_FORCECOLL 0x00001000L /* (RW) Force Collisions */ 19126790Speter#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */ 19226790Speter#define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */ 19326790Speter#define TULIP_CMD_FLAKYOSCDIS 0x00000100L /* (RW) Flakey Oscillator Disable */ 19426790Speter#define TULIP_CMD_ALLMULTI 0x00000080L /* (RW) Pass All Multicasts */ 19526790Speter#define TULIP_CMD_PROMISCUOUS 0x00000040L /* (RW) Promiscuous Mode */ 19626790Speter#define TULIP_CMD_BACKOFFCTR 0x00000020L /* (RW) Start/Stop Backoff Counter (!802.3) */ 19726790Speter#define TULIP_CMD_INVFILTER 0x00000010L /* (R ) Inverse Filtering */ 19826790Speter#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */ 19926790Speter#define TULIP_CMD_HASHONLYFLTR 0x00000004L /* (R ) Hash Only Filtering */ 20026790Speter#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */ 20126790Speter#define TULIP_CMD_HASHPRFCTFLTR 0x00000001L /* (R ) Hash/Perfect Receive Filtering */ 20226790Speter 20326790Speter#define TULIP_SIASTS_OTHERRXACTIVITY 0x00000200L 20426790Speter#define TULIP_SIASTS_RXACTIVITY 0x00000100L 20526790Speter#define TULIP_SIASTS_LINKFAIL 0x00000004L 20630549Speter#define TULIP_SIASTS_LINK100FAIL 0x00000002L 20726790Speter#define TULIP_SIACONN_RESET 0x00000000L 20826790Speter 20926790Speter/* 21026790Speter * 21040 SIA definitions 21126790Speter */ 21226790Speter#define TULIP_21040_PROBE_10BASET_TIMEOUT 2500 21326790Speter#define TULIP_21040_PROBE_AUIBNC_TIMEOUT 300 21426790Speter#define TULIP_21040_PROBE_EXTSIA_TIMEOUT 300 21526790Speter 21636945Speter#define TULIP_21040_SIACONN_10BASET 0x0000EF01L 21726790Speter#define TULIP_21040_SIATXRX_10BASET 0x0000FFFFL 21826790Speter#define TULIP_21040_SIAGEN_10BASET 0x00000000L 21926790Speter 22036945Speter#define TULIP_21040_SIACONN_10BASET_FD 0x0000EF01L 22126790Speter#define TULIP_21040_SIATXRX_10BASET_FD 0x0000FFFDL 22226790Speter#define TULIP_21040_SIAGEN_10BASET_FD 0x00000000L 22326790Speter 22436945Speter#define TULIP_21040_SIACONN_AUIBNC 0x0000EF09L 22526790Speter#define TULIP_21040_SIATXRX_AUIBNC 0x00000705L 22626790Speter#define TULIP_21040_SIAGEN_AUIBNC 0x00000006L 22726790Speter 22826790Speter#define TULIP_21040_SIACONN_EXTSIA 0x00003041L 22926790Speter#define TULIP_21040_SIATXRX_EXTSIA 0x00000000L 23026790Speter#define TULIP_21040_SIAGEN_EXTSIA 0x00000006L 23126790Speter 23226790Speter/* 23326790Speter * 21041 SIA definitions 23426790Speter */ 23526790Speter 23626790Speter#define TULIP_21041_PROBE_10BASET_TIMEOUT 2500 23726790Speter#define TULIP_21041_PROBE_AUIBNC_TIMEOUT 300 23826790Speter 23926790Speter#define TULIP_21041_SIACONN_10BASET 0x0000EF01L 24026790Speter#define TULIP_21041_SIATXRX_10BASET 0x0000FF3FL 24126790Speter#define TULIP_21041_SIAGEN_10BASET 0x00000000L 24226790Speter 24326790Speter#define TULIP_21041P2_SIACONN_10BASET 0x0000EF01L 24426790Speter#define TULIP_21041P2_SIATXRX_10BASET 0x0000FFFFL 24526790Speter#define TULIP_21041P2_SIAGEN_10BASET 0x00000000L 24626790Speter 24726790Speter#define TULIP_21041_SIACONN_10BASET_FD 0x0000EF01L 24826790Speter#define TULIP_21041_SIATXRX_10BASET_FD 0x0000FF3DL 24926790Speter#define TULIP_21041_SIAGEN_10BASET_FD 0x00000000L 25026790Speter 25126790Speter#define TULIP_21041P2_SIACONN_10BASET_FD 0x0000EF01L 25226790Speter#define TULIP_21041P2_SIATXRX_10BASET_FD 0x0000FFFFL 25326790Speter#define TULIP_21041P2_SIAGEN_10BASET_FD 0x00000000L 25426790Speter 25526790Speter#define TULIP_21041_SIACONN_AUI 0x0000EF09L 25626790Speter#define TULIP_21041_SIATXRX_AUI 0x0000F73DL 25726790Speter#define TULIP_21041_SIAGEN_AUI 0x0000000EL 25826790Speter 25926790Speter#define TULIP_21041P2_SIACONN_AUI 0x0000EF09L 26026790Speter#define TULIP_21041P2_SIATXRX_AUI 0x0000F7FDL 26126790Speter#define TULIP_21041P2_SIAGEN_AUI 0x0000000EL 26226790Speter 26326790Speter#define TULIP_21041_SIACONN_BNC 0x0000EF09L 26426790Speter#define TULIP_21041_SIATXRX_BNC 0x0000F73DL 26526790Speter#define TULIP_21041_SIAGEN_BNC 0x00000006L 26626790Speter 26726790Speter#define TULIP_21041P2_SIACONN_BNC 0x0000EF09L 26826790Speter#define TULIP_21041P2_SIATXRX_BNC 0x0000F7FDL 26926790Speter#define TULIP_21041P2_SIAGEN_BNC 0x00000006L 27026790Speter 27126790Speter/* 27226790Speter * 21142 SIA definitions 27326790Speter */ 27426790Speter 27526790Speter#define TULIP_21142_PROBE_10BASET_TIMEOUT 2500 27626790Speter#define TULIP_21142_PROBE_AUIBNC_TIMEOUT 300 27726790Speter 27826790Speter#define TULIP_21142_SIACONN_10BASET 0x00000001L 27930549Speter#define TULIP_21142_SIATXRX_10BASET 0x00007F3FL 28030549Speter#define TULIP_21142_SIAGEN_10BASET 0x00000008L 28126790Speter 28226790Speter#define TULIP_21142_SIACONN_10BASET_FD 0x00000001L 28330549Speter#define TULIP_21142_SIATXRX_10BASET_FD 0x00007F3DL 28430549Speter#define TULIP_21142_SIAGEN_10BASET_FD 0x00000008L 28526790Speter 28626790Speter#define TULIP_21142_SIACONN_AUI 0x00000009L 28730549Speter#define TULIP_21142_SIATXRX_AUI 0x00000705L 28826790Speter#define TULIP_21142_SIAGEN_AUI 0x0000000EL 28926790Speter 29026790Speter#define TULIP_21142_SIACONN_BNC 0x00000009L 29130549Speter#define TULIP_21142_SIATXRX_BNC 0x00000705L 29226790Speter#define TULIP_21142_SIAGEN_BNC 0x00000006L 29326790Speter 29426790Speter 29526790Speter 29626790Speter 29726790Speter#define TULIP_WATCHDOG_TXDISABLE 0x00000001L 29826790Speter#define TULIP_WATCHDOG_RXDISABLE 0x00000010L 29926790Speter 30026790Speter#define TULIP_BUSMODE_SWRESET 0x00000001L 30126790Speter#define TULIP_BUSMODE_DESCSKIPLEN_MASK 0x0000007CL 30226790Speter#define TULIP_BUSMODE_BIGENDIAN 0x00000080L 30326790Speter#define TULIP_BUSMODE_BURSTLEN_MASK 0x00003F00L 30426790Speter#define TULIP_BUSMODE_BURSTLEN_DEFAULT 0x00000000L 30526790Speter#define TULIP_BUSMODE_BURSTLEN_1LW 0x00000100L 30626790Speter#define TULIP_BUSMODE_BURSTLEN_2LW 0x00000200L 30726790Speter#define TULIP_BUSMODE_BURSTLEN_4LW 0x00000400L 30826790Speter#define TULIP_BUSMODE_BURSTLEN_8LW 0x00000800L 30926790Speter#define TULIP_BUSMODE_BURSTLEN_16LW 0x00001000L 31026790Speter#define TULIP_BUSMODE_BURSTLEN_32LW 0x00002000L 31126790Speter#define TULIP_BUSMODE_CACHE_NOALIGN 0x00000000L 31226790Speter#define TULIP_BUSMODE_CACHE_ALIGN8 0x00004000L 31326790Speter#define TULIP_BUSMODE_CACHE_ALIGN16 0x00008000L 31426790Speter#define TULIP_BUSMODE_CACHE_ALIGN32 0x0000C000L 31526790Speter#define TULIP_BUSMODE_TXPOLL_NEVER 0x00000000L 31626790Speter#define TULIP_BUSMODE_TXPOLL_200000ns 0x00020000L 31726790Speter#define TULIP_BUSMODE_TXPOLL_800000ns 0x00040000L 31826790Speter#define TULIP_BUSMODE_TXPOLL_1600000ns 0x00060000L 31926790Speter#define TULIP_BUSMODE_TXPOLL_12800ns 0x00080000L /* 21041 only */ 32026790Speter#define TULIP_BUSMODE_TXPOLL_25600ns 0x000A0000L /* 21041 only */ 32126790Speter#define TULIP_BUSMODE_TXPOLL_51200ns 0x000C0000L /* 21041 only */ 32226790Speter#define TULIP_BUSMODE_TXPOLL_102400ns 0x000E0000L /* 21041 only */ 32326790Speter#define TULIP_BUSMODE_DESC_BIGENDIAN 0x00100000L /* 21041 only */ 32426790Speter#define TULIP_BUSMODE_READMULTIPLE 0x00200000L /* */ 32526790Speter 32626790Speter#define TULIP_REG_CFDA 0x40 32726790Speter#define TULIP_CFDA_SLEEP 0x80000000L 32826790Speter#define TULIP_CFDA_SNOOZE 0x40000000L 32926790Speter 33026790Speter#define TULIP_GP_PINSET 0x00000100L 33126790Speter/* 33226790Speter * These are the defintitions used for the DEC 21140 33326790Speter * evaluation board. 33426790Speter */ 33526790Speter#define TULIP_GP_EB_PINS 0x0000001F /* General Purpose Pin directions */ 33626790Speter#define TULIP_GP_EB_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ 33726790Speter#define TULIP_GP_EB_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ 33826790Speter#define TULIP_GP_EB_INIT 0x0000000B /* No loopback --- point-to-point */ 33926790Speter 34026790Speter/* 34126790Speter * These are the defintitions used for the SMC9332 (21140) board. 34226790Speter */ 34326790Speter#define TULIP_GP_SMC_9332_PINS 0x0000003F /* General Purpose Pin directions */ 34426790Speter#define TULIP_GP_SMC_9332_OK10 0x00000080 /* 10 Mb/sec Signal Detect gep<7> */ 34526790Speter#define TULIP_GP_SMC_9332_OK100 0x00000040 /* 100 Mb/sec Signal Detect gep<6> */ 34626790Speter#define TULIP_GP_SMC_9332_INIT 0x00000009 /* No loopback --- point-to-point */ 34726790Speter 34826790Speter/* 34926790Speter * There are the definitions used for the DEC DE500 35026790Speter * 10/100 family of boards 35126790Speter */ 35226790Speter#define TULIP_GP_DE500_PINS 0x0000001FL 35326790Speter#define TULIP_GP_DE500_LINK_PASS 0x00000080L 35426790Speter#define TULIP_GP_DE500_SYM_LINK 0x00000040L 35526790Speter#define TULIP_GP_DE500_SIGNAL_DETECT 0x00000020L 35626790Speter#define TULIP_GP_DE500_PHY_RESET 0x00000010L 35726790Speter#define TULIP_GP_DE500_HALFDUPLEX 0x00000008L 35826790Speter#define TULIP_GP_DE500_PHY_LOOPBACK 0x00000004L 35926790Speter#define TULIP_GP_DE500_FORCE_LED 0x00000002L 36026790Speter#define TULIP_GP_DE500_FORCE_100 0x00000001L 36126790Speter 36226790Speter/* 36326790Speter * These are the defintitions used for the Cogent EM100 36426790Speter * 21140 board. 36526790Speter */ 36626790Speter#define TULIP_GP_EM100_PINS 0x0000003F /* General Purpose Pin directions */ 36726790Speter#define TULIP_GP_EM100_INIT 0x00000009 /* No loopback --- point-to-point */ 36827859Speter#define TULIP_COGENT_EM100TX_ID 0x12 36927859Speter#define TULIP_COGENT_EM100FX_ID 0x15 37026790Speter 37126790Speter 37226790Speter/* 37326790Speter * These are the defintitions used for the Znyx ZX342 37426790Speter * 10/100 board 37526790Speter */ 37626790Speter#define TULIP_ZNYX_ID_ZX312 0x0602 37726790Speter#define TULIP_ZNYX_ID_ZX312T 0x0622 37826790Speter#define TULIP_ZNYX_ID_ZX314_INTA 0x0701 37926790Speter#define TULIP_ZNYX_ID_ZX314 0x0711 38026790Speter#define TULIP_ZNYX_ID_ZX315_INTA 0x0801 38126790Speter#define TULIP_ZNYX_ID_ZX315 0x0811 38226790Speter#define TULIP_ZNYX_ID_ZX342 0x0901 38326790Speter#define TULIP_ZNYX_ID_ZX342B 0x0921 38426790Speter#define TULIP_ZNYX_ID_ZX342_X3 0x0902 38526790Speter#define TULIP_ZNYX_ID_ZX342_X4 0x0903 38626790Speter#define TULIP_ZNYX_ID_ZX344 0x0A01 38726790Speter#define TULIP_ZNYX_ID_ZX351 0x0B01 38826790Speter#define TULIP_ZNYX_ID_ZX345 0x0C01 38926790Speter#define TULIP_ZNYX_ID_ZX311 0x0D01 39026790Speter#define TULIP_ZNYX_ID_ZX346 0x0E01 39126790Speter 39226790Speter#define TULIP_GP_ZX34X_PINS 0x0000001F /* General Purpose Pin directions */ 39326790Speter#define TULIP_GP_ZX344_PINS 0x0000000B /* General Purpose Pin directions */ 39426790Speter#define TULIP_GP_ZX345_PINS 0x00000003 /* General Purpose Pin directions */ 39526790Speter#define TULIP_GP_ZX346_PINS 0x00000043 /* General Purpose Pin directions */ 39626790Speter#define TULIP_GP_ZX34X_LNKFAIL 0x00000080 /* 10Mb/s Link Failure */ 39726790Speter#define TULIP_GP_ZX34X_SYMDET 0x00000040 /* 100Mb/s Symbol Detect */ 39826790Speter#define TULIP_GP_ZX345_PHYACT 0x00000040 /* PHY Activity */ 39926790Speter#define TULIP_GP_ZX34X_SIGDET 0x00000020 /* 100Mb/s Signal Detect */ 40026790Speter#define TULIP_GP_ZX346_AUTONEG_ENABLED 0x00000020 /* 802.3u autoneg enabled */ 40126790Speter#define TULIP_GP_ZX342_COLENA 0x00000008 /* 10t Ext LB */ 40226790Speter#define TULIP_GP_ZX344_ROTINT 0x00000008 /* PPB IRQ rotation */ 40326790Speter#define TULIP_GP_ZX345_SPEED10 0x00000008 /* 10Mb speed detect */ 40426790Speter#define TULIP_GP_ZX346_SPEED100 0x00000008 /* 100Mb speed detect */ 40526790Speter#define TULIP_GP_ZX34X_NCOLENA 0x00000004 /* 10t Int LB */ 40626790Speter#define TULIP_GP_ZX34X_RXMATCH 0x00000004 /* RX Match */ 40726790Speter#define TULIP_GP_ZX346_FULLDUPLEX 0x00000004 /* Full Duplex Sensed */ 40826790Speter#define TULIP_GP_ZX34X_LB102 0x00000002 /* 100tx twister LB */ 40926790Speter#define TULIP_GP_ZX34X_NLB101 0x00000001 /* PDT/PDR LB */ 41026790Speter#define TULIP_GP_ZX34X_INIT 0x00000009 41126790Speter 41226790Speter/* 41374773Speter * Asante's stuff... 41426790Speter */ 41526790Speter#define TULIP_GP_ASANTE_PINS 0x000000bf /* GP pin config */ 41626790Speter#define TULIP_GP_ASANTE_PHYRESET 0x00000008 /* Reset PHY */ 41726790Speter 41826790Speter/* 41930549Speter * ACCTON EN1207 specialties 42030549Speter */ 42130549Speter 42230549Speter#define TULIP_CSR8_EN1207 0x08 42330549Speter#define TULIP_CSR9_EN1207 0x00 42430549Speter#define TULIP_CSR10_EN1207 0x03 42530549Speter#define TULIP_CSR11_EN1207 0x1F 42630549Speter 42730549Speter#define TULIP_GP_EN1207_BNC_INIT 0x0000011B 42830549Speter#define TULIP_GP_EN1207_UTP_INIT 0x9E00000B 42930549Speter#define TULIP_GP_EN1207_100_INIT 0x6D00031B 43030549Speter 43130549Speter/* 43226790Speter * SROM definitions for the 21140 and 21041. 43326790Speter */ 43426790Speter#define SROMXREG 0x0400 43526790Speter#define SROMSEL 0x0800 43626790Speter#define SROMRD 0x4000 43726790Speter#define SROMWR 0x2000 43826790Speter#define SROMDIN 0x0008 43926790Speter#define SROMDOUT 0x0004 44026790Speter#define SROMDOUTON 0x0004 44126790Speter#define SROMDOUTOFF 0x0004 44226790Speter#define SROMCLKON 0x0002 44326790Speter#define SROMCLKOFF 0x0002 44426790Speter#define SROMCSON 0x0001 44526790Speter#define SROMCSOFF 0x0001 44626790Speter#define SROMCS 0x0001 44726790Speter 44826790Speter#define SROMCMD_MODE 4 44926790Speter#define SROMCMD_WR 5 45026790Speter#define SROMCMD_RD 6 45126790Speter 45226790Speter#define SROM_BITWIDTH 6 45326790Speter 45426790Speter/* 45526790Speter * MII Definitions for the 21041 and 21140/21140A/21142 45626790Speter */ 45726790Speter#define MII_PREAMBLE (~0) 45826790Speter#define MII_TEST 0xAAAAAAAA 45926790Speter#define MII_RDCMD 0xF6 /* 1111.0110 */ 46026790Speter#define MII_WRCMD 0xF5 /* 1111.0101 */ 46126790Speter#define MII_DIN 0x00080000 46226790Speter#define MII_RD 0x00040000 46326790Speter#define MII_WR 0x00000000 46426790Speter#define MII_DOUT 0x00020000 46526790Speter#define MII_CLK 0x00010000 46626790Speter#define MII_CLKON MII_CLK 46726790Speter#define MII_CLKOFF MII_CLK 46826790Speter 46926790Speter#define PHYREG_CONTROL 0 47026790Speter#define PHYREG_STATUS 1 47126790Speter#define PHYREG_IDLOW 2 47226790Speter#define PHYREG_IDHIGH 3 47326790Speter#define PHYREG_AUTONEG_ADVERTISEMENT 4 47426790Speter#define PHYREG_AUTONEG_ABILITIES 5 47526790Speter#define PHYREG_AUTONEG_EXPANSION 6 47626790Speter#define PHYREG_AUTONEG_NEXTPAGE 7 47726790Speter 47826790Speter#define PHYSTS_100BASET4 0x8000 47926790Speter#define PHYSTS_100BASETX_FD 0x4000 48026790Speter#define PHYSTS_100BASETX 0x2000 48126790Speter#define PHYSTS_10BASET_FD 0x1000 48226790Speter#define PHYSTS_10BASET 0x0800 48326790Speter#define PHYSTS_AUTONEG_DONE 0x0020 48426790Speter#define PHYSTS_REMOTE_FAULT 0x0010 48526790Speter#define PHYSTS_CAN_AUTONEG 0x0008 48626790Speter#define PHYSTS_LINK_UP 0x0004 48726790Speter#define PHYSTS_JABBER_DETECT 0x0002 48826790Speter#define PHYSTS_EXTENDED_REGS 0x0001 48926790Speter 49026790Speter#define PHYCTL_RESET 0x8000 49126790Speter#define PHYCTL_SELECT_100MB 0x2000 49226790Speter#define PHYCTL_AUTONEG_ENABLE 0x1000 49326790Speter#define PHYCTL_ISOLATE 0x0400 49426790Speter#define PHYCTL_AUTONEG_RESTART 0x0200 49526790Speter#define PHYCTL_FULL_DUPLEX 0x0100 49626790Speter 49726790Speter/* 49826790Speter * Definitions for the DE425. 49926790Speter */ 50026790Speter#define DE425_CFID 0x08 /* Configuration Id */ 50126790Speter#define DE425_CFCS 0x0C /* Configuration Command-Status */ 50226790Speter#define DE425_CFRV 0x18 /* Configuration Revision */ 50326790Speter#define DE425_CFLT 0x1C /* Configuration Latency Timer */ 50426790Speter#define DE425_CBIO 0x28 /* Configuration Base IO Address */ 50526790Speter#define DE425_CFDA 0x2C /* Configuration Driver Area */ 50626790Speter#define DE425_ENETROM_OFFSET 0xC90 /* Offset in I/O space for ENETROM */ 50726790Speter#define DE425_CFG0 0xC88 /* IRQ register */ 50826790Speter#define DE425_EISAID 0x10a34250 /* EISA device id */ 50926790Speter#define DE425_EISA_IOSIZE 0x100 51026790Speter 51126790Speter#define DEC_VENDORID 0x1011 51226790Speter#define CHIPID_21040 0x0002 51326790Speter#define CHIPID_21140 0x0009 51426790Speter#define CHIPID_21041 0x0014 51526790Speter#define CHIPID_21142 0x0019 51626790Speter#define PCI_VENDORID(x) ((x) & 0xFFFF) 51726790Speter#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF) 51826790Speter 51926790Speter/* 52026790Speter * Generic SROM Format 52126790Speter * 52226790Speter * 52326790Speter */ 52426790Speter 52526790Spetertypedef struct { 52626790Speter u_int8_t sh_idbuf[18]; 52726790Speter u_int8_t sh_version; 52826790Speter u_int8_t sh_adapter_count; 52926790Speter u_int8_t sh_ieee802_address[6]; 53026790Speter} tulip_srom_header_t; 53126790Speter 53226790Spetertypedef struct { 53326790Speter u_int8_t sai_device; 53426790Speter u_int8_t sai_leaf_offset_lowbyte; 53526790Speter u_int8_t sai_leaf_offset_highbyte; 53626790Speter} tulip_srom_adapter_info_t; 53726790Speter 53826790Spetertypedef enum { 53926790Speter TULIP_SROM_CONNTYPE_10BASET =0x0000, 54026790Speter TULIP_SROM_CONNTYPE_BNC =0x0001, 54126790Speter TULIP_SROM_CONNTYPE_AUI =0x0002, 54226790Speter TULIP_SROM_CONNTYPE_100BASETX =0x0003, 54326790Speter TULIP_SROM_CONNTYPE_100BASET4 =0x0006, 54426790Speter TULIP_SROM_CONNTYPE_100BASEFX =0x0007, 54526790Speter TULIP_SROM_CONNTYPE_MII_10BASET =0x0009, 54626790Speter TULIP_SROM_CONNTYPE_MII_100BASETX =0x000D, 54726790Speter TULIP_SROM_CONNTYPE_MII_100BASET4 =0x000F, 54826790Speter TULIP_SROM_CONNTYPE_MII_100BASEFX =0x0010, 54926790Speter TULIP_SROM_CONNTYPE_10BASET_NWAY =0x0100, 55026790Speter TULIP_SROM_CONNTYPE_10BASET_FD =0x0204, 55126790Speter TULIP_SROM_CONNTYPE_MII_10BASET_FD =0x020A, 55226790Speter TULIP_SROM_CONNTYPE_100BASETX_FD =0x020E, 55326790Speter TULIP_SROM_CONNTYPE_MII_100BASETX_FD =0x0211, 55426790Speter TULIP_SROM_CONNTYPE_10BASET_NOLINKPASS =0x0400, 55526790Speter TULIP_SROM_CONNTYPE_AUTOSENSE =0x0800, 55626790Speter TULIP_SROM_CONNTYPE_AUTOSENSE_POWERUP =0x8800, 55726790Speter TULIP_SROM_CONNTYPE_AUTOSENSE_NWAY =0x9000, 55826790Speter TULIP_SROM_CONNTYPE_NOT_USED =0xFFFF 55926790Speter} tulip_srom_connection_t; 56026790Speter 56126790Spetertypedef enum { 56226790Speter TULIP_SROM_MEDIA_10BASET =0x0000, 56326790Speter TULIP_SROM_MEDIA_BNC =0x0001, 56426790Speter TULIP_SROM_MEDIA_AUI =0x0002, 56526790Speter TULIP_SROM_MEDIA_100BASETX =0x0003, 56626790Speter TULIP_SROM_MEDIA_10BASET_FD =0x0004, 56726790Speter TULIP_SROM_MEDIA_100BASETX_FD =0x0005, 56826790Speter TULIP_SROM_MEDIA_100BASET4 =0x0006, 56926790Speter TULIP_SROM_MEDIA_100BASEFX =0x0007, 57026790Speter TULIP_SROM_MEDIA_100BASEFX_FD =0x0008 57126790Speter} tulip_srom_media_t; 57226790Speter 57326790Speter#define TULIP_SROM_21041_EXTENDED 0x40 57426790Speter 57526790Speter#define TULIP_SROM_2114X_NOINDICATOR 0x8000 57626790Speter#define TULIP_SROM_2114X_DEFAULT 0x4000 57726790Speter#define TULIP_SROM_2114X_POLARITY 0x0080 57826790Speter#define TULIP_SROM_2114X_CMDBITS(n) (((n) & 0x0071) << 18) 57926790Speter#define TULIP_SROM_2114X_BITPOS(b) (1 << (((b) & 0x0E) >> 1)) 58026790Speter 58126790Speter 58226790Speter 58326790Speter#endif /* !defined(_DC21040_H) */ 584