bktr_reg.h revision 52593
1254889Smarkj/*
2254889Smarkj * $FreeBSD: head/sys/dev/bktr/bktr_reg.h 52593 1999-10-28 13:58:17Z roger $
3254889Smarkj *
4254889Smarkj * Copyright (c) 1999 Roger Hardiman
5254889Smarkj * Copyright (c) 1998 Amancio Hasty
6254889Smarkj * Copyright (c) 1995 Mark Tinguely and Jim Lowe
7254889Smarkj * All rights reserved.
8254889Smarkj *
9254889Smarkj * Redistribution and use in source and binary forms, with or without
10254889Smarkj * modification, are permitted provided that the following conditions
11254889Smarkj * are met:
12254889Smarkj * 1. Redistributions of source code must retain the above copyright
13254889Smarkj *    notice, this list of conditions and the following disclaimer.
14254889Smarkj * 2. Redistributions in binary form must reproduce the above copyright
15254889Smarkj *    notice, this list of conditions and the following disclaimer in the
16254889Smarkj *    documentation and/or other materials provided with the distribution.
17254889Smarkj * 3. All advertising materials mentioning features or use of this software
18254889Smarkj *    must display the following acknowledgement:
19254889Smarkj *	This product includes software developed by Mark Tinguely and Jim Lowe
20254889Smarkj * 4. The name of the author may not be used to endorse or promote products
21254889Smarkj *    derived from this software without specific prior written permission.
22254889Smarkj *
23254889Smarkj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24254889Smarkj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25254889Smarkj * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26254889Smarkj * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
27254889Smarkj * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28254889Smarkj * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29286420Smarkj * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30254889Smarkj * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
31254889Smarkj * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
32254889Smarkj * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33254889Smarkj * POSSIBILITY OF SUCH DAMAGE.
34254889Smarkj *
35266082Smarkj */
36254889Smarkj
37266082Smarkj#ifdef __FreeBSD__
38254889Smarkj#if (__FreeBSD_version >= 310000)
39266082Smarkj#include <sys/bus.h>
40254889Smarkj#include "smbus.h"
41266082Smarkj#else
42254889Smarkj#define NSMBUS 0
43266082Smarkj#endif
44254889Smarkj#endif
45266082Smarkj
46254889Smarkj#ifndef PCI_LATENCY_TIMER
47266082Smarkj#define	PCI_LATENCY_TIMER		0x0c	/* pci timer register */
48254889Smarkj#endif
49266082Smarkj
50254889Smarkj/*
51266082Smarkj * Definitions for the Brooktree 848/878 video capture to pci interface.
52254889Smarkj */
53266082Smarkj#define BROOKTREE_848_PCI_ID            0x0350109E
54254889Smarkj#define BROOKTREE_849_PCI_ID            0x0351109E
55266082Smarkj#define BROOKTREE_878_PCI_ID            0x036E109E
56254889Smarkj#define BROOKTREE_879_PCI_ID            0x036F109E
57254889Smarkj
58254889Smarkj#define BROOKTREE_848                   1
59266082Smarkj#define BROOKTREE_848A                  2
60254889Smarkj#define BROOKTREE_849A                  3
61266082Smarkj#define BROOKTREE_878                   4
62254889Smarkj#define BROOKTREE_879                   5
63266082Smarkj
64254889Smarkjtypedef volatile u_int 	bregister_t;
65266082Smarkj/*
66254889Smarkj * if other persuasion endian, then compiler will probably require that
67266082Smarkj * these next
68254889Smarkj * macros be reversed
69266082Smarkj */
70254889Smarkj#define	BTBYTE(what)	bregister_t  what:8; int :24
71266082Smarkj#define	BTWORD(what)	bregister_t  what:16; int: 16
72254889Smarkj#define BTLONG(what)	bregister_t  what:32
73266082Smarkj
74254889Smarkjstruct bt848_registers {
75254889Smarkj    BTBYTE (dstatus);		/* 0, 1,2,3 */
76254889Smarkj#define BT848_DSTATUS_PRES		(1<<7)
77266082Smarkj#define BT848_DSTATUS_HLOC		(1<<6)
78254889Smarkj#define BT848_DSTATUS_FIELD		(1<<5)
79254889Smarkj#define BT848_DSTATUS_NUML		(1<<4)
80254889Smarkj#define BT848_DSTATUS_CSEL		(1<<3)
81254889Smarkj#define BT848_DSTATUS_PLOCK		(1<<2)
82254889Smarkj#define BT848_DSTATUS_LOF		(1<<1)
83254889Smarkj#define BT848_DSTATUS_COF		(1<<0)
84254889Smarkj    BTBYTE (iform);		/* 4, 5,6,7 */
85254889Smarkj#define BT848_IFORM_MUXSEL		(0x3<<5)
86254889Smarkj# define BT848_IFORM_M_MUX1		(0x03<<5)
87254889Smarkj# define BT848_IFORM_M_MUX0		(0x02<<5)
88254889Smarkj# define BT848_IFORM_M_MUX2		(0x01<<5)
89254889Smarkj# define BT848_IFORM_M_MUX3		(0x0)
90254889Smarkj# define BT848_IFORM_M_RSVD		(0x00<<5)
91254889Smarkj#define BT848_IFORM_XTSEL		(0x3<<3)
92254889Smarkj# define BT848_IFORM_X_AUTO		(0x03<<3)
93254889Smarkj# define BT848_IFORM_X_XT1		(0x02<<3)
94254889Smarkj# define BT848_IFORM_X_XT0		(0x01<<3)
95254889Smarkj# define BT848_IFORM_X_RSVD		(0x00<<3)
96254889Smarkj    BTBYTE (tdec);		/* 8, 9,a,b */
97254889Smarkj    BTBYTE (e_crop);		/* c, d,e,f */
98254889Smarkj    BTBYTE (e_vdelay_lo);	/* 10, 11,12,13 */
99254889Smarkj    BTBYTE (e_vactive_lo);	/* 14, 15,16,17 */
100254889Smarkj    BTBYTE (e_delay_lo);	/* 18, 19,1a,1b */
101254889Smarkj    BTBYTE (e_hactive_lo);	/* 1c, 1d,1e,1f */
102254889Smarkj    BTBYTE (e_hscale_hi);	/* 20, 21,22,23 */
103254889Smarkj    BTBYTE (e_hscale_lo);	/* 24, 25,26,27 */
104254889Smarkj    BTBYTE (bright);		/* 28, 29,2a,2b */
105296335Sgnn    BTBYTE (e_control);		/* 2c, 2d,2e,2f */
106254889Smarkj#define BT848_E_CONTROL_LNOTCH		(1<<7)
107287759Sgnn#define BT848_E_CONTROL_COMP		(1<<6)
108254889Smarkj#define BT848_E_CONTROL_LDEC		(1<<5)
109254889Smarkj#define BT848_E_CONTROL_CBSENSE		(1<<4)
110254889Smarkj#define BT848_E_CONTROL_RSVD		(1<<3)
111298087Shiren#define BT848_E_CONTROL_CON_MSB		(1<<2)
112254889Smarkj#define BT848_E_CONTROL_SAT_U_MSB	(1<<1)
113287759Sgnn#define BT848_E_CONTROL_SAT_V_MSB	(1<<0)
114287759Sgnn    BTBYTE (contrast_lo);	/* 30, 31,32,33 */
115287759Sgnn    BTBYTE (sat_u_lo);		/* 34, 35,36,37 */
116296335Sgnn    BTBYTE (sat_v_lo);		/* 38, 39,3a,3b */
117298087Shiren    BTBYTE (hue);		/* 3c, 3d,3e,3f */
118254889Smarkj    BTBYTE (e_scloop);		/* 40, 41,42,43 */
119298087Shiren#define BT848_E_SCLOOP_RSVD1		(1<<7)
120298087Shiren#define BT848_E_SCLOOP_CAGC		(1<<6)
121296335Sgnn#define BT848_E_SCLOOP_CKILL		(1<<5)
122254889Smarkj#define BT848_E_SCLOOP_HFILT		(0x3<<3)
123254889Smarkj# define BT848_E_SCLOOP_HFILT_ICON	(0x3<<3)
124254889Smarkj# define BT848_E_SCLOOP_HFILT_QCIF	(0x2<<3)
125254889Smarkj# define BT848_E_SCLOOP_HFILT_CIF	(0x1<<3)
126254889Smarkj# define BT848_E_SCLOOP_HFILT_AUTO	(0x0<<3)
127287759Sgnn#define BT848_E_SCLOOP_RSVD0		(0x7<<0)
128287759Sgnn    int		:32;		/* 44, 45,46,47 */
129296335Sgnn    BTBYTE (oform);		/* 48, 49,4a,4b */
130296335Sgnn    BTBYTE (e_vscale_hi);	/* 4c, 4d,4e,4f */
131296335Sgnn    BTBYTE (e_vscale_lo);	/* 50, 51,52,53 */
132296335Sgnn    BTBYTE (test);		/* 54, 55,56,57 */
133254889Smarkj    int		:32;		/* 58, 59,5a,5b */
134254889Smarkj    int		:32;		/* 5c, 5d,5e,5f */
135254889Smarkj    BTLONG (adelay);		/* 60, 61,62,63 */
136254889Smarkj    BTBYTE (bdelay);		/* 64, 65,66,67 */
137254889Smarkj    BTBYTE (adc);		/* 68, 69,6a,6b */
138254889Smarkj#define BT848_ADC_RESERVED		(0x80)	/* required pattern */
139254889Smarkj#define BT848_ADC_SYNC_T		(1<<5)
140254889Smarkj#define BT848_ADC_AGC_EN		(1<<4)
141254889Smarkj#define BT848_ADC_CLK_SLEEP		(1<<3)
142254889Smarkj#define BT848_ADC_Y_SLEEP		(1<<2)
143254889Smarkj#define BT848_ADC_C_SLEEP		(1<<1)
144254889Smarkj#define BT848_ADC_CRUSH			(1<<0)
145254889Smarkj    BTBYTE (e_vtc);		/* 6c, 6d,6e,6f */
146254889Smarkj    int		:32;		/* 70, 71,72,73 */
147254889Smarkj    int 	:32;		/* 74, 75,76,77 */
148254889Smarkj    int		:32;		/* 78, 79,7a,7b */
149254889Smarkj    BTLONG (sreset);		/* 7c, 7d,7e,7f */
150254889Smarkj    u_char 	filler1[0x84-0x80];
151254889Smarkj    BTBYTE (tgctrl);		/* 84, 85,86,87 */
152254889Smarkj#define BT848_TGCTRL_TGCKI		(3<<3)
153254889Smarkj#define BT848_TGCTRL_TGCKI_XTAL		(0<<3)
154254889Smarkj#define BT848_TGCTRL_TGCKI_PLL		(1<<3)
155254889Smarkj#define BT848_TGCTRL_TGCKI_GPCLK	(2<<3)
156254889Smarkj#define BT848_TGCTRL_TGCKI_GPCLK_I	(3<<3)
157254889Smarkj    u_char 	filler[0x8c-0x88];
158255993Smarkj    BTBYTE (o_crop);		/* 8c, 8d,8e,8f */
159255993Smarkj    BTBYTE (o_vdelay_lo);	/* 90, 91,92,93 */
160255993Smarkj    BTBYTE (o_vactive_lo);	/* 94, 95,96,97 */
161255993Smarkj    BTBYTE (o_delay_lo);	/* 98, 99,9a,9b */
162255993Smarkj    BTBYTE (o_hactive_lo);	/* 9c, 9d,9e,9f */
163255993Smarkj    BTBYTE (o_hscale_hi);	/* a0, a1,a2,a3 */
164255993Smarkj    BTBYTE (o_hscale_lo);	/* a4, a5,a6,a7 */
165255993Smarkj    int		:32;		/* a8, a9,aa,ab */
166255993Smarkj    BTBYTE (o_control);		/* ac, ad,ae,af */
167255993Smarkj#define BT848_O_CONTROL_LNOTCH		(1<<7)
168255993Smarkj#define BT848_O_CONTROL_COMP		(1<<6)
169255993Smarkj#define BT848_O_CONTROL_LDEC		(1<<5)
170255993Smarkj#define BT848_O_CONTROL_CBSENSE		(1<<4)
171255993Smarkj#define BT848_O_CONTROL_RSVD		(1<<3)
172255993Smarkj#define BT848_O_CONTROL_CON_MSB		(1<<2)
173255993Smarkj#define BT848_O_CONTROL_SAT_U_MSB	(1<<1)
174255993Smarkj#define BT848_O_CONTROL_SAT_V_MSB	(1<<0)
175255993Smarkj    u_char	fillter1[16];
176255993Smarkj    BTBYTE (o_scloop);		/* c0, c1,c2,c3 */
177266082Smarkj#define BT848_O_SCLOOP_RSVD1		(1<<7)
178254889Smarkj#define BT848_O_SCLOOP_CAGC		(1<<6)
179254889Smarkj#define BT848_O_SCLOOP_CKILL		(1<<5)
180255604Smarkj#define BT848_O_SCLOOP_HFILT		(0x3<<3)
181254889Smarkj#define BT848_O_SCLOOP_HFILT_ICON	(0x3<<3)
182254889Smarkj#define BT848_O_SCLOOP_HFILT_QCIF	(0x2<<3)
183254889Smarkj#define BT848_O_SCLOOP_HFILT_CIF	(0x1<<3)
184254889Smarkj#define BT848_O_SCLOOP_HFILT_AUTO	(0x0<<3)
185266082Smarkj#define BT848_O_SCLOOP_RSVD0		(0x7<<0)
186254889Smarkj    int		:32;		/* c4, c5,c6,c7 */
187254889Smarkj    int		:32;		/* c8, c9,ca,cb */
188254889Smarkj    BTBYTE (o_vscale_hi);	/* cc, cd,ce,cf */
189254889Smarkj    BTBYTE (o_vscale_lo);	/* d0, d1,d2,d3 */
190254889Smarkj    BTBYTE (color_fmt);		/* d4, d5,d6,d7 */
191254889Smarkj    bregister_t color_ctl_swap		:4; /* d8 */
192254889Smarkj#define BT848_COLOR_CTL_WSWAP_ODD	(1<<3)
193254889Smarkj#define BT848_COLOR_CTL_WSWAP_EVEN	(1<<2)
194254889Smarkj#define BT848_COLOR_CTL_BSWAP_ODD	(1<<1)
195254889Smarkj#define BT848_COLOR_CTL_BSWAP_EVEN	(1<<0)
196254889Smarkj    bregister_t color_ctl_gamma		:1;
197254889Smarkj    bregister_t color_ctl_rgb_ded	:1;
198254889Smarkj    bregister_t color_ctl_color_bars	:1;
199254889Smarkj    bregister_t color_ctl_ext_frmrate	:1;
200254889Smarkj    int		:24;		/* d9,da,db */
201254889Smarkj    BTBYTE (cap_ctl);		/* dc, dd,de,df */
202296335Sgnn#define BT848_CAP_CTL_DITH_FRAME	(1<<4)
203254889Smarkj#define BT848_CAP_CTL_VBI_ODD		(1<<3)
204287759Sgnn#define BT848_CAP_CTL_VBI_EVEN		(1<<2)
205254889Smarkj#define BT848_CAP_CTL_ODD		(1<<1)
206254889Smarkj#define BT848_CAP_CTL_EVEN		(1<<0)
207254889Smarkj    BTBYTE (vbi_pack_size);	/* e0, e1,e2,e3 */
208254889Smarkj    BTBYTE (vbi_pack_del);	/* e4, e5,e6,e7 */
209254889Smarkj    int		:32;		/* e8, e9,ea,eb */
210287759Sgnn    BTBYTE (o_vtc);		/* ec, ed,ee,ef */
211287759Sgnn    BTBYTE (pll_f_lo);		/* f0, f1,f2,f3 */
212296335Sgnn    BTBYTE (pll_f_hi);		/* f4, f5,f6,f7 */
213254889Smarkj    BTBYTE (pll_f_xci);		/* f8, f9,fa,fb */
214287759Sgnn#define BT848_PLL_F_C			(1<<6)
215254889Smarkj#define BT848_PLL_F_X			(1<<7)
216254889Smarkj    u_char	filler2[0x100-0xfc];
217254889Smarkj    BTLONG (int_stat);		/* 100, 101,102,103 */
218296335Sgnn    BTLONG (int_mask);		/* 104, 105,106,107 */
219254889Smarkj#define BT848_INT_RISCS			(0xf<<28)
220254889Smarkj#define BT848_INT_RISC_EN		(1<<27)
221273370Smarkj#define BT848_INT_RACK			(1<<25)
222254889Smarkj#define BT848_INT_FIELD			(1<<24)
223255993Smarkj#define BT848_INT_MYSTERYBIT		(1<<23)
224273293Sgnn#define BT848_INT_SCERR			(1<<19)
225287759Sgnn#define BT848_INT_OCERR			(1<<18)
226287759Sgnn#define BT848_INT_PABORT		(1<<17)
227296335Sgnn#define BT848_INT_RIPERR		(1<<16)
228296335Sgnn#define BT848_INT_PPERR			(1<<15)
229296335Sgnn#define BT848_INT_FDSR			(1<<14)
230296335Sgnn#define BT848_INT_FTRGT			(1<<13)
231254889Smarkj#define BT848_INT_FBUS			(1<<12)
232254889Smarkj#define BT848_INT_RISCI			(1<<11)
233266082Smarkj#define BT848_INT_GPINT			(1<<9)
234254889Smarkj#define BT848_INT_I2CDONE		(1<<8)
235254889Smarkj#define BT848_INT_RSV1			(1<<7)
236254889Smarkj#define BT848_INT_RSV0			(1<<6)
237254889Smarkj#define BT848_INT_VPRES			(1<<5)
238254889Smarkj#define BT848_INT_HLOCK			(1<<4)
239254889Smarkj#define BT848_INT_OFLOW			(1<<3)
240254889Smarkj#define BT848_INT_HSYNC			(1<<2)
241254889Smarkj#define BT848_INT_VSYNC			(1<<1)
242254889Smarkj#define BT848_INT_FMTCHG		(1<<0)
243254889Smarkj    int		:32;		/* 108, 109,10a,10b */
244254889Smarkj    BTWORD (gpio_dma_ctl);	/* 10c, 10d,10e,10f */
245254889Smarkj#define BT848_DMA_CTL_PL23TP4		(0<<6)	/* planar1 trigger 4 */
246254889Smarkj#define BT848_DMA_CTL_PL23TP8		(1<<6)	/* planar1 trigger 8 */
247255993Smarkj#define BT848_DMA_CTL_PL23TP16		(2<<6)	/* planar1 trigger 16 */
248255993Smarkj#define BT848_DMA_CTL_PL23TP32		(3<<6)	/* planar1 trigger 32 */
249255993Smarkj#define BT848_DMA_CTL_PL1TP4		(0<<4)	/* planar1 trigger 4 */
250255993Smarkj#define BT848_DMA_CTL_PL1TP8		(1<<4)	/* planar1 trigger 8 */
251255993Smarkj#define BT848_DMA_CTL_PL1TP16		(2<<4)	/* planar1 trigger 16 */
252266082Smarkj#define BT848_DMA_CTL_PL1TP32		(3<<4)	/* planar1 trigger 32 */
253255993Smarkj#define BT848_DMA_CTL_PKTP4		(0<<2)	/* packed trigger 4 */
254255993Smarkj#define BT848_DMA_CTL_PKTP8		(1<<2)	/* packed trigger 8 */
255255993Smarkj#define BT848_DMA_CTL_PKTP16		(2<<2)	/* packed trigger 16 */
256255993Smarkj#define BT848_DMA_CTL_PKTP32		(3<<2)	/* packed trigger 32 */
257255993Smarkj#define BT848_DMA_CTL_RISC_EN		(1<<1)
258255993Smarkj#define BT848_DMA_CTL_FIFO_EN		(1<<0)
259255993Smarkj    BTLONG (i2c_data_ctl);	/* 110, 111,112,113 */
260255993Smarkj#define BT848_DATA_CTL_I2CDIV		(0xf<<4)
261255993Smarkj#define BT848_DATA_CTL_I2CSYNC		(1<<3)
262255993Smarkj#define BT848_DATA_CTL_I2CW3B		(1<<2)
263255993Smarkj#define BT848_DATA_CTL_I2CSCL		(1<<1)
264255993Smarkj#define BT848_DATA_CTL_I2CSDA		(1<<0)
265255993Smarkj    BTLONG (risc_strt_add);	/* 114, 115,116,117 */
266266082Smarkj    BTLONG (gpio_out_en);	/* 118, 119,11a,11b */	/* really 24 bits */
267254889Smarkj    BTLONG (gpio_reg_inp);	/* 11c, 11d,11e,11f */	/* really 24 bits */
268254889Smarkj    BTLONG (risc_count);	/* 120, 121,122,123 */
269254889Smarkj    u_char	filler3[0x200-0x124];
270287759Sgnn    BTLONG (gpio_data);		/* 200, 201,202,203 */	/* really 24 bits */
271287759Sgnn};
272287759Sgnn
273287759Sgnntypedef volatile struct bt848_registers* bt848_ptr_t;
274287759Sgnn
275287759Sgnn
276287759Sgnn#if 0
277287759Sgnn/* force people to be aware of the new struct */
278287759Sgnn
279287759Sgnn#define BKTR_DSTATUS			0x000
280287759Sgnn#define BKTR_IFORM			0x004
281287759Sgnn#define BKTR_TDEC			0x008
282287759Sgnn#define BKTR_EVEN_CROP			0x00C
283287759Sgnn#define BKTR_ODD_CROP			0x08C
284287759Sgnn#define BKTR_E_VDELAY_LO		0x010
285287759Sgnn#define BKTR_O_VDELAY_LO		0x090
286287759Sgnn#define BKTR_E_VACTIVE_LO		0x014
287287759Sgnn#define BKTR_O_VACTIVE_LO		0x094
288287759Sgnn#define BKTR_E_DELAY_LO			0x018
289287759Sgnn#define BKTR_O_DELAY_LO			0x098
290287759Sgnn#define BKTR_E_HACTIVE_LO		0x01C
291287759Sgnn#define BKTR_O_HACTIVE_LO		0x09C
292287759Sgnn#define BKTR_E_HSCALE_HI		0x020
293287759Sgnn#define BKTR_O_HSCALE_HI		0x0A0
294287759Sgnn#define BKTR_E_HSCALE_LO		0x024
295287759Sgnn#define BKTR_O_HSCALE_LO		0x0A4
296287759Sgnn#define BKTR_BRIGHT			0x028
297287759Sgnn#define BKTR_E_CONTROL			0x02C
298287759Sgnn#define BKTR_O_CONTROL			0x0AC
299287759Sgnn#define BKTR_CONTRAST_LO		0x030
300287759Sgnn#define BKTR_SAT_U_LO			0x034
301287759Sgnn#define BKTR_SAT_V_LO			0x038
302287759Sgnn#define BKTR_HUE			0x03C
303287759Sgnn#define BKTR_E_SCLOOP			0x040
304287759Sgnn#define BKTR_O_SCLOOP			0x0C0
305287759Sgnn#define BKTR_OFORM			0x048
306287759Sgnn#define BKTR_E_VSCALE_HI		0x04C
307287759Sgnn#define BKTR_O_VSCALE_HI		0x0CC
308287759Sgnn#define BKTR_E_VSCALE_LO		0x050
309287759Sgnn#define BKTR_O_VSCALE_LO		0x0D0
310287759Sgnn#define BKTR_TEST			0x054
311287759Sgnn#define BKTR_ADELAY			0x060
312287759Sgnn#define BKTR_BDELAY			0x064
313287759Sgnn#define BKTR_ADC			0x068
314287759Sgnn#define BKTR_E_VTC			0x06C
315287759Sgnn#define BKTR_O_VTC			0x0EC
316287759Sgnn#define BKTR_SRESET			0x07C
317287759Sgnn#define BKTR_COLOR_FMT			0x0D4
318287759Sgnn#define BKTR_COLOR_CTL			0x0D8
319287759Sgnn#define BKTR_CAP_CTL			0x0DC
320287759Sgnn#define BKTR_VBI_PACK_SIZE		0x0E0
321287759Sgnn#define BKTR_VBI_PACK_DEL		0x0E4
322287759Sgnn#define BKTR_INT_STAT			0x100
323287759Sgnn#define BKTR_INT_MASK			0x104
324287759Sgnn#define BKTR_RISC_COUNT			0x120
325287759Sgnn#define BKTR_RISC_STRT_ADD		0x114
326287759Sgnn#define BKTR_GPIO_DMA_CTL		0x10C
327287759Sgnn#define BKTR_GPIO_OUT_EN		0x118
328287759Sgnn#define BKTR_GPIO_REG_INP		0x11C
329287759Sgnn#define BKTR_GPIO_DATA			0x200
330287759Sgnn#define BKTR_I2C_CONTROL		0x110
331287759Sgnn
332287759Sgnn#endif /* 0 */
333287759Sgnn
334287759Sgnn/*
335287759Sgnn * device support for onboard tv tuners
336287759Sgnn */
337287759Sgnn
338287759Sgnn/* description of the LOGICAL tuner */
339287759Sgnnstruct TVTUNER {
340287759Sgnn	int		frequency;
341287759Sgnn	u_char		chnlset;
342287759Sgnn	u_char		channel;
343287759Sgnn	u_char		band;
344287759Sgnn	u_char		afc;
345287759Sgnn 	u_char		radio_mode;	/* current mode of the radio mode */
346287759Sgnn};
347287759Sgnn
348287759Sgnn/* description of the PHYSICAL tuner */
349287759Sgnnstruct TUNER {
350287759Sgnn	char*		name;
351287759Sgnn	u_char		type;
352287759Sgnn	u_char		pllControl[4];
353287759Sgnn	u_char		bandLimits[ 2 ];
354287759Sgnn	u_char		bandAddrs[ 4 ];        /* 3 first for the 3 TV
355287759Sgnn					       ** bands. Last for radio
356287759Sgnn					       ** band (0x00=NoRadio).
357287759Sgnn					       */
358287759Sgnn
359287759Sgnn};
360287759Sgnn
361287759Sgnn/* description of the card */
362287759Sgnn#define EEPROMBLOCKSIZE		32
363287759Sgnnstruct CARDTYPE {
364287759Sgnn	unsigned int		card_id;	/* card id (from #define's) */
365287759Sgnn	char*			name;
366287759Sgnn	const struct TUNER*	tuner;		/* Tuner details */
367287759Sgnn	u_char			tuner_pllAddr;	/* Tuner i2c address */
368287759Sgnn	u_char			dbx;		/* Has DBX chip? */
369287759Sgnn	u_char			msp3400c;	/* Has msp3400c chip? */
370287759Sgnn	u_char			dpl3518a;	/* Has dpl3518a chip? */
371287759Sgnn	u_char			eepromAddr;
372287759Sgnn	u_char			eepromSize;	/* bytes / EEPROMBLOCKSIZE */
373287759Sgnn	u_int			audiomuxs[ 5 ];	/* tuner, ext (line-in) */
374287759Sgnn						/* int/unused (radio) */
375287759Sgnn						/* mute, present */
376287759Sgnn	u_int			gpio_mux_bits;	/* GPIO mask for audio mux */
377287759Sgnn};
378287759Sgnn
379287759Sgnnstruct format_params {
380287759Sgnn  /* Total lines, lines before image, image lines */
381287759Sgnn  int vtotal, vdelay, vactive;
382287759Sgnn  /* Total unscaled horizontal pixels, pixels before image, image pixels */
383287759Sgnn  int htotal, hdelay, hactive;
384287759Sgnn  /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
385287759Sgnn  int  scaled_hactive, scaled_htotal;
386287759Sgnn  /* frame rate . for ntsc is 30 frames per second */
387287759Sgnn  int frame_rate;
388287759Sgnn  /* A-delay and B-delay */
389287759Sgnn  u_char adelay, bdelay;
390  /* Iform XTSEL value */
391  int iform_xtsel;
392  /* VBI number of lines per field, and number of samples per line */
393  int vbi_num_lines, vbi_num_samples;
394};
395
396#if ((defined(__FreeBSD__)) && (NSMBUS > 0))
397struct bktr_i2c_softc {
398	device_t iicbus;
399	device_t smbus;
400};
401#endif
402
403typedef struct bktr_clip bktr_clip_t;
404
405/*
406 * NetBSD >= 1.3H uses vaddr_t instead of vm_offset_t
407 */
408#if defined(__NetBSD__) && __NetBSD_Version__ >= 103080000
409typedef vaddr_t	vm_offset_t;
410#endif
411
412/*
413 * BrookTree 848  info structure, one per bt848 card installed.
414 */
415struct bktr_softc {
416
417#if defined (__bsdi__)
418    struct device bktr_dev;	/* base device */
419    struct isadev bktr_id;	/* ISA device */
420    struct intrhand bktr_ih;	/* interrupt vectoring */
421    #define pcici_t pci_devaddr_t
422#endif
423
424#if defined(__NetBSD__)
425    struct device bktr_dev;     /* base device */
426    bus_dma_tag_t	dmat;   /* DMA tag */
427    bus_space_tag_t	memt;
428    bus_space_handle_t	memh;
429    bus_size_t		obmemsz;        /* size of en card (bytes) */
430    void		*ih;
431    bus_dmamap_t	dm_prog;
432    bus_dmamap_t	dm_oprog;
433    bus_dmamap_t	dm_mem;
434    bus_dmamap_t	dm_vbidata;
435    bus_dmamap_t	dm_vbibuffer;
436#if __NetBSD_Version__ >= 103080000
437    paddr_t		phys_base;	/* Bt848 register physical address */
438#else
439    vm_offset_t		phys_base;	/* Bt848 register physical address */
440#endif
441#endif
442
443#if defined(__OpenBSD__)
444    struct device bktr_dev;     /* base device */
445    bus_dma_tag_t	dmat;   /* DMA tag */
446    bus_space_tag_t	memt;
447    bus_space_handle_t	memh;
448    bus_size_t		obmemsz;        /* size of en card (bytes) */
449    void		*ih;
450    bus_dmamap_t	dm_prog;
451    bus_dmamap_t	dm_oprog;
452    bus_dmamap_t	dm_mem;
453    bus_dmamap_t	dm_vbidata;
454    bus_dmamap_t	dm_vbibuffer;
455    size_t		dm_mapsize;
456    pci_chipset_tag_t	pc;	/* Opaque PCI chipset tag */
457    pcitag_t		tag;	/* PCI tag, for doing PCI commands */
458    vm_offset_t		phys_base;	/* Bt848 register physical address */
459#endif
460
461#if defined (__FreeBSD__)
462    #if (__FreeBSD_version < 400000)
463    vm_offset_t     phys_base;	/* 2.x Bt848 register physical address */
464    pcici_t         tag;	/* 2.x PCI tag, for doing PCI commands */
465    #endif
466    #if (__FreeBSD_version >= 400000)
467    struct resource *res_mem;	/* 4.x resource descriptor for registers */
468    struct resource *res_irq;	/* 4.x resource descriptor for interrupt */
469    void            *res_ih;	/* 4.x newbus interrupt handler cookie */
470    #endif
471    #if (NSMBUS > 0)
472      struct bktr_i2c_softc i2c_sc;	/* bt848_i2c device */
473    #endif
474#endif
475
476    /* the following definitions are common over all platforms */
477    bt848_ptr_t base;		/* Bt848 register physical address */
478    vm_offset_t bigbuf;		/* buffer that holds the captured image */
479    int		alloc_pages;	/* number of pages in bigbuf */
480
481    vm_offset_t vbidata;	/* RISC program puts VBI data from the current frame here */
482    vm_offset_t vbibuffer;	/* Circular buffer holding VBI data for the user */
483    int         vbiinsert;      /* Position for next write into circular buffer */
484    int         vbistart;       /* Position of last read from circular buffer */
485    int         vbisize;        /* Number of bytes in the circular buffer */
486    u_long	vbi_sequence_number;	/* sequence number for VBI */
487    int		vbi_read_blocked;	/* user process blocked on read() from /dev/vbi */
488    struct selinfo vbi_select;	/* Data used by select() on /dev/vbi */
489
490
491    struct proc	*proc;		/* process to receive raised signal */
492    int		signal;		/* signal to send to process */
493    int		clr_on_start;	/* clear cap buf on capture start? */
494#define	METEOR_SIG_MODE_MASK	0xffff0000
495#define	METEOR_SIG_FIELD_MODE	0x00010000
496#define	METEOR_SIG_FRAME_MODE	0x00000000
497    vm_offset_t  dma_prog;
498    vm_offset_t  odd_dma_prog;
499    char         dma_prog_loaded;
500    struct meteor_mem *mem;	/* used to control sync. multi-frame output */
501    u_long	synch_wait;	/* wait for free buffer before continuing */
502    short	current;	/* frame number in buffer (1-frames) */
503    short	rows;		/* number of rows in a frame */
504    short	cols;		/* number of columns in a frame */
505    int		capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
506    int		capture_area_y_offset; /* captured. The capture area allows for */
507    int		capture_area_x_size;   /* example 320x200 pixels from the centre */
508    int		capture_area_y_size;   /* of the video image to be captured. */
509    char	capture_area_enabled;  /* When TRUE use user's capture area. */
510    int		pixfmt;         /* active pixel format (idx into fmt tbl) */
511    int		pixfmt_compat;  /* Y/N - in meteor pix fmt compat mode */
512    u_long	format;		/* frame format rgb, yuv, etc.. */
513    short	frames;		/* number of frames allocated */
514    int		frame_size;	/* number of bytes in a frame */
515    u_long	fifo_errors;	/* number of fifo capture errors since open */
516    u_long	dma_errors;	/* number of DMA capture errors since open */
517    u_long	frames_captured;/* number of frames captured since open */
518    u_long	even_fields_captured; /* number of even fields captured */
519    u_long	odd_fields_captured; /* number of odd fields captured */
520    u_long	range_enable;	/* enable range checking ?? */
521    u_short     capcontrol;     /* reg 0xdc capture control */
522    u_short     bktr_cap_ctl;
523    volatile u_int	flags;
524#define	METEOR_INITALIZED	0x00000001
525#define	METEOR_OPEN		0x00000002
526#define	METEOR_MMAP		0x00000004
527#define	METEOR_INTR		0x00000008
528#define	METEOR_READ		0x00000010	/* XXX never gets referenced */
529#define	METEOR_SINGLE		0x00000020	/* get single frame */
530#define	METEOR_CONTIN		0x00000040	/* continuously get frames */
531#define	METEOR_SYNCAP		0x00000080	/* synchronously get frames */
532#define	METEOR_CAP_MASK		0x000000f0
533#define	METEOR_NTSC		0x00000100
534#define	METEOR_PAL		0x00000200
535#define	METEOR_SECAM		0x00000400
536#define	BROOKTREE_NTSC		0x00000100	/* used in video open() and */
537#define	BROOKTREE_PAL		0x00000200	/* in the kernel config */
538#define	BROOKTREE_SECAM		0x00000400	/* file */
539#define	METEOR_AUTOMODE		0x00000800
540#define	METEOR_FORM_MASK	0x00000f00
541#define	METEOR_DEV0		0x00001000
542#define	METEOR_DEV1		0x00002000
543#define	METEOR_DEV2		0x00004000
544#define	METEOR_DEV3		0x00008000
545#define METEOR_DEV_SVIDEO	0x00006000
546#define METEOR_DEV_RGB		0x0000a000
547#define	METEOR_DEV_MASK		0x0000f000
548#define	METEOR_RGB16		0x00010000
549#define	METEOR_RGB24		0x00020000
550#define	METEOR_YUV_PACKED	0x00040000
551#define	METEOR_YUV_PLANAR	0x00080000
552#define	METEOR_WANT_EVEN	0x00100000	/* want even frame */
553#define	METEOR_WANT_ODD		0x00200000	/* want odd frame */
554#define	METEOR_WANT_MASK	0x00300000
555#define METEOR_ONLY_EVEN_FIELDS	0x01000000
556#define METEOR_ONLY_ODD_FIELDS	0x02000000
557#define METEOR_ONLY_FIELDS_MASK 0x03000000
558#define METEOR_YUV_422		0x04000000
559#define	METEOR_OUTPUT_FMT_MASK	0x040f0000
560#define	METEOR_WANT_TS		0x08000000	/* time-stamp a frame */
561#define METEOR_RGB		0x20000000	/* meteor rgb unit */
562#define METEOR_FIELD_MODE	0x80000000
563    u_char	tflags;				/* Tuner flags (/dev/tuner) */
564#define	TUNER_INITALIZED	0x00000001
565#define	TUNER_OPEN		0x00000002
566    u_char      vbiflags;			/* VBI flags (/dev/vbi) */
567#define VBI_INITALIZED          0x00000001
568#define VBI_OPEN                0x00000002
569#define VBI_CAPTURE             0x00000004
570    u_short	fps;		/* frames per second */
571    struct meteor_video video;
572    struct TVTUNER	tuner;
573    struct CARDTYPE	card;
574    u_char		audio_mux_select;	/* current mode of the audio */
575    u_char		audio_mute_state;	/* mute state of the audio */
576    u_char		format_params;
577    u_long              current_sol;
578    u_long              current_col;
579    int                 clip_start;
580    int                 line_length;
581    int                 last_y;
582    int                 y;
583    int                 y2;
584    int                 yclip;
585    int                 yclip2;
586    int                 max_clip_node;
587    bktr_clip_t		clip_list[100];
588    int                 reverse_mute;
589    int                 bt848_tuner;
590    int                 bt848_card;
591    u_long              id;
592#define BT848_USE_XTALS 0
593#define BT848_USE_PLL   1
594    int			xtal_pll_mode;	/* Use XTAL or PLL mode for PAL/SECAM */
595    int			remote_control;      /* remote control detected */
596    int			remote_control_addr;   /* remote control i2c address */
597    char		msp_version_string[9]; /* MSP version string 34xxx-xx */
598    int			msp_addr;	       /* MSP i2c address */
599    char		dpl_version_string[9]; /* DPL version string 35xxx-xx */
600    int			dpl_addr;	       /* DPL i2c address */
601
602};
603
604typedef struct bktr_softc bktr_reg_t;
605typedef struct bktr_softc* bktr_ptr_t;
606
607#define Bt848_MAX_SIGN 16
608
609struct bt848_card_sig {
610  int card;
611  int tuner;
612  u_char signature[Bt848_MAX_SIGN];
613};
614