if_athioctl.h revision 232764
1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD: head/sys/dev/ath/if_athioctl.h 232764 2012-03-10 04:14:04Z adrian $ 30 */ 31 32/* 33 * Ioctl-related defintions for the Atheros Wireless LAN controller driver. 34 */ 35#ifndef _DEV_ATH_ATHIOCTL_H 36#define _DEV_ATH_ATHIOCTL_H 37 38struct ath_tx_aggr_stats { 39 u_int32_t aggr_pkts[64]; 40 u_int32_t aggr_single_pkt; 41 u_int32_t aggr_nonbaw_pkt; 42 u_int32_t aggr_aggr_pkt; 43 u_int32_t aggr_baw_closed_single_pkt; 44 u_int32_t aggr_low_hwq_single_pkt; 45 u_int32_t aggr_sched_nopkt; 46}; 47 48struct ath_stats { 49 u_int32_t ast_watchdog; /* device reset by watchdog */ 50 u_int32_t ast_hardware; /* fatal hardware error interrupts */ 51 u_int32_t ast_bmiss; /* beacon miss interrupts */ 52 u_int32_t ast_bmiss_phantom;/* beacon miss interrupts */ 53 u_int32_t ast_bstuck; /* beacon stuck interrupts */ 54 u_int32_t ast_rxorn; /* rx overrun interrupts */ 55 u_int32_t ast_rxeol; /* rx eol interrupts */ 56 u_int32_t ast_txurn; /* tx underrun interrupts */ 57 u_int32_t ast_mib; /* mib interrupts */ 58 u_int32_t ast_intrcoal; /* interrupts coalesced */ 59 u_int32_t ast_tx_packets; /* packet sent on the interface */ 60 u_int32_t ast_tx_mgmt; /* management frames transmitted */ 61 u_int32_t ast_tx_discard; /* frames discarded prior to assoc */ 62 u_int32_t ast_tx_qstop; /* output stopped 'cuz no buffer */ 63 u_int32_t ast_tx_encap; /* tx encapsulation failed */ 64 u_int32_t ast_tx_nonode; /* tx failed 'cuz no node */ 65 u_int32_t ast_tx_nombuf; /* tx failed 'cuz no mbuf */ 66 u_int32_t ast_tx_nomcl; /* tx failed 'cuz no cluster */ 67 u_int32_t ast_tx_linear; /* tx linearized to cluster */ 68 u_int32_t ast_tx_nodata; /* tx discarded empty frame */ 69 u_int32_t ast_tx_busdma; /* tx failed for dma resrcs */ 70 u_int32_t ast_tx_xretries;/* tx failed 'cuz too many retries */ 71 u_int32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */ 72 u_int32_t ast_tx_filtered;/* tx failed 'cuz xmit filtered */ 73 u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */ 74 u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */ 75 u_int32_t ast_tx_badrate; /* tx failed 'cuz bogus xmit rate */ 76 u_int32_t ast_tx_noack; /* tx frames with no ack marked */ 77 u_int32_t ast_tx_rts; /* tx frames with rts enabled */ 78 u_int32_t ast_tx_cts; /* tx frames with cts enabled */ 79 u_int32_t ast_tx_shortpre;/* tx frames with short preamble */ 80 u_int32_t ast_tx_altrate; /* tx frames with alternate rate */ 81 u_int32_t ast_tx_protect; /* tx frames with protection */ 82 u_int32_t ast_tx_ctsburst;/* tx frames with cts and bursting */ 83 u_int32_t ast_tx_ctsext; /* tx frames with cts extension */ 84 u_int32_t ast_rx_nombuf; /* rx setup failed 'cuz no mbuf */ 85 u_int32_t ast_rx_busdma; /* rx setup failed for dma resrcs */ 86 u_int32_t ast_rx_orn; /* rx failed 'cuz of desc overrun */ 87 u_int32_t ast_rx_crcerr; /* rx failed 'cuz of bad CRC */ 88 u_int32_t ast_rx_fifoerr; /* rx failed 'cuz of FIFO overrun */ 89 u_int32_t ast_rx_badcrypt;/* rx failed 'cuz decryption */ 90 u_int32_t ast_rx_badmic; /* rx failed 'cuz MIC failure */ 91 u_int32_t ast_rx_phyerr; /* rx failed 'cuz of PHY err */ 92 u_int32_t ast_rx_phy[64]; /* rx PHY error per-code counts */ 93 u_int32_t ast_rx_tooshort;/* rx discarded 'cuz frame too short */ 94 u_int32_t ast_rx_toobig; /* rx discarded 'cuz frame too large */ 95 u_int32_t ast_rx_packets; /* packet recv on the interface */ 96 u_int32_t ast_rx_mgt; /* management frames received */ 97 u_int32_t ast_rx_ctl; /* rx discarded 'cuz ctl frame */ 98 int8_t ast_tx_rssi; /* tx rssi of last ack */ 99 int8_t ast_rx_rssi; /* rx rssi from histogram */ 100 u_int8_t ast_tx_rate; /* IEEE rate of last unicast tx */ 101 u_int32_t ast_be_xmit; /* beacons transmitted */ 102 u_int32_t ast_be_nombuf; /* beacon setup failed 'cuz no mbuf */ 103 u_int32_t ast_per_cal; /* periodic calibration calls */ 104 u_int32_t ast_per_calfail;/* periodic calibration failed */ 105 u_int32_t ast_per_rfgain; /* periodic calibration rfgain reset */ 106 u_int32_t ast_rate_calls; /* rate control checks */ 107 u_int32_t ast_rate_raise; /* rate control raised xmit rate */ 108 u_int32_t ast_rate_drop; /* rate control dropped xmit rate */ 109 u_int32_t ast_ant_defswitch;/* rx/default antenna switches */ 110 u_int32_t ast_ant_txswitch;/* tx antenna switches */ 111 u_int32_t ast_ant_rx[8]; /* rx frames with antenna */ 112 u_int32_t ast_ant_tx[8]; /* tx frames with antenna */ 113 u_int32_t ast_cabq_xmit; /* cabq frames transmitted */ 114 u_int32_t ast_cabq_busy; /* cabq found busy */ 115 u_int32_t ast_tx_raw; /* tx frames through raw api */ 116 u_int32_t ast_ff_txok; /* fast frames tx'd successfully */ 117 u_int32_t ast_ff_txerr; /* fast frames tx'd w/ error */ 118 u_int32_t ast_ff_rx; /* fast frames rx'd */ 119 u_int32_t ast_ff_flush; /* fast frames flushed from staging q */ 120 u_int32_t ast_tx_qfull; /* tx dropped 'cuz of queue limit */ 121 int8_t ast_rx_noise; /* rx noise floor */ 122 u_int32_t ast_tx_nobuf; /* tx dropped 'cuz no ath buffer */ 123 u_int32_t ast_tdma_update;/* TDMA slot timing updates */ 124 u_int32_t ast_tdma_timers;/* TDMA slot update set beacon timers */ 125 u_int32_t ast_tdma_tsf; /* TDMA slot update set TSF */ 126 u_int16_t ast_tdma_tsfadjp;/* TDMA slot adjust+ (usec, smoothed)*/ 127 u_int16_t ast_tdma_tsfadjm;/* TDMA slot adjust- (usec, smoothed)*/ 128 u_int32_t ast_tdma_ack; /* TDMA tx failed 'cuz ACK required */ 129 u_int32_t ast_tx_raw_fail;/* raw tx failed 'cuz h/w down */ 130 u_int32_t ast_tx_nofrag; /* tx dropped 'cuz no ath frag buffer */ 131 u_int32_t ast_be_missed; /* missed beacons */ 132 u_int32_t ast_ani_cal; /* ANI calibrations performed */ 133 u_int32_t ast_rx_agg; /* number of aggregate frames RX'ed */ 134 u_int32_t ast_rx_halfgi; /* RX half-GI */ 135 u_int32_t ast_rx_2040; /* RX 40mhz frame */ 136 u_int32_t ast_rx_pre_crc_err; /* RX pre-delimiter CRC error */ 137 u_int32_t ast_rx_post_crc_err; /* RX post-delimiter CRC error */ 138 u_int32_t ast_rx_decrypt_busy_err; /* RX decrypt engine busy error */ 139 u_int32_t ast_rx_hi_rx_chain; 140 u_int32_t ast_tx_htprotect; /* HT tx frames with protection */ 141 u_int32_t ast_rx_hitqueueend; /* RX hit descr queue end */ 142 u_int32_t ast_tx_timeout; /* Global TX timeout */ 143 u_int32_t ast_tx_cst; /* Carrier sense timeout */ 144 u_int32_t ast_tx_xtxop; /* tx exceeded TXOP */ 145 u_int32_t ast_tx_timerexpired; /* tx exceeded TX_TIMER */ 146 u_int32_t ast_tx_desccfgerr; /* tx desc cfg error */ 147 u_int32_t ast_tx_swretries; /* software TX retries */ 148 u_int32_t ast_tx_swretrymax; /* software TX retry max limit reach */ 149 u_int32_t ast_tx_data_underrun; 150 u_int32_t ast_tx_delim_underrun; 151 u_int32_t ast_tx_aggr_failall; /* aggregate TX failed in its entirety */ 152 u_int32_t ast_tx_getnobuf; 153 u_int32_t ast_tx_getbusybuf; 154 u_int32_t ast_tx_intr; 155 u_int32_t ast_rx_intr; 156 u_int32_t ast_tx_aggr_ok; /* aggregate TX ok */ 157 u_int32_t ast_tx_aggr_fail; /* aggregate TX failed */ 158 u_int32_t ast_tx_mcastq_overflow; /* multicast queue overflow */ 159 u_int32_t ast_pad[1]; 160}; 161 162#define SIOCGATHSTATS _IOWR('i', 137, struct ifreq) 163#define SIOCZATHSTATS _IOWR('i', 139, struct ifreq) 164 165struct ath_diag { 166 char ad_name[IFNAMSIZ]; /* if name, e.g. "ath0" */ 167 u_int16_t ad_id; 168#define ATH_DIAG_DYN 0x8000 /* allocate buffer in caller */ 169#define ATH_DIAG_IN 0x4000 /* copy in parameters */ 170#define ATH_DIAG_OUT 0x0000 /* copy out results (always) */ 171#define ATH_DIAG_ID 0x0fff 172 u_int16_t ad_in_size; /* pack to fit, yech */ 173 caddr_t ad_in_data; 174 caddr_t ad_out_data; 175 u_int ad_out_size; 176 177}; 178#define SIOCGATHDIAG _IOWR('i', 138, struct ath_diag) 179#define SIOCGATHPHYERR _IOWR('i', 140, struct ath_diag) 180 181/* 182 * Radio capture format. 183 */ 184#define ATH_RX_RADIOTAP_PRESENT ( \ 185 (1 << IEEE80211_RADIOTAP_TSFT) | \ 186 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 187 (1 << IEEE80211_RADIOTAP_RATE) | \ 188 (1 << IEEE80211_RADIOTAP_ANTENNA) | \ 189 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ 190 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \ 191 (1 << IEEE80211_RADIOTAP_XCHANNEL) | \ 192 0) 193 194struct ath_rx_radiotap_header { 195 struct ieee80211_radiotap_header wr_ihdr; 196 u_int64_t wr_tsf; 197 u_int8_t wr_flags; 198 u_int8_t wr_rate; 199 int8_t wr_antsignal; 200 int8_t wr_antnoise; 201 u_int8_t wr_antenna; 202 u_int8_t wr_pad[3]; 203 u_int32_t wr_chan_flags; 204 u_int16_t wr_chan_freq; 205 u_int8_t wr_chan_ieee; 206 int8_t wr_chan_maxpow; 207} __packed; 208 209#define ATH_TX_RADIOTAP_PRESENT ( \ 210 (1 << IEEE80211_RADIOTAP_TSFT) | \ 211 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 212 (1 << IEEE80211_RADIOTAP_RATE) | \ 213 (1 << IEEE80211_RADIOTAP_DBM_TX_POWER) | \ 214 (1 << IEEE80211_RADIOTAP_ANTENNA) | \ 215 (1 << IEEE80211_RADIOTAP_XCHANNEL) | \ 216 0) 217 218struct ath_tx_radiotap_header { 219 struct ieee80211_radiotap_header wt_ihdr; 220 u_int64_t wt_tsf; 221 u_int8_t wt_flags; 222 u_int8_t wt_rate; 223 u_int8_t wt_txpower; 224 u_int8_t wt_antenna; 225 u_int32_t wt_chan_flags; 226 u_int16_t wt_chan_freq; 227 u_int8_t wt_chan_ieee; 228 int8_t wt_chan_maxpow; 229} __packed; 230 231/* 232 * DFS ioctl commands 233 */ 234 235#define DFS_SET_THRESH 2 236#define DFS_GET_THRESH 3 237#define DFS_RADARDETECTS 6 238 239/* 240 * DFS ioctl parameter types 241 */ 242#define DFS_PARAM_FIRPWR 1 243#define DFS_PARAM_RRSSI 2 244#define DFS_PARAM_HEIGHT 3 245#define DFS_PARAM_PRSSI 4 246#define DFS_PARAM_INBAND 5 247#define DFS_PARAM_NOL 6 /* XXX not used in FreeBSD */ 248#define DFS_PARAM_RELSTEP_EN 7 249#define DFS_PARAM_RELSTEP 8 250#define DFS_PARAM_RELPWR_EN 9 251#define DFS_PARAM_RELPWR 10 252#define DFS_PARAM_MAXLEN 11 253#define DFS_PARAM_USEFIR128 12 254#define DFS_PARAM_BLOCKRADAR 13 255#define DFS_PARAM_MAXRSSI_EN 14 256 257/* FreeBSD-specific start at 32 */ 258#define DFS_PARAM_ENABLE 32 259#define DFS_PARAM_EN_EXTCH 33 260 261#endif /* _DEV_ATH_ATHIOCTL_H */ 262