ar9160_attach.c revision 219979
1185377Ssam/* 2185377Ssam * Copyright (c) 2008 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2008 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17188971Ssam * $FreeBSD: head/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c 219979 2011-03-25 00:40:08Z adrian $ 18185377Ssam */ 19185377Ssam#include "opt_ah.h" 20185377Ssam 21185377Ssam#include "ah.h" 22185377Ssam#include "ah_internal.h" 23185377Ssam#include "ah_devid.h" 24185377Ssam 25185377Ssam#include "ar5416/ar5416.h" 26185377Ssam#include "ar5416/ar5416reg.h" 27185377Ssam#include "ar5416/ar5416phy.h" 28185377Ssam 29217631Sadrian#include "ar9001/ar9160.ini" 30185377Ssam 31185377Ssamstatic const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */ 32185377Ssam .calName = "IQ", .calType = IQ_MISMATCH_CAL, 33185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 34185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 35185377Ssam .calCollect = ar5416IQCalCollect, 36185377Ssam .calPostProc = ar5416IQCalibration 37185377Ssam}; 38185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */ 39185377Ssam .calName = "ADC Gain", .calType = ADC_GAIN_CAL, 40185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 41185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 42185377Ssam .calCollect = ar5416AdcGainCalCollect, 43185377Ssam .calPostProc = ar5416AdcGainCalibration 44185377Ssam}; 45185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */ 46185377Ssam .calName = "ADC DC", .calType = ADC_DC_CAL, 47185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 48185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 49185377Ssam .calCollect = ar5416AdcDcCalCollect, 50185377Ssam .calPostProc = ar5416AdcDcCalibration 51185377Ssam}; 52185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_init_dc_cal = { 53185377Ssam .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL, 54185377Ssam .calNumSamples = MIN_CAL_SAMPLES, 55185377Ssam .calCountMax = INIT_LOG_COUNT, 56185377Ssam .calCollect = ar5416AdcDcCalCollect, 57185377Ssam .calPostProc = ar5416AdcDcCalibration 58185377Ssam}; 59185377Ssam 60185377Ssamstatic HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah); 61185377Ssam 62185377Ssamstatic void 63185377Ssamar9160AniSetup(struct ath_hal *ah) 64185377Ssam{ 65185377Ssam static const struct ar5212AniParams aniparams = { 66185377Ssam .maxNoiseImmunityLevel = 4, /* levels 0..4 */ 67185377Ssam .totalSizeDesired = { -55, -55, -55, -55, -62 }, 68185377Ssam .coarseHigh = { -14, -14, -14, -14, -12 }, 69185377Ssam .coarseLow = { -64, -64, -64, -64, -70 }, 70185377Ssam .firpwr = { -78, -78, -78, -78, -80 }, 71185377Ssam .maxSpurImmunityLevel = 2, 72185377Ssam .cycPwrThr1 = { 2, 4, 6 }, 73185377Ssam .maxFirstepLevel = 2, /* levels 0..2 */ 74185377Ssam .firstep = { 0, 4, 8 }, 75185377Ssam .ofdmTrigHigh = 500, 76185377Ssam .ofdmTrigLow = 200, 77185377Ssam .cckTrigHigh = 200, 78185377Ssam .cckTrigLow = 100, 79185377Ssam .rssiThrHigh = 40, 80185377Ssam .rssiThrLow = 7, 81185377Ssam .period = 100, 82185377Ssam }; 83219979Sadrian 84219979Sadrian /* NB: disable ANI noise immmunity for reliable RIFS rx */ 85219979Sadrian AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; 86219979Sadrian ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); 87185377Ssam} 88185377Ssam 89185377Ssam/* 90185377Ssam * Attach for an AR9160 part. 91185377Ssam */ 92188972Ssamstatic struct ath_hal * 93185377Ssamar9160Attach(uint16_t devid, HAL_SOFTC sc, 94217624Sadrian HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 95217624Sadrian HAL_STATUS *status) 96185377Ssam{ 97185377Ssam struct ath_hal_5416 *ahp5416; 98185377Ssam struct ath_hal_5212 *ahp; 99185377Ssam struct ath_hal *ah; 100185377Ssam uint32_t val; 101185377Ssam HAL_STATUS ecode; 102185377Ssam HAL_BOOL rfStatus; 103185377Ssam 104185377Ssam HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 105185377Ssam __func__, sc, (void*) st, (void*) sh); 106185377Ssam 107185377Ssam /* NB: memory is returned zero'd */ 108185377Ssam ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416)); 109185377Ssam if (ahp5416 == AH_NULL) { 110185377Ssam HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 111185377Ssam "%s: cannot allocate memory for state block\n", __func__); 112185377Ssam *status = HAL_ENOMEM; 113185377Ssam return AH_NULL; 114185377Ssam } 115185377Ssam ar5416InitState(ahp5416, devid, sc, st, sh, status); 116185377Ssam ahp = &ahp5416->ah_5212; 117185377Ssam ah = &ahp->ah_priv.h; 118185377Ssam 119185377Ssam /* XXX override with 9160 specific state */ 120185377Ssam /* override 5416 methods for our needs */ 121185377Ssam 122185380Ssam AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal; 123185380Ssam AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal; 124185380Ssam AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal; 125185380Ssam AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal; 126185380Ssam AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL; 127185377Ssam 128185377Ssam if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { 129185377Ssam /* reset chip */ 130185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", 131185377Ssam __func__); 132185377Ssam ecode = HAL_EIO; 133185377Ssam goto bad; 134185377Ssam } 135185377Ssam 136185377Ssam if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { 137185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", 138185377Ssam __func__); 139185377Ssam ecode = HAL_EIO; 140185377Ssam goto bad; 141185377Ssam } 142185377Ssam /* Read Revisions from Chips before taking out of reset */ 143185377Ssam val = OS_REG_READ(ah, AR_SREV); 144185377Ssam HALDEBUG(ah, HAL_DEBUG_ATTACH, 145185377Ssam "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n", 146185377Ssam __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION), 147185377Ssam MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION)); 148185377Ssam /* NB: include chip type to differentiate from pre-Sowl versions */ 149185377Ssam AH_PRIVATE(ah)->ah_macVersion = 150185377Ssam (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S; 151185377Ssam AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); 152188979Ssam AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; 153185377Ssam 154185377Ssam /* setup common ini data; rf backends handle remainder */ 155185377Ssam HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6); 156185377Ssam HAL_INI_INIT(&ahp->ah_ini_common, ar9160Common, 2); 157185377Ssam 158185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3); 159185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2); 160185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2); 161185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2); 162185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3); 163185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6, 3); 164185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2); 165185377Ssam if (AR_SREV_SOWL_11(ah)) 166185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2); 167185377Ssam else 168185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2); 169185377Ssam 170188973Ssam ecode = ath_hal_v14EepromAttach(ah); 171188973Ssam if (ecode != HAL_OK) 172188973Ssam goto bad; 173188973Ssam 174188979Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2); 175188979Ssam ar5416AttachPCIE(ah); 176188979Ssam 177185377Ssam if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */ 178185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 179185377Ssam ecode = HAL_EIO; 180185377Ssam goto bad; 181185377Ssam } 182185377Ssam 183185377Ssam AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 184185377Ssam 185185377Ssam if (!ar5212ChipTest(ah)) { 186185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 187185377Ssam __func__); 188185377Ssam ecode = HAL_ESELFTEST; 189185377Ssam goto bad; 190185377Ssam } 191185377Ssam 192185377Ssam /* 193185377Ssam * Set correct Baseband to analog shift 194185377Ssam * setting to access analog chips. 195185377Ssam */ 196185377Ssam OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 197185377Ssam 198185377Ssam /* Read Radio Chip Rev Extract */ 199188971Ssam AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); 200185377Ssam switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { 201185377Ssam case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */ 202185377Ssam case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */ 203185377Ssam break; 204185377Ssam default: 205185377Ssam if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { 206185377Ssam AH_PRIVATE(ah)->ah_analog5GhzRev = 207185377Ssam AR_RAD5133_SREV_MAJOR; 208185377Ssam break; 209185377Ssam } 210185377Ssam#ifdef AH_DEBUG 211185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 212185377Ssam "%s: 5G Radio Chip Rev 0x%02X is not supported by " 213185377Ssam "this driver\n", __func__, 214185377Ssam AH_PRIVATE(ah)->ah_analog5GhzRev); 215185377Ssam ecode = HAL_ENOTSUPP; 216185377Ssam goto bad; 217185377Ssam#endif 218185377Ssam } 219185377Ssam rfStatus = ar2133RfAttach(ah, &ecode); 220185377Ssam if (!rfStatus) { 221185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", 222185377Ssam __func__, ecode); 223185377Ssam goto bad; 224185377Ssam } 225185377Ssam 226185377Ssam /* 227185377Ssam * Got everything we need now to setup the capabilities. 228185377Ssam */ 229185377Ssam if (!ar9160FillCapabilityInfo(ah)) { 230185377Ssam ecode = HAL_EEREAD; 231185377Ssam goto bad; 232185377Ssam } 233185377Ssam 234185377Ssam ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 235185377Ssam if (ecode != HAL_OK) { 236185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 237185377Ssam "%s: error getting mac address from EEPROM\n", __func__); 238185377Ssam goto bad; 239185377Ssam } 240185377Ssam /* XXX How about the serial number ? */ 241185377Ssam /* Read Reg Domain */ 242185377Ssam AH_PRIVATE(ah)->ah_currentRD = 243185377Ssam ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); 244185377Ssam 245185377Ssam /* 246185377Ssam * ah_miscMode is populated by ar5416FillCapabilityInfo() 247185377Ssam * starting from griffin. Set here to make sure that 248185377Ssam * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is 249185380Ssam * placed into hardware. 250185377Ssam */ 251185377Ssam if (ahp->ah_miscMode != 0) 252219852Sadrian OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); 253185377Ssam 254185377Ssam ar9160AniSetup(ah); /* Anti Noise Immunity */ 255218068Sadrian 256218068Sadrian /* This just uses the AR5416 NF values */ 257218068Sadrian AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ; 258218068Sadrian AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ; 259218068Sadrian AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ; 260218068Sadrian AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ; 261218068Sadrian AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ; 262218068Sadrian AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; 263218068Sadrian 264203882Srpaulo ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); 265185377Ssam 266185377Ssam HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 267185377Ssam 268185377Ssam return ah; 269185377Ssambad: 270185377Ssam if (ahp) 271189604Ssam ar5416Detach((struct ath_hal *) ahp); 272185377Ssam if (status) 273185377Ssam *status = ecode; 274185377Ssam return AH_NULL; 275185377Ssam} 276185377Ssam 277185377Ssam/* 278185377Ssam * Fill all software cached or static hardware state information. 279185377Ssam * Return failure if capabilities are to come from EEPROM and 280185377Ssam * cannot be read. 281185377Ssam */ 282185377Ssamstatic HAL_BOOL 283185377Ssamar9160FillCapabilityInfo(struct ath_hal *ah) 284185377Ssam{ 285185377Ssam HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 286185377Ssam 287185377Ssam if (!ar5416FillCapabilityInfo(ah)) 288185377Ssam return AH_FALSE; 289185377Ssam pCap->halCSTSupport = AH_TRUE; 290185377Ssam pCap->halRifsRxSupport = AH_TRUE; 291185377Ssam pCap->halRifsTxSupport = AH_TRUE; 292185377Ssam pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */ 293185377Ssam pCap->halExtChanDfsSupport = AH_TRUE; 294185377Ssam pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */ 295218150Sadrian /* AR9160 is a 2x2 stream device */ 296218150Sadrian pCap->halTxStreams = 2; 297218150Sadrian pCap->halRxStreams = 2; 298218150Sadrian 299185377Ssam return AH_TRUE; 300185377Ssam} 301185406Ssam 302185406Ssamstatic const char* 303185406Ssamar9160Probe(uint16_t vendorid, uint16_t devid) 304185406Ssam{ 305185406Ssam if (vendorid == ATHEROS_VENDOR_ID && devid == AR9160_DEVID_PCI) 306185406Ssam return "Atheros 9160"; 307185406Ssam return AH_NULL; 308185406Ssam} 309185418SsamAH_CHIP(AR9160, ar9160Probe, ar9160Attach); 310