1185377Ssam/* 2185377Ssam * Copyright (c) 2008 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2008 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17188971Ssam * $FreeBSD: releng/11.0/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c 272292 2014-09-30 03:19:29Z adrian $ 18185377Ssam */ 19185377Ssam#include "opt_ah.h" 20185377Ssam 21185377Ssam#include "ah.h" 22185377Ssam#include "ah_internal.h" 23185377Ssam#include "ah_devid.h" 24185377Ssam 25185377Ssam#include "ar5416/ar5416.h" 26185377Ssam#include "ar5416/ar5416reg.h" 27185377Ssam#include "ar5416/ar5416phy.h" 28185377Ssam 29217631Sadrian#include "ar9001/ar9160.ini" 30185377Ssam 31185377Ssamstatic const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */ 32185377Ssam .calName = "IQ", .calType = IQ_MISMATCH_CAL, 33185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 34185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 35185377Ssam .calCollect = ar5416IQCalCollect, 36185377Ssam .calPostProc = ar5416IQCalibration 37185377Ssam}; 38185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */ 39185377Ssam .calName = "ADC Gain", .calType = ADC_GAIN_CAL, 40185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 41185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 42185377Ssam .calCollect = ar5416AdcGainCalCollect, 43185377Ssam .calPostProc = ar5416AdcGainCalibration 44185377Ssam}; 45185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */ 46185377Ssam .calName = "ADC DC", .calType = ADC_DC_CAL, 47185377Ssam .calNumSamples = MAX_CAL_SAMPLES, 48185377Ssam .calCountMax = PER_MIN_LOG_COUNT, 49185377Ssam .calCollect = ar5416AdcDcCalCollect, 50185377Ssam .calPostProc = ar5416AdcDcCalibration 51185377Ssam}; 52185377Ssamstatic const HAL_PERCAL_DATA ar9160_adc_init_dc_cal = { 53185377Ssam .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL, 54185377Ssam .calNumSamples = MIN_CAL_SAMPLES, 55185377Ssam .calCountMax = INIT_LOG_COUNT, 56185377Ssam .calCollect = ar5416AdcDcCalCollect, 57185377Ssam .calPostProc = ar5416AdcDcCalibration 58185377Ssam}; 59185377Ssam 60185377Ssamstatic HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah); 61185377Ssam 62185377Ssamstatic void 63185377Ssamar9160AniSetup(struct ath_hal *ah) 64185377Ssam{ 65185377Ssam static const struct ar5212AniParams aniparams = { 66185377Ssam .maxNoiseImmunityLevel = 4, /* levels 0..4 */ 67185377Ssam .totalSizeDesired = { -55, -55, -55, -55, -62 }, 68185377Ssam .coarseHigh = { -14, -14, -14, -14, -12 }, 69185377Ssam .coarseLow = { -64, -64, -64, -64, -70 }, 70185377Ssam .firpwr = { -78, -78, -78, -78, -80 }, 71242409Sadrian .maxSpurImmunityLevel = 7, 72242409Sadrian .cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 }, 73185377Ssam .maxFirstepLevel = 2, /* levels 0..2 */ 74185377Ssam .firstep = { 0, 4, 8 }, 75185377Ssam .ofdmTrigHigh = 500, 76185377Ssam .ofdmTrigLow = 200, 77185377Ssam .cckTrigHigh = 200, 78185377Ssam .cckTrigLow = 100, 79185377Ssam .rssiThrHigh = 40, 80185377Ssam .rssiThrLow = 7, 81185377Ssam .period = 100, 82185377Ssam }; 83219979Sadrian 84219979Sadrian /* NB: disable ANI noise immmunity for reliable RIFS rx */ 85222276Sadrian AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); 86219979Sadrian ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); 87185377Ssam} 88185377Ssam 89224243Sadrianstatic void 90224243Sadrianar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan) 91224243Sadrian{ 92224243Sadrian uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV); 93224243Sadrian if (chan != AH_NULL) { 94224243Sadrian if (IEEE80211_IS_CHAN_HALF(chan)) 95224243Sadrian pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); 96224243Sadrian else if (IEEE80211_IS_CHAN_QUARTER(chan)) 97224243Sadrian pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); 98224243Sadrian 99224243Sadrian if (IEEE80211_IS_CHAN_5GHZ(chan)) 100224243Sadrian pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV); 101224243Sadrian else 102224243Sadrian pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); 103224243Sadrian } else 104224243Sadrian pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); 105224243Sadrian 106224243Sadrian OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); 107224243Sadrian OS_DELAY(RTC_PLL_SETTLE_DELAY); 108224243Sadrian OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK); 109224243Sadrian} 110224243Sadrian 111185377Ssam/* 112185377Ssam * Attach for an AR9160 part. 113185377Ssam */ 114188972Ssamstatic struct ath_hal * 115185377Ssamar9160Attach(uint16_t devid, HAL_SOFTC sc, 116217624Sadrian HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 117272292Sadrian HAL_OPS_CONFIG *ah_config, 118217624Sadrian HAL_STATUS *status) 119185377Ssam{ 120185377Ssam struct ath_hal_5416 *ahp5416; 121185377Ssam struct ath_hal_5212 *ahp; 122185377Ssam struct ath_hal *ah; 123185377Ssam uint32_t val; 124185377Ssam HAL_STATUS ecode; 125185377Ssam HAL_BOOL rfStatus; 126185377Ssam 127225883Sadrian HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 128185377Ssam __func__, sc, (void*) st, (void*) sh); 129185377Ssam 130185377Ssam /* NB: memory is returned zero'd */ 131185377Ssam ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416)); 132185377Ssam if (ahp5416 == AH_NULL) { 133225883Sadrian HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 134185377Ssam "%s: cannot allocate memory for state block\n", __func__); 135185377Ssam *status = HAL_ENOMEM; 136185377Ssam return AH_NULL; 137185377Ssam } 138185377Ssam ar5416InitState(ahp5416, devid, sc, st, sh, status); 139185377Ssam ahp = &ahp5416->ah_5212; 140185377Ssam ah = &ahp->ah_priv.h; 141185377Ssam 142185377Ssam /* XXX override with 9160 specific state */ 143185377Ssam /* override 5416 methods for our needs */ 144224243Sadrian AH5416(ah)->ah_initPLL = ar9160InitPLL; 145185377Ssam 146185380Ssam AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal; 147185380Ssam AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal; 148185380Ssam AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal; 149185380Ssam AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal; 150185380Ssam AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL; 151185377Ssam 152185377Ssam if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { 153185377Ssam /* reset chip */ 154185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", 155185377Ssam __func__); 156185377Ssam ecode = HAL_EIO; 157185377Ssam goto bad; 158185377Ssam } 159185377Ssam 160185377Ssam if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { 161185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", 162185377Ssam __func__); 163185377Ssam ecode = HAL_EIO; 164185377Ssam goto bad; 165185377Ssam } 166185377Ssam /* Read Revisions from Chips before taking out of reset */ 167185377Ssam val = OS_REG_READ(ah, AR_SREV); 168185377Ssam HALDEBUG(ah, HAL_DEBUG_ATTACH, 169185377Ssam "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n", 170185377Ssam __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION), 171185377Ssam MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION)); 172185377Ssam /* NB: include chip type to differentiate from pre-Sowl versions */ 173185377Ssam AH_PRIVATE(ah)->ah_macVersion = 174185377Ssam (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S; 175185377Ssam AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); 176188979Ssam AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; 177185377Ssam 178185377Ssam /* setup common ini data; rf backends handle remainder */ 179185377Ssam HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6); 180185377Ssam HAL_INI_INIT(&ahp->ah_ini_common, ar9160Common, 2); 181185377Ssam 182185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3); 183185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2); 184185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2); 185185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2); 186185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3); 187249579Sadrian HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6TPC, 3); 188185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2); 189185377Ssam if (AR_SREV_SOWL_11(ah)) 190185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2); 191185377Ssam else 192185377Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2); 193185377Ssam 194188973Ssam ecode = ath_hal_v14EepromAttach(ah); 195188973Ssam if (ecode != HAL_OK) 196188973Ssam goto bad; 197188973Ssam 198188979Ssam HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2); 199188979Ssam ar5416AttachPCIE(ah); 200188979Ssam 201185377Ssam if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */ 202185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 203185377Ssam ecode = HAL_EIO; 204185377Ssam goto bad; 205185377Ssam } 206185377Ssam 207185377Ssam AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 208185377Ssam 209185377Ssam if (!ar5212ChipTest(ah)) { 210185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 211185377Ssam __func__); 212185377Ssam ecode = HAL_ESELFTEST; 213185377Ssam goto bad; 214185377Ssam } 215185377Ssam 216185377Ssam /* 217185377Ssam * Set correct Baseband to analog shift 218185377Ssam * setting to access analog chips. 219185377Ssam */ 220185377Ssam OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 221185377Ssam 222185377Ssam /* Read Radio Chip Rev Extract */ 223188971Ssam AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); 224185377Ssam switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { 225185377Ssam case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */ 226185377Ssam case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */ 227185377Ssam break; 228185377Ssam default: 229185377Ssam if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { 230185377Ssam AH_PRIVATE(ah)->ah_analog5GhzRev = 231185377Ssam AR_RAD5133_SREV_MAJOR; 232185377Ssam break; 233185377Ssam } 234185377Ssam#ifdef AH_DEBUG 235185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 236185377Ssam "%s: 5G Radio Chip Rev 0x%02X is not supported by " 237185377Ssam "this driver\n", __func__, 238185377Ssam AH_PRIVATE(ah)->ah_analog5GhzRev); 239185377Ssam ecode = HAL_ENOTSUPP; 240185377Ssam goto bad; 241185377Ssam#endif 242185377Ssam } 243185377Ssam rfStatus = ar2133RfAttach(ah, &ecode); 244185377Ssam if (!rfStatus) { 245185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", 246185377Ssam __func__, ecode); 247185377Ssam goto bad; 248185377Ssam } 249185377Ssam 250185377Ssam /* 251185377Ssam * Got everything we need now to setup the capabilities. 252185377Ssam */ 253185377Ssam if (!ar9160FillCapabilityInfo(ah)) { 254185377Ssam ecode = HAL_EEREAD; 255185377Ssam goto bad; 256185377Ssam } 257185377Ssam 258185377Ssam ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 259185377Ssam if (ecode != HAL_OK) { 260185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 261185377Ssam "%s: error getting mac address from EEPROM\n", __func__); 262185377Ssam goto bad; 263185377Ssam } 264185377Ssam /* XXX How about the serial number ? */ 265185377Ssam /* Read Reg Domain */ 266185377Ssam AH_PRIVATE(ah)->ah_currentRD = 267185377Ssam ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); 268221596Sadrian AH_PRIVATE(ah)->ah_currentRDext = 269221596Sadrian ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL); 270185377Ssam 271185377Ssam /* 272185377Ssam * ah_miscMode is populated by ar5416FillCapabilityInfo() 273185377Ssam * starting from griffin. Set here to make sure that 274185377Ssam * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is 275185380Ssam * placed into hardware. 276185377Ssam */ 277185377Ssam if (ahp->ah_miscMode != 0) 278219852Sadrian OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); 279185377Ssam 280185377Ssam ar9160AniSetup(ah); /* Anti Noise Immunity */ 281218068Sadrian 282218068Sadrian /* This just uses the AR5416 NF values */ 283218068Sadrian AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ; 284218068Sadrian AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ; 285218068Sadrian AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ; 286218068Sadrian AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ; 287218068Sadrian AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ; 288218068Sadrian AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; 289218068Sadrian 290203882Srpaulo ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); 291185377Ssam 292185377Ssam HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 293185377Ssam 294185377Ssam return ah; 295185377Ssambad: 296185377Ssam if (ahp) 297189604Ssam ar5416Detach((struct ath_hal *) ahp); 298185377Ssam if (status) 299185377Ssam *status = ecode; 300185377Ssam return AH_NULL; 301185377Ssam} 302185377Ssam 303185377Ssam/* 304185377Ssam * Fill all software cached or static hardware state information. 305185377Ssam * Return failure if capabilities are to come from EEPROM and 306185377Ssam * cannot be read. 307185377Ssam */ 308185377Ssamstatic HAL_BOOL 309185377Ssamar9160FillCapabilityInfo(struct ath_hal *ah) 310185377Ssam{ 311185377Ssam HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 312185377Ssam 313185377Ssam if (!ar5416FillCapabilityInfo(ah)) 314185377Ssam return AH_FALSE; 315185377Ssam pCap->halCSTSupport = AH_TRUE; 316185377Ssam pCap->halRifsRxSupport = AH_TRUE; 317185377Ssam pCap->halRifsTxSupport = AH_TRUE; 318185377Ssam pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */ 319185377Ssam pCap->halExtChanDfsSupport = AH_TRUE; 320222584Sadrian pCap->halUseCombinedRadarRssi = AH_TRUE; 321185377Ssam pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */ 322221603Sadrian pCap->halMbssidAggrSupport = AH_TRUE; 323221603Sadrian pCap->hal4AddrAggrSupport = AH_TRUE; 324226488Sadrian /* BB Read WAR */ 325226488Sadrian pCap->halHasBBReadWar = AH_TRUE; 326221603Sadrian 327218150Sadrian /* AR9160 is a 2x2 stream device */ 328218150Sadrian pCap->halTxStreams = 2; 329218150Sadrian pCap->halRxStreams = 2; 330218150Sadrian 331185377Ssam return AH_TRUE; 332185377Ssam} 333185406Ssam 334185406Ssamstatic const char* 335185406Ssamar9160Probe(uint16_t vendorid, uint16_t devid) 336185406Ssam{ 337185406Ssam if (vendorid == ATHEROS_VENDOR_ID && devid == AR9160_DEVID_PCI) 338185406Ssam return "Atheros 9160"; 339185406Ssam return AH_NULL; 340185406Ssam} 341185418SsamAH_CHIP(AR9160, ar9160Probe, ar9160Attach); 342