ah_eeprom_v4k.h revision 197948
1197948Srpaulo/* 2197948Srpaulo * Copyright (c) 2009 Rui Paulo <rpaulo@FreeBSD.org> 3197948Srpaulo * Copyright (c) 2008 Sam Leffler, Errno Consulting 4197948Srpaulo * Copyright (c) 2008 Atheros Communications, Inc. 5197948Srpaulo * 6197948Srpaulo * Permission to use, copy, modify, and/or distribute this software for any 7197948Srpaulo * purpose with or without fee is hereby granted, provided that the above 8197948Srpaulo * copyright notice and this permission notice appear in all copies. 9197948Srpaulo * 10197948Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11197948Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12197948Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13197948Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14197948Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15197948Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16197948Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17197948Srpaulo * 18197948Srpaulo * $FreeBSD: head/sys/dev/ath/ath_hal/ah_eeprom_v4k.h 197948 2009-10-10 22:29:34Z rpaulo $ 19197948Srpaulo */ 20197948Srpaulo#ifndef _AH_EEPROM_V4K_H_ 21197948Srpaulo#define _AH_EEPROM_V4K_H_ 22197948Srpaulo 23197948Srpaulo#include "ah_eeprom.h" 24197948Srpaulo#include "ah_eeprom_v14.h" 25197948Srpaulo 26197948Srpaulo#undef owl_eep_start_loc 27197948Srpaulo#ifdef __LINUX_ARM_ARCH__ /* AP71 */ 28197948Srpaulo#define owl_eep_start_loc 0 29197948Srpaulo#else 30197948Srpaulo#define owl_eep_start_loc 64 31197948Srpaulo#endif 32197948Srpaulo 33197948Srpaulo// 16-bit offset location start of calibration struct 34197948Srpaulo#define AR5416_4K_EEP_START_LOC 64 35197948Srpaulo#define AR5416_4K_NUM_2G_CAL_PIERS 3 36197948Srpaulo#define AR5416_4K_NUM_2G_CCK_TARGET_POWERS 3 37197948Srpaulo#define AR5416_4K_NUM_2G_20_TARGET_POWERS 3 38197948Srpaulo#define AR5416_4K_NUM_2G_40_TARGET_POWERS 3 39197948Srpaulo#define AR5416_4K_NUM_CTLS 12 40197948Srpaulo#define AR5416_4K_NUM_BAND_EDGES 4 41197948Srpaulo#define AR5416_4K_NUM_PD_GAINS 2 42197948Srpaulo#define AR5416_4K_PD_GAINS_IN_MASK 4 43197948Srpaulo#define AR5416_4K_PD_GAIN_ICEPTS 5 44197948Srpaulo#define AR5416_4K_MAX_CHAINS 1 45197948Srpaulo 46197948Srpaulo/* 47197948Srpaulo * NB: The format in EEPROM has words 0 and 2 swapped (i.e. version 48197948Srpaulo * and length are swapped). We reverse their position after reading 49197948Srpaulo * the data into host memory so the version field is at the same 50197948Srpaulo * offset as in previous EEPROM layouts. This makes utilities that 51197948Srpaulo * inspect the EEPROM contents work without looking at the PCI device 52197948Srpaulo * id which may or may not be reliable. 53197948Srpaulo */ 54197948Srpaulotypedef struct BaseEepHeader4k { 55197948Srpaulo uint16_t version; /* NB: length in EEPROM */ 56197948Srpaulo uint16_t checksum; 57197948Srpaulo uint16_t length; /* NB: version in EEPROM */ 58197948Srpaulo uint8_t opCapFlags; 59197948Srpaulo uint8_t eepMisc; 60197948Srpaulo uint16_t regDmn[2]; 61197948Srpaulo uint8_t macAddr[6]; 62197948Srpaulo uint8_t rxMask; 63197948Srpaulo uint8_t txMask; 64197948Srpaulo uint16_t rfSilent; 65197948Srpaulo uint16_t blueToothOptions; 66197948Srpaulo uint16_t deviceCap; 67197948Srpaulo uint32_t binBuildNumber; 68197948Srpaulo uint8_t deviceType; 69197948Srpaulo uint8_t txGainType; /* high power tx gain table support */ 70197948Srpaulo} __packed BASE_EEP4K_HEADER; // 32 B 71197948Srpaulo 72197948Srpaulotypedef struct ModalEepHeader4k { 73197948Srpaulo uint32_t antCtrlChain[AR5416_4K_MAX_CHAINS]; // 12 74197948Srpaulo uint32_t antCtrlCommon; // 4 75197948Srpaulo int8_t antennaGainCh[AR5416_4K_MAX_CHAINS]; // 1 76197948Srpaulo uint8_t switchSettling; // 1 77197948Srpaulo uint8_t txRxAttenCh[AR5416_4K_MAX_CHAINS]; // 1 78197948Srpaulo uint8_t rxTxMarginCh[AR5416_4K_MAX_CHAINS]; // 1 79197948Srpaulo uint8_t adcDesiredSize; // 1 80197948Srpaulo int8_t pgaDesiredSize; // 1 81197948Srpaulo uint8_t xlnaGainCh[AR5416_4K_MAX_CHAINS]; // 1 82197948Srpaulo uint8_t txEndToXpaOff; // 1 83197948Srpaulo uint8_t txEndToRxOn; // 1 84197948Srpaulo uint8_t txFrameToXpaOn; // 1 85197948Srpaulo uint8_t thresh62; // 1 86197948Srpaulo uint8_t noiseFloorThreshCh[AR5416_4K_MAX_CHAINS]; // 1 87197948Srpaulo uint8_t xpdGain; // 1 88197948Srpaulo uint8_t xpd; // 1 89197948Srpaulo int8_t iqCalICh[AR5416_4K_MAX_CHAINS]; // 1 90197948Srpaulo int8_t iqCalQCh[AR5416_4K_MAX_CHAINS]; // 1 91197948Srpaulo uint8_t pdGainOverlap; // 1 92197948Srpaulo uint8_t ob; // 1 93197948Srpaulo uint8_t db; // 1 94197948Srpaulo uint8_t xpaBiasLvl; // 1 95197948Srpaulo#if 0 96197948Srpaulo uint8_t pwrDecreaseFor2Chain; // 1 97197948Srpaulo uint8_t pwrDecreaseFor3Chain; // 1 -> 48 B 98197948Srpaulo#endif 99197948Srpaulo uint8_t txFrameToDataStart; // 1 100197948Srpaulo uint8_t txFrameToPaOn; // 1 101197948Srpaulo uint8_t ht40PowerIncForPdadc; // 1 102197948Srpaulo uint8_t bswAtten[AR5416_4K_MAX_CHAINS]; // 1 103197948Srpaulo uint8_t bswMargin[AR5416_4K_MAX_CHAINS]; // 1 104197948Srpaulo uint8_t swSettleHt40; // 1 105197948Srpaulo uint8_t xatten2Db[AR5416_4K_MAX_CHAINS]; // 1 106197948Srpaulo uint8_t xatten2Margin[AR5416_4K_MAX_CHAINS]; // 1 107197948Srpaulo uint8_t ob_ch1; // 1 -> ob and db become chain specific from AR9280 108197948Srpaulo uint8_t db_ch1; // 1 109197948Srpaulo uint8_t flagBits; // 1 110197948Srpaulo#define AR5416_EEP_FLAG_USEANT1 0x01 /* +1 configured antenna */ 111197948Srpaulo#define AR5416_EEP_FLAG_FORCEXPAON 0x02 /* force XPA bit for 5G */ 112197948Srpaulo#define AR5416_EEP_FLAG_LOCALBIAS 0x04 /* enable local bias */ 113197948Srpaulo#define AR5416_EEP_FLAG_FEMBANDSELECT 0x08 /* FEM band select used */ 114197948Srpaulo#define AR5416_EEP_FLAG_XLNABUFIN 0x10 115197948Srpaulo#define AR5416_EEP_FLAG_XLNAISEL 0x60 116197948Srpaulo#define AR5416_EEP_FLAG_XLNAISEL_S 5 117197948Srpaulo#define AR5416_EEP_FLAG_XLNABUFMODE 0x80 118197948Srpaulo uint8_t miscBits; // [0..1]: bb_tx_dac_scale_cck 119197948Srpaulo uint16_t xpaBiasLvlFreq[3]; // 6 120197948Srpaulo uint8_t futureModal[2]; // 2 121197948Srpaulo 122197948Srpaulo SPUR_CHAN spurChans[AR5416_EEPROM_MODAL_SPURS]; // 20 B 123197948Srpaulo} __packed MODAL_EEP4K_HEADER; // == 68 B 124197948Srpaulo 125197948Srpaulotypedef struct CalCtlData4k { 126197948Srpaulo CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES]; 127197948Srpaulo} __packed CAL_CTL_DATA_4K; 128197948Srpaulo 129197948Srpaulotypedef struct calDataPerFreq4k { 130197948Srpaulo uint8_t pwrPdg[AR5416_4K_NUM_PD_GAINS][AR5416_4K_PD_GAIN_ICEPTS]; 131197948Srpaulo uint8_t vpdPdg[AR5416_4K_NUM_PD_GAINS][AR5416_4K_PD_GAIN_ICEPTS]; 132197948Srpaulo} __packed CAL_DATA_PER_FREQ_4K; 133197948Srpaulo 134197948Srpaulostruct ar5416eeprom_4k { 135197948Srpaulo BASE_EEP4K_HEADER baseEepHeader; // 32 B 136197948Srpaulo uint8_t custData[20]; // 20 B 137197948Srpaulo MODAL_EEP4K_HEADER modalHeader; // 68 B 138197948Srpaulo uint8_t calFreqPier2G[AR5416_4K_NUM_2G_CAL_PIERS]; 139197948Srpaulo CAL_DATA_PER_FREQ_4K calPierData2G[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_2G_CAL_PIERS]; 140197948Srpaulo CAL_TARGET_POWER_LEG calTargetPowerCck[AR5416_4K_NUM_2G_CCK_TARGET_POWERS]; 141197948Srpaulo CAL_TARGET_POWER_LEG calTargetPower2G[AR5416_4K_NUM_2G_20_TARGET_POWERS]; 142197948Srpaulo CAL_TARGET_POWER_HT calTargetPower2GHT20[AR5416_4K_NUM_2G_20_TARGET_POWERS]; 143197948Srpaulo CAL_TARGET_POWER_HT calTargetPower2GHT40[AR5416_4K_NUM_2G_40_TARGET_POWERS]; 144197948Srpaulo uint8_t ctlIndex[AR5416_4K_NUM_CTLS]; 145197948Srpaulo CAL_CTL_DATA_4K ctlData[AR5416_4K_NUM_CTLS]; 146197948Srpaulo uint8_t padding; 147197948Srpaulo} __packed; 148197948Srpaulo 149197948Srpaulotypedef struct { 150197948Srpaulo struct ar5416eeprom_4k ee_base; 151197948Srpaulo#define NUM_EDGES 8 152197948Srpaulo uint16_t ee_numCtls; 153197948Srpaulo RD_EDGES_POWER ee_rdEdgesPower[NUM_EDGES*AR5416_4K_NUM_CTLS]; 154197948Srpaulo /* XXX these are dynamically calculated for use by shared code */ 155197948Srpaulo int8_t ee_antennaGainMax[2]; 156197948Srpaulo} HAL_EEPROM_v4k; 157197948Srpaulo#endif /* _AH_EEPROM_V4K_H_ */ 158