ata-dma.c revision 54544
1/*- 2 * Copyright (c) 1998,1999 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 54544 1999-12-13 10:19:39Z sos $ 29 */ 30 31#include "pci.h" 32#include "apm.h" 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/buf.h> 36#include <sys/malloc.h> 37#include <sys/bus.h> 38#include <sys/disk.h> 39#include <sys/devicestat.h> 40#include <vm/vm.h> 41#include <vm/pmap.h> 42#if NPCI > 0 43#include <pci/pcivar.h> 44#endif 45#if NAPM > 0 46#include <machine/apm_bios.h> 47#endif 48#include <dev/ata/ata-all.h> 49#include <dev/ata/ata-disk.h> 50 51/* prototypes */ 52static void hpt366_timing(struct ata_softc *, int32_t, int32_t); 53 54/* misc defines */ 55#define MIN(a,b) ((a)>(b)?(b):(a)) 56#ifdef __alpha__ 57#undef vtophys 58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 59#endif 60 61#if NPCI > 0 62 63int32_t 64ata_dmainit(struct ata_softc *scp, int32_t device, 65 int32_t apiomode, int32_t wdmamode, int32_t udmamode) 66{ 67 int32_t type, devno, error; 68 void *dmatab; 69 70 if (!scp->bmaddr) 71 return -1; 72#ifdef ATA_DMADEBUG 73 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 74 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 75#endif 76 77 /* if simplex controller, only allow DMA on primary channel */ 78 if (scp->unit == 1) { 79 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 80 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 81 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 82 printf("ata%d: simplex device, DMA on primary channel only\n", 83 scp->lun); 84 return -1; 85 } 86 } 87 88 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 89 return -1; 90 91 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 92 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 93 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 94 free(dmatab, M_DEVBUF); 95 return -1; 96 } 97 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 98 99 switch (type = pci_get_devid(scp->dev)) { 100 101 case 0x71118086: /* Intel PIIX4 */ 102 if (udmamode >= 2) { 103 int32_t mask48, new48; 104 105 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 106 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 107 if (bootverbose) 108 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 109 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 110 (error) ? "failed" : "success"); 111 if (!error) { 112 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 113 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 114 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 115 pci_write_config(scp->dev, 0x48, 116 (pci_read_config(scp->dev, 0x48, 4) & 117 ~mask48) | new48, 4); 118 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 119 return 0; 120 } 121 } 122 /* FALLTHROUGH */ 123 124 case 0x70108086: /* Intel PIIX3 */ 125 if (wdmamode >= 2 && apiomode >= 4) { 126 int32_t mask40, new40, mask44, new44; 127 128 /* if SITRE not set doit for both channels */ 129 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 130 new40 = pci_read_config(scp->dev, 0x40, 4); 131 new44 = pci_read_config(scp->dev, 0x44, 4); 132 if (!(new40 & 0x00004000)) { 133 new44 &= ~0x0000000f; 134 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 135 } 136 if (!(new40 & 0x40000000)) { 137 new44 &= ~0x000000f0; 138 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 139 } 140 new40 |= 0x40004000; 141 pci_write_config(scp->dev, 0x40, new40, 4); 142 pci_write_config(scp->dev, 0x44, new44, 4); 143 } 144 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 145 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 146 if (bootverbose) 147 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 148 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 149 (error) ? "failed" : "success"); 150 if (!error) { 151 if (device == ATA_MASTER) { 152 mask40 = 0x0000330f; 153 new40 = 0x00002307; 154 mask44 = 0; 155 new44 = 0; 156 } 157 else { 158 mask40 = 0x000000f0; 159 new40 = 0x00000070; 160 mask44 = 0x0000000f; 161 new44 = 0x0000000b; 162 } 163 if (scp->unit) { 164 mask40 <<= 16; 165 new40 <<= 16; 166 mask44 <<= 4; 167 new44 <<= 4; 168 } 169 pci_write_config(scp->dev, 0x40, 170 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 171 new40, 4); 172 pci_write_config(scp->dev, 0x44, 173 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 174 new44, 4); 175 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 176 return 0; 177 } 178 } 179 /* we could set PIO mode timings, but we assume the BIOS did that */ 180 break; 181 182 case 0x12308086: /* Intel PIIX */ 183 if (wdmamode >= 2 && apiomode >= 4) { 184 int32_t word40; 185 186 word40 = pci_read_config(scp->dev, 0x40, 4); 187 word40 >>= scp->unit * 16; 188 189 /* Check for timing config usable for DMA on controller */ 190 if (!((word40 & 0x3300) == 0x2300 && 191 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1)) 192 break; 193 194 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 195 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 196 if (bootverbose) 197 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX chip\n", 198 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 199 (error) ? "failed" : "success"); 200 if (!error) { 201 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 202 return 0; 203 } 204 } 205 break; 206 207 case 0x522910b9: /* AcerLabs Aladdin IV/V */ 208 /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 209 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 210 printf("ata%d: Aladdin: two atapi devices on this channel, " 211 "DMA disabled\n", scp->lun); 212 break; 213 } 214 if (udmamode >= 2) { 215 int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 216 217 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 218 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 219 if (bootverbose) 220 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 221 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 222 (error) ? "failed" : "success"); 223 if (!error) { 224 word54 |= 0x5555; 225 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 226 pci_write_config(scp->dev, 0x54, word54, 4); 227 pci_write_config(scp->dev, 0x53, 228 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 229 scp->flags |= ATA_ATAPI_DMA_RO; 230 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 231 return 0; 232 } 233 } 234 if (wdmamode >= 2 && apiomode >= 4) { 235 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 236 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 237 if (bootverbose) 238 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 239 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 240 (error) ? "failed" : "success"); 241 if (!error) { 242 pci_write_config(scp->dev, 0x53, 243 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 244 scp->flags |= ATA_ATAPI_DMA_RO; 245 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 246 return 0; 247 } 248 } 249 /* we could set PIO mode timings, but we assume the BIOS did that */ 250 break; 251 252 case 0x05711106: /* VIA Apollo 82c571 / 82c586 / 82c686 */ 253 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 254 255 /* UDMA4 mode only on rev 6 (VT82C686) hardware */ 256 if (udmamode >= 4 && pci_read_config(scp->dev, 0x08, 1) == 0x06) { 257 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 258 259 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 260 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 261 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 262 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 263 if (bootverbose) 264 printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n", 265 scp->lun, (device == ATA_MASTER) ? "master":"slave", 266 (error) ? "failed" : "success"); 267 if (!error) { 268 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 269 return 0; 270 } 271 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 272 } 273 274 /* UDMA2 mode only on rev 1 and up (VT82C586, VT82C686) hardware */ 275 if (udmamode >= 2 && pci_read_config(scp->dev, 0x08, 1) >= 0x01) { 276 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 277 278 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 279 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 280 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 281 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 282 if (bootverbose) 283 printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n", 284 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 285 (error) ? "failed" : "success"); 286 if (!error) { 287 if ((device == ATA_MASTER && scp->devices & ATA_ATA_MASTER) || 288 (device == ATA_SLAVE && scp->devices & ATA_ATA_SLAVE)) { 289 struct ata_params *ap = ((struct ad_softc *) 290 (scp->dev_softc[(device==ATA_MASTER)?0:1]))->ata_parm; 291 292 if ((pci_read_config(scp->dev, 0x08, 1) == 0x06) && 293 (ap->udmamodes & 0x10) && !ap->cblid) { 294 pci_write_config(scp->dev, 0x53 - devno, 295 (byte & 0x1c) | 0x42, 1); 296 } 297 } 298 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 299 return 0; 300 } 301 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 302 } 303 if (wdmamode >= 2 && apiomode >= 4) { 304 /* set WDMA2 mode timing */ 305 pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1); 306 307 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 308 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 309 if (bootverbose) 310 printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n", 311 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 312 (error) ? "failed" : "success"); 313 if (!error) { 314 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 315 return 0; 316 } 317 } 318 /* we could set PIO mode timings, but we assume the BIOS did that */ 319 break; 320 321 case 0x55131039: /* SiS 5591 */ 322 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 323 if (udmamode >= 2) { 324 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 325 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 326 if (bootverbose) 327 printf("ata%d: %s: %s setting up UDMA2 mode on SiS chip\n", 328 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 329 (error) ? "failed" : "success"); 330 if (!error) { 331 pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2); 332 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 333 return 0; 334 } 335 } 336 if (wdmamode >=2 && apiomode >= 4) { 337 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 338 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 339 if (bootverbose) 340 printf("ata%d: %s: %s setting up WDMA2 mode on SiS chip\n", 341 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 342 (error) ? "failed" : "success"); 343 if (!error) { 344 pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2); 345 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 346 return 0; 347 } 348 } 349 /* we could set PIO mode timings, but we assume the BIOS did that */ 350 break; 351 352 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 353 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 354 /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 355 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 356 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 357 break; 358 359 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 360 if (udmamode >=4 && type == 0x4d38105a && 361 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 362 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 363 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 364 if (bootverbose) 365 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n", 366 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 367 (error) ? "failed" : "success"); 368 if (!error) { 369 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 370 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 371 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 372 return 0; 373 } 374 } 375 if (udmamode >= 2) { 376 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 377 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 378 if (bootverbose) 379 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 380 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 381 (error) ? "failed" : "success"); 382 if (!error) { 383 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 384 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 385 return 0; 386 } 387 } 388 if (wdmamode >= 2 && apiomode >= 4) { 389 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 390 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 391 if (bootverbose) 392 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 393 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 394 (error) ? "failed" : "success"); 395 if (!error) { 396 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 397 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 398 return 0; 399 } 400 } 401 if (bootverbose) 402 printf("ata%d: %s: setting PIO mode on Promise chip\n", 403 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 404 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 405 break; 406 407 case 0x00041103: /* HighPoint HPT366 controller */ 408 /* no ATAPI devices for now */ 409 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 410 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 411 break; 412 413 devno = (device == ATA_MASTER) ? 0 : 1; 414 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 415 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 416 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 417 if (bootverbose) 418 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 419 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 420 (error) ? "failed" : "success"); 421 if (!error) { 422 hpt366_timing(scp, device, ATA_MODE_UDMA4); 423 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 424 return 0; 425 } 426 } 427 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 428 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 429 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 430 if (bootverbose) 431 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 432 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 433 (error) ? "failed" : "success"); 434 if (!error) { 435 hpt366_timing(scp, device, ATA_MODE_UDMA3); 436 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 437 return 0; 438 } 439 } 440 if (udmamode >= 2) { 441 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 442 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 443 if (bootverbose) 444 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 445 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 446 (error) ? "failed" : "success"); 447 if (!error) { 448 hpt366_timing(scp, device, ATA_MODE_UDMA2); 449 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 450 return 0; 451 } 452 } 453 if (wdmamode >= 2 && apiomode >= 4) { 454 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 455 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 456 if (bootverbose) 457 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 458 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 459 (error) ? "failed" : "success"); 460 if (!error) { 461 hpt366_timing(scp, device, ATA_MODE_WDMA2); 462 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 463 return 0; 464 } 465 } 466 if (bootverbose) 467 printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 468 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 469 hpt366_timing(scp, device, ATA_MODE_PIO); 470 break; 471 472 default: /* unknown controller chip */ 473 /* better not try generic DMA on ATAPI devices it almost never works */ 474 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 475 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 476 break; 477 478 /* well, we have no support for this, but try anyways */ 479 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) && 480 (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 481 ((device == ATA_MASTER) ? 482 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) { 483 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 484 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 485 if (bootverbose) 486 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 487 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 488 (error) ? "failed" : "success"); 489 if (!error) { 490 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 491 return 0; 492 } 493 } 494 } 495 free(dmatab, M_DEVBUF); 496 return -1; 497} 498 499int32_t 500ata_dmasetup(struct ata_softc *scp, int32_t device, 501 int8_t *data, int32_t count, int32_t flags) 502{ 503 struct ata_dmaentry *dmatab; 504 u_int32_t dma_count, dma_base; 505 int32_t i = 0; 506 507#ifdef ATA_DMADEBUG 508 printf("ata%d: dmasetup\n", scp->lun); 509#endif 510 if (((uintptr_t)data & 1) || (count & 1)) 511 return -1; 512 513 if (!count) { 514#ifdef ATA_DMADEBUG 515 printf("ata%d: zero length DMA transfer attempt on %s\n", 516 scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 517#endif 518 return -1; 519 } 520 521 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 522 dma_base = vtophys(data); 523 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 524 data += dma_count; 525 count -= dma_count; 526 527 while (count) { 528 dmatab[i].base = dma_base; 529 dmatab[i].count = (dma_count & 0xffff); 530 i++; 531 if (i >= ATA_DMA_ENTRIES) { 532 printf("ata%d: too many segments in DMA table for %s\n", 533 scp->lun, (device ? "slave" : "master")); 534 return -1; 535 } 536 dma_base = vtophys(data); 537 dma_count = MIN(count, PAGE_SIZE); 538 data += MIN(count, PAGE_SIZE); 539 count -= MIN(count, PAGE_SIZE); 540 } 541#ifdef ATA_DMADEBUG 542 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 543#endif 544 dmatab[i].base = dma_base; 545 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 546 547 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 548#ifdef ATA_DMADEBUG 549 printf("dmatab=%08x %08x\n", 550 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 551#endif 552 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 553 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 554 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 555 return 0; 556} 557 558void 559ata_dmastart(struct ata_softc *scp) 560{ 561#ifdef ATA_DMADEBUG 562 printf("ata%d: dmastart\n", scp->lun); 563#endif 564 scp->flags |= ATA_DMA_ACTIVE; 565 outb(scp->bmaddr + ATA_BMCMD_PORT, 566 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 567} 568 569int32_t 570ata_dmadone(struct ata_softc *scp) 571{ 572#ifdef ATA_DMADEBUG 573 printf("ata%d: dmadone\n", scp->lun); 574#endif 575 outb(scp->bmaddr + ATA_BMCMD_PORT, 576 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 577 scp->flags &= ~ATA_DMA_ACTIVE; 578 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 579} 580 581int32_t 582ata_dmastatus(struct ata_softc *scp) 583{ 584#ifdef ATA_DMADEBUG 585 printf("ata%d: dmastatus\n", scp->lun); 586#endif 587 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 588} 589 590static void 591hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 592{ 593 u_int32_t timing; 594 595 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 596 case 0x85: /* 25Mhz */ 597 switch (mode) { 598 case ATA_MODE_PIO: timing = 0xc0ca8521; break; 599 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 600 case ATA_MODE_UDMA2: 601 case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 602 case ATA_MODE_UDMA4: timing = 0x90c98521; break; 603 default: timing = 0x01208585; 604 } 605 break; 606 default: 607 case 0xa7: /* 33MHz */ 608 switch (mode) { 609 case ATA_MODE_PIO: timing = 0xc0c8a731; break; 610 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 611 case ATA_MODE_UDMA2: timing = 0x90caa731; break; 612 case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 613 case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 614 default: timing = 0x0120a7a7; 615 } 616 break; 617 case 0xd9: /* 40Mhz */ 618 switch (mode) { 619 case ATA_MODE_PIO: timing = 0xc008d963; break; 620 case ATA_MODE_WDMA2: timing = 0xa008d943; break; 621 case ATA_MODE_UDMA2: timing = 0x900bd943; break; 622 case ATA_MODE_UDMA3: timing = 0x900ad943; break; 623 case ATA_MODE_UDMA4: timing = 0x900fd943; break; 624 default: timing = 0x0120d9d9; 625 } 626 } 627 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 628} 629 630#else /* NPCI > 0 */ 631 632int32_t 633ata_dmainit(struct ata_softc *scp, int32_t device, 634 int32_t piomode, int32_t wdmamode, int32_t udmamode) 635{ 636 return -1; 637} 638 639int32_t 640ata_dmasetup(struct ata_softc *scp, int32_t device, 641 int8_t *data, int32_t count, int32_t flags) 642{ 643 return -1; 644} 645 646void 647ata_dmastart(struct ata_softc *scp) 648{ 649} 650 651int32_t 652ata_dmadone(struct ata_softc *scp) 653{ 654 return -1; 655} 656 657int32_t 658ata_dmastatus(struct ata_softc *scp) 659{ 660 return -1; 661} 662 663#endif /* NPCI > 0 */ 664