ata-dma.c revision 54270
145095Ssos/*- 245095Ssos * Copyright (c) 1998,1999 S�ren Schmidt 345095Ssos * All rights reserved. 445095Ssos * 545095Ssos * Redistribution and use in source and binary forms, with or without 645095Ssos * modification, are permitted provided that the following conditions 745095Ssos * are met: 845095Ssos * 1. Redistributions of source code must retain the above copyright 945095Ssos * notice, this list of conditions and the following disclaimer, 1045095Ssos * without modification, immediately at the beginning of the file. 1145095Ssos * 2. Redistributions in binary form must reproduce the above copyright 1245095Ssos * notice, this list of conditions and the following disclaimer in the 1345095Ssos * documentation and/or other materials provided with the distribution. 1445095Ssos * 3. The name of the author may not be used to endorse or promote products 1545095Ssos * derived from this software without specific prior written permission. 1645095Ssos * 1745095Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1845095Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1945095Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2045095Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2145095Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2245095Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2345095Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2445095Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2545095Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2645095Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2745095Ssos * 2850477Speter * $FreeBSD: head/sys/dev/ata/ata-dma.c 54270 1999-12-07 22:07:18Z sos $ 2945095Ssos */ 3045095Ssos 3145150Ssos#include "pci.h" 3251520Ssos#include "apm.h" 3345095Ssos#include <sys/param.h> 3445095Ssos#include <sys/systm.h> 3545095Ssos#include <sys/buf.h> 3645095Ssos#include <sys/malloc.h> 3745798Ssos#include <sys/bus.h> 3854270Ssos#include <sys/disk.h> 3954270Ssos#include <sys/devicestat.h> 4051520Ssos#include <vm/vm.h> 4145095Ssos#include <vm/pmap.h> 4247272Ssos#if NPCI > 0 4345095Ssos#include <pci/pcivar.h> 4447272Ssos#endif 4551520Ssos#if NAPM > 0 4651520Ssos#include <machine/apm_bios.h> 4751520Ssos#endif 4845095Ssos#include <dev/ata/ata-all.h> 4954270Ssos#include <dev/ata/ata-disk.h> 5045095Ssos 5152067Ssos/* prototypes */ 5252067Ssosstatic void hpt366_timing(struct ata_softc *, int32_t, int32_t); 5352067Ssos 5452067Ssos/* misc defines */ 5552067Ssos#define MIN(a,b) ((a)>(b)?(b):(a)) 5645720Speter#ifdef __alpha__ 5745720Speter#undef vtophys 5851520Ssos#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 5945720Speter#endif 6045720Speter 6145150Ssos#if NPCI > 0 6245150Ssos 6345095Ssosint32_t 6445095Ssosata_dmainit(struct ata_softc *scp, int32_t device, 6545095Ssos int32_t apiomode, int32_t wdmamode, int32_t udmamode) 6645095Ssos{ 6745095Ssos int32_t type, devno, error; 6845095Ssos void *dmatab; 6945095Ssos 7045095Ssos if (!scp->bmaddr) 7145095Ssos return -1; 7251520Ssos#ifdef ATA_DMADEBUG 7345095Ssos printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 7445095Ssos scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 7545095Ssos#endif 7645095Ssos 7752067Ssos /* if simplex controller, only allow DMA on primary channel */ 7852067Ssos if (scp->unit == 1) { 7952067Ssos outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 8052067Ssos (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 8152067Ssos if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 8252067Ssos printf("ata%d: simplex device, DMA on primary channel only\n", 8352067Ssos scp->lun); 8452067Ssos return -1; 8552067Ssos } 8652067Ssos } 8752067Ssos 8845095Ssos if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 8951520Ssos return -1; 9045095Ssos 9145798Ssos if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 9245798Ssos (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 9351520Ssos printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 9451520Ssos free(dmatab, M_DEVBUF); 9551520Ssos return -1; 9645095Ssos } 9751520Ssos scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 9845095Ssos 9951520Ssos switch (type = pci_get_devid(scp->dev)) { 10045095Ssos 10145095Ssos case 0x71118086: /* Intel PIIX4 */ 10245095Ssos if (udmamode >= 2) { 10351520Ssos int32_t mask48, new48; 10445095Ssos 10545095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 10653029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 10751520Ssos if (bootverbose) 10851520Ssos printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 10951520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 11051520Ssos (error) ? "failed" : "success"); 11153681Ssos if (!error) { 11253681Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 11353681Ssos mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 11453681Ssos new48 = (1 << devno) + (2 << (16 + (devno << 2))); 11553681Ssos pci_write_config(scp->dev, 0x48, 11653681Ssos (pci_read_config(scp->dev, 0x48, 4) & 11753681Ssos ~mask48) | new48, 4); 11853681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 11953681Ssos return 0; 12053681Ssos } 12145095Ssos } 12245095Ssos /* FALLTHROUGH */ 12345095Ssos 12445095Ssos case 0x70108086: /* Intel PIIX3 */ 12545095Ssos if (wdmamode >= 2 && apiomode >= 4) { 12645095Ssos int32_t mask40, new40, mask44, new44; 12745095Ssos 12845095Ssos /* if SITRE not set doit for both channels */ 12945798Ssos if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 13051520Ssos new40 = pci_read_config(scp->dev, 0x40, 4); 13151520Ssos new44 = pci_read_config(scp->dev, 0x44, 4); 13251520Ssos if (!(new40 & 0x00004000)) { 13351520Ssos new44 &= ~0x0000000f; 13451520Ssos new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 13551520Ssos } 13651520Ssos if (!(new40 & 0x40000000)) { 13751520Ssos new44 &= ~0x000000f0; 13851520Ssos new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 13951520Ssos } 14051520Ssos new40 |= 0x40004000; 14151520Ssos pci_write_config(scp->dev, 0x40, new40, 4); 14251520Ssos pci_write_config(scp->dev, 0x44, new44, 4); 14345095Ssos } 14445095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 14553029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 14651520Ssos if (bootverbose) 14751520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 14851520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 14951520Ssos (error) ? "failed" : "success"); 15053681Ssos if (!error) { 15153681Ssos if (device == ATA_MASTER) { 15253681Ssos mask40 = 0x0000330f; 15353681Ssos new40 = 0x00002307; 15453681Ssos mask44 = 0; 15553681Ssos new44 = 0; 15653681Ssos } 15753681Ssos else { 15853681Ssos mask40 = 0x000000f0; 15953681Ssos new40 = 0x00000070; 16053681Ssos mask44 = 0x0000000f; 16153681Ssos new44 = 0x0000000b; 16253681Ssos } 16353681Ssos if (scp->unit) { 16453681Ssos mask40 <<= 16; 16553681Ssos new40 <<= 16; 16653681Ssos mask44 <<= 4; 16753681Ssos new44 <<= 4; 16853681Ssos } 16953681Ssos pci_write_config(scp->dev, 0x40, 17053681Ssos (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 17153681Ssos new40, 4); 17253681Ssos pci_write_config(scp->dev, 0x44, 17353681Ssos (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 17453681Ssos new44, 4); 17553681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 17653681Ssos return 0; 17745095Ssos } 17851520Ssos } 17953681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 18045095Ssos break; 18145095Ssos 18245095Ssos case 0x12308086: /* Intel PIIX */ 18345095Ssos /* probably not worth the trouble */ 18445095Ssos break; 18545095Ssos 18652067Ssos case 0x522910b9: /* AcerLabs Aladdin IV/V */ 18753029Ssos /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 18853029Ssos if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 18953029Ssos printf("ata%d: Aladdin: two atapi devices on this channel, " 19053029Ssos "DMA disabled\n", scp->lun); 19153029Ssos break; 19252067Ssos } 19353681Ssos if (udmamode >= 2) { 19452067Ssos int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 19552067Ssos 19651520Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 19753029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 19851520Ssos if (bootverbose) 19952067Ssos printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 20051520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 20151520Ssos (error) ? "failed" : "success"); 20253681Ssos if (!error) { 20353681Ssos word54 |= 0x5555; 20453681Ssos word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 20553681Ssos pci_write_config(scp->dev, 0x54, word54, 4); 20653681Ssos pci_write_config(scp->dev, 0x53, 20753681Ssos pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 20853681Ssos scp->flags |= ATA_ATAPI_DMA_RO; 20953681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 21053681Ssos return 0; 21153681Ssos } 21251520Ssos } 21353681Ssos if (wdmamode >= 2 && apiomode >= 4) { 21452067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 21553029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 21652067Ssos if (bootverbose) 21752067Ssos printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 21852067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 21952067Ssos (error) ? "failed" : "success"); 22053681Ssos if (!error) { 22153681Ssos pci_write_config(scp->dev, 0x53, 22253681Ssos pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 22353681Ssos scp->flags |= ATA_ATAPI_DMA_RO; 22453681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 22553681Ssos return 0; 22653681Ssos } 22752067Ssos } 22853681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 22952067Ssos break; 23052067Ssos 23154270Ssos case 0x05711106: /* VIA Apollo 82c571 / 82c586 / 82c686 */ 23253681Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 23354270Ssos 23454270Ssos /* UDMA4 mode only on rev 6 (VT82C686) hardware */ 23554270Ssos if (udmamode >= 4 && pci_read_config(scp->dev, 0x08, 1) == 0x06) { 23653681Ssos int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 23753681Ssos 23853681Ssos /* enable UDMA transfer modes setting by SETFEATURES cmd */ 23953681Ssos pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 24054270Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 24153681Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 24254270Ssos if (bootverbose) 24354270Ssos printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n", 24454270Ssos scp->lun, (device == ATA_MASTER) ? "master":"slave", 24554270Ssos (error) ? "failed" : "success"); 24654270Ssos if (!error) { 24754270Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 24854270Ssos return 0; 24953681Ssos } 25054270Ssos pci_write_config(scp->dev, 0x53 - devno, byte, 1); 25154270Ssos } 25254270Ssos 25354270Ssos /* UDMA2 mode only on rev 1 and up (VT82C586, VT82C686) hardware */ 25454270Ssos if (udmamode >= 2 && pci_read_config(scp->dev, 0x08, 1) >= 0x01) { 25554270Ssos int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 25654270Ssos 25754270Ssos /* enable UDMA transfer modes setting by SETFEATURES cmd */ 25854270Ssos pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 25953681Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 26053681Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 26153681Ssos if (bootverbose) 26253681Ssos printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n", 26353681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 26453681Ssos (error) ? "failed" : "success"); 26553681Ssos if (!error) { 26654270Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATA_MASTER) || 26754270Ssos (device == ATA_SLAVE && scp->devices & ATA_ATA_SLAVE)) { 26854270Ssos struct ata_params *ap = ((struct ad_softc *) 26954270Ssos (scp->dev_softc[(device==ATA_MASTER)?0:1]))->ata_parm; 27054270Ssos 27154270Ssos if ((pci_read_config(scp->dev, 0x08, 1) == 0x06) && 27254270Ssos (ap->udmamodes & 0x10) && !ap->cblid) { 27354270Ssos pci_write_config(scp->dev, 0x53 - devno, 27454270Ssos (byte & 0x1c) | 0x42, 1); 27554270Ssos } 27654270Ssos } 27753681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 27853681Ssos return 0; 27953681Ssos } 28053681Ssos pci_write_config(scp->dev, 0x53 - devno, byte, 1); 28153681Ssos } 28253681Ssos if (wdmamode >= 2 && apiomode >= 4) { 28353681Ssos /* set WDMA2 mode timing */ 28453681Ssos pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1); 28553681Ssos 28653681Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 28753681Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 28853681Ssos if (bootverbose) 28953681Ssos printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n", 29053681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 29153681Ssos (error) ? "failed" : "success"); 29253681Ssos if (!error) { 29353681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 29453681Ssos return 0; 29553681Ssos } 29653681Ssos } 29753681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 29853681Ssos break; 29953681Ssos 30052067Ssos case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 30152067Ssos case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 30252067Ssos /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 30352067Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 30452067Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 30552067Ssos break; 30652067Ssos 30752067Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 30852918Ssos if (udmamode >=4 && type == 0x4d38105a && 30952918Ssos !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 31052918Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 31153029Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 31252918Ssos if (bootverbose) 31352918Ssos printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n", 31452918Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 31552918Ssos (error) ? "failed" : "success"); 31653681Ssos if (!error) { 31753681Ssos outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 31853681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 31953681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 32053681Ssos return 0; 32153681Ssos } 32252918Ssos } 32353681Ssos if (udmamode >= 2) { 32445095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 32553029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 32651520Ssos if (bootverbose) 32751520Ssos printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 32851520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 32951520Ssos (error) ? "failed" : "success"); 33053681Ssos if (!error) { 33153681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 33253681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 33353681Ssos return 0; 33453681Ssos } 33545095Ssos } 33653681Ssos if (wdmamode >= 2 && apiomode >= 4) { 33745095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 33853029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 33951520Ssos if (bootverbose) 34051520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 34151520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 34251520Ssos (error) ? "failed" : "success"); 34353681Ssos if (!error) { 34453681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 34553681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 34653681Ssos return 0; 34753681Ssos } 34851520Ssos } 34953681Ssos if (bootverbose) 35053681Ssos printf("ata%d: %s: setting PIO mode on Promise chip\n", 35153681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 35253681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 35345095Ssos break; 35445095Ssos 35554270Ssos case 0x00041103: /* HighPoint HPT366 controller */ 35653681Ssos /* no ATAPI devices for now */ 35751520Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 35852067Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 35952067Ssos break; 36051520Ssos 36152067Ssos devno = (device == ATA_MASTER) ? 0 : 1; 36252067Ssos if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 36352067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 36453029Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 36552067Ssos if (bootverbose) 36652067Ssos printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 36752067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 36852067Ssos (error) ? "failed" : "success"); 36953681Ssos if (!error) { 37053681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA4); 37153681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 37253681Ssos return 0; 37353681Ssos } 37451520Ssos } 37552918Ssos if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 37645095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 37753029Ssos ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 37852067Ssos if (bootverbose) 37952067Ssos printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 38052067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 38152067Ssos (error) ? "failed" : "success"); 38253681Ssos if (!error) { 38353681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA3); 38453681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 38553681Ssos return 0; 38653681Ssos } 38752067Ssos } 38853681Ssos if (udmamode >= 2) { 38952067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 39053029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 39151520Ssos if (bootverbose) 39252067Ssos printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 39351520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 39451520Ssos (error) ? "failed" : "success"); 39553681Ssos if (!error) { 39653681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA2); 39753681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 39853681Ssos return 0; 39953681Ssos } 40045095Ssos } 40153681Ssos if (wdmamode >= 2 && apiomode >= 4) { 40245095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 40353029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 40451520Ssos if (bootverbose) 40552067Ssos printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 40651520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 40751520Ssos (error) ? "failed" : "success"); 40853681Ssos if (!error) { 40953681Ssos hpt366_timing(scp, device, ATA_MODE_WDMA2); 41053681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 41153681Ssos return 0; 41253681Ssos } 41345095Ssos } 41453681Ssos if (bootverbose) 41553681Ssos printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 41653681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 41753681Ssos hpt366_timing(scp, device, ATA_MODE_PIO); 41845095Ssos break; 41945095Ssos 42051548Ssos default: /* unknown controller chip */ 42151548Ssos /* better not try generic DMA on ATAPI devices it almost never works */ 42251548Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 42351548Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 42451548Ssos break; 42551548Ssos 42651548Ssos /* well, we have no support for this, but try anyways */ 42751520Ssos if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) && 42851520Ssos (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 42951520Ssos ((device == ATA_MASTER) ? 43051520Ssos ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) { 43145095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 43253029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 43351520Ssos if (bootverbose) 43451520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 43551520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 43651520Ssos (error) ? "failed" : "success"); 43753681Ssos if (!error) { 43853681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 43953681Ssos return 0; 44053681Ssos } 44145095Ssos } 44245095Ssos } 44345095Ssos free(dmatab, M_DEVBUF); 44445095Ssos return -1; 44545095Ssos} 44645095Ssos 44745095Ssosint32_t 44845095Ssosata_dmasetup(struct ata_softc *scp, int32_t device, 44945095Ssos int8_t *data, int32_t count, int32_t flags) 45045095Ssos{ 45145095Ssos struct ata_dmaentry *dmatab; 45245095Ssos u_int32_t dma_count, dma_base; 45345095Ssos int32_t i = 0; 45445095Ssos 45551520Ssos#ifdef ATA_DMADEBUG 45645095Ssos printf("ata%d: dmasetup\n", scp->lun); 45745095Ssos#endif 45845720Speter if (((uintptr_t)data & 1) || (count & 1)) 45945095Ssos return -1; 46045095Ssos 46145095Ssos if (!count) { 46251520Ssos#ifdef ATA_DMADEBUG 46345095Ssos printf("ata%d: zero length DMA transfer attempt on %s\n", 46451520Ssos scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 46551520Ssos#endif 46645095Ssos return -1; 46745095Ssos } 46845095Ssos 46951520Ssos dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 47045095Ssos dma_base = vtophys(data); 47145720Speter dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 47245095Ssos data += dma_count; 47345095Ssos count -= dma_count; 47445095Ssos 47545095Ssos while (count) { 47645095Ssos dmatab[i].base = dma_base; 47745095Ssos dmatab[i].count = (dma_count & 0xffff); 47845095Ssos i++; 47945095Ssos if (i >= ATA_DMA_ENTRIES) { 48045095Ssos printf("ata%d: too many segments in DMA table for %s\n", 48145095Ssos scp->lun, (device ? "slave" : "master")); 48245095Ssos return -1; 48345095Ssos } 48445095Ssos dma_base = vtophys(data); 48545095Ssos dma_count = MIN(count, PAGE_SIZE); 48645095Ssos data += MIN(count, PAGE_SIZE); 48745095Ssos count -= MIN(count, PAGE_SIZE); 48845095Ssos } 48951520Ssos#ifdef ATA_DMADEBUG 49051520Ssos printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 49145095Ssos#endif 49245095Ssos dmatab[i].base = dma_base; 49345095Ssos dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 49445095Ssos 49545095Ssos outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 49651520Ssos#ifdef ATA_DMADEBUG 49751520Ssos printf("dmatab=%08x %08x\n", 49851520Ssos vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 49945095Ssos#endif 50045095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 50145095Ssos outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 50245095Ssos (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 50345095Ssos return 0; 50445095Ssos} 50545095Ssos 50645095Ssosvoid 50752067Ssosata_dmastart(struct ata_softc *scp) 50845095Ssos{ 50951520Ssos#ifdef ATA_DMADEBUG 51045095Ssos printf("ata%d: dmastart\n", scp->lun); 51145095Ssos#endif 51252067Ssos scp->flags |= ATA_DMA_ACTIVE; 51345095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, 51445095Ssos inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 51545095Ssos} 51645095Ssos 51745095Ssosint32_t 51852067Ssosata_dmadone(struct ata_softc *scp) 51945095Ssos{ 52051520Ssos#ifdef ATA_DMADEBUG 52145095Ssos printf("ata%d: dmadone\n", scp->lun); 52245095Ssos#endif 52345095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, 52445095Ssos inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 52552067Ssos scp->flags &= ~ATA_DMA_ACTIVE; 52645095Ssos return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 52745095Ssos} 52845095Ssos 52945095Ssosint32_t 53052067Ssosata_dmastatus(struct ata_softc *scp) 53145095Ssos{ 53251520Ssos#ifdef ATA_DMADEBUG 53345095Ssos printf("ata%d: dmastatus\n", scp->lun); 53445095Ssos#endif 53545095Ssos return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 53645095Ssos} 53745095Ssos 53852067Ssosstatic void 53952067Ssoshpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 54052067Ssos{ 54152067Ssos u_int32_t timing; 54252067Ssos 54352067Ssos switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 54452067Ssos case 0x85: /* 25Mhz */ 54552067Ssos switch (mode) { 54652067Ssos case ATA_MODE_PIO: timing = 0xc0ca8521; break; 54752067Ssos case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 54852067Ssos case ATA_MODE_UDMA2: 54952067Ssos case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 55052067Ssos case ATA_MODE_UDMA4: timing = 0x90c98521; break; 55152067Ssos default: timing = 0x01208585; 55252067Ssos } 55352067Ssos break; 55452067Ssos default: 55552067Ssos case 0xa7: /* 33MHz */ 55652067Ssos switch (mode) { 55752067Ssos case ATA_MODE_PIO: timing = 0xc0c8a731; break; 55852067Ssos case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 55952067Ssos case ATA_MODE_UDMA2: timing = 0x90caa731; break; 56052067Ssos case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 56152067Ssos case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 56252067Ssos default: timing = 0x0120a7a7; 56352067Ssos } 56452067Ssos break; 56552067Ssos case 0xd9: /* 40Mhz */ 56652067Ssos switch (mode) { 56752067Ssos case ATA_MODE_PIO: timing = 0xc008d963; break; 56852067Ssos case ATA_MODE_WDMA2: timing = 0xa008d943; break; 56952067Ssos case ATA_MODE_UDMA2: timing = 0x900bd943; break; 57052067Ssos case ATA_MODE_UDMA3: timing = 0x900ad943; break; 57152067Ssos case ATA_MODE_UDMA4: timing = 0x900fd943; break; 57252067Ssos default: timing = 0x0120d9d9; 57352067Ssos } 57452067Ssos } 57552067Ssos pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 57652067Ssos} 57752067Ssos 57845095Ssos#else /* NPCI > 0 */ 57945095Ssos 58045095Ssosint32_t 58145095Ssosata_dmainit(struct ata_softc *scp, int32_t device, 58251520Ssos int32_t piomode, int32_t wdmamode, int32_t udmamode) 58345095Ssos{ 58445095Ssos return -1; 58545095Ssos} 58645095Ssos 58745095Ssosint32_t 58845095Ssosata_dmasetup(struct ata_softc *scp, int32_t device, 58951520Ssos int8_t *data, int32_t count, int32_t flags) 59045095Ssos{ 59145095Ssos return -1; 59245095Ssos} 59345095Ssos 59445095Ssosvoid 59552067Ssosata_dmastart(struct ata_softc *scp) 59645095Ssos{ 59745095Ssos} 59845095Ssos 59945095Ssosint32_t 60052067Ssosata_dmadone(struct ata_softc *scp) 60145095Ssos{ 60245095Ssos return -1; 60345095Ssos} 60445095Ssos 60545095Ssosint32_t 60652067Ssosata_dmastatus(struct ata_softc *scp) 60745095Ssos{ 60845095Ssos return -1; 60945095Ssos} 61045095Ssos 61145095Ssos#endif /* NPCI > 0 */ 612