cvmx-key.h revision 210284 
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38
39
40
41
42
43
44/**
45 * @file
46 *
47 * Interface to the on chip key memory. Key memory is
48 * 8k on chip that is inaccessible from off chip. It can
49 * also be cleared using an external hardware pin.
50 *
51 * <hr>$Revision: 41586 $<hr>
52 *
53 */
54
55#ifndef __CVMX_KEY_H__
56#define __CVMX_KEY_H__
57
58#ifdef	__cplusplus
59extern "C" {
60#endif
61
62#define CVMX_KEY_MEM_SIZE 8192  /* Size in bytes */
63
64
65/**
66 * Read from KEY memory
67 *
68 * @param address Address (byte) in key memory to read
69 *                0 <= address < CVMX_KEY_MEM_SIZE
70 * @return Value from key memory
71 */
72static inline uint64_t cvmx_key_read(uint64_t address)
73{
74    cvmx_addr_t ptr;
75
76    ptr.u64 = 0;
77    ptr.sio.mem_region  = CVMX_IO_SEG;
78    ptr.sio.is_io       = 1;
79    ptr.sio.did         = CVMX_OCT_DID_KEY_RW;
80    ptr.sio.offset      = address;
81
82    return cvmx_read_csr(ptr.u64);
83}
84
85
86/**
87 * Write to KEY memory
88 *
89 * @param address Address (byte) in key memory to write
90 *                0 <= address < CVMX_KEY_MEM_SIZE
91 * @param value   Value to write to key memory
92 */
93static inline void cvmx_key_write(uint64_t address, uint64_t value)
94{
95    cvmx_addr_t ptr;
96
97    ptr.u64 = 0;
98    ptr.sio.mem_region  = CVMX_IO_SEG;
99    ptr.sio.is_io       = 1;
100    ptr.sio.did         = CVMX_OCT_DID_KEY_RW;
101    ptr.sio.offset      = address;
102
103    cvmx_write_io(ptr.u64, value);
104}
105
106
107/* CSR typedefs have been moved to cvmx-csr-*.h */
108
109#ifdef	__cplusplus
110}
111#endif
112
113#endif /*  __CVMX_KEY_H__ */
114