1296177Sjhibbits/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc. 2296177Sjhibbits * All rights reserved. 3296177Sjhibbits * 4296177Sjhibbits * Redistribution and use in source and binary forms, with or without 5296177Sjhibbits * modification, are permitted provided that the following conditions are met: 6296177Sjhibbits * * Redistributions of source code must retain the above copyright 7296177Sjhibbits * notice, this list of conditions and the following disclaimer. 8296177Sjhibbits * * Redistributions in binary form must reproduce the above copyright 9296177Sjhibbits * notice, this list of conditions and the following disclaimer in the 10296177Sjhibbits * documentation and/or other materials provided with the distribution. 11296177Sjhibbits * * Neither the name of Freescale Semiconductor nor the 12296177Sjhibbits * names of its contributors may be used to endorse or promote products 13296177Sjhibbits * derived from this software without specific prior written permission. 14296177Sjhibbits * 15296177Sjhibbits * 16296177Sjhibbits * ALTERNATIVELY, this software may be distributed under the terms of the 17296177Sjhibbits * GNU General Public License ("GPL") as published by the Free Software 18296177Sjhibbits * Foundation, either version 2 of that License or (at your option) any 19296177Sjhibbits * later version. 20296177Sjhibbits * 21296177Sjhibbits * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22296177Sjhibbits * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23296177Sjhibbits * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24296177Sjhibbits * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25296177Sjhibbits * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26296177Sjhibbits * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27296177Sjhibbits * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28296177Sjhibbits * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29296177Sjhibbits * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30296177Sjhibbits * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31296177Sjhibbits */ 32296177Sjhibbits 33296177Sjhibbits#ifndef __TGEC_MII_ACC_H 34296177Sjhibbits#define __TGEC_MII_ACC_H 35296177Sjhibbits 36296177Sjhibbits#include "std_ext.h" 37296177Sjhibbits 38296177Sjhibbits 39296177Sjhibbits/* MII Management Command Register */ 40296177Sjhibbits#define MIIMCOM_READ_POST_INCREMENT 0x00004000 41296177Sjhibbits#define MIIMCOM_READ_CYCLE 0x00008000 42296177Sjhibbits#define MIIMCOM_SCAN_CYCLE 0x00000800 43296177Sjhibbits#define MIIMCOM_PREAMBLE_DISABLE 0x00000400 44296177Sjhibbits 45296177Sjhibbits#define MIIMCOM_MDIO_HOLD_1_REG_CLK 0 46296177Sjhibbits#define MIIMCOM_MDIO_HOLD_2_REG_CLK 1 47296177Sjhibbits#define MIIMCOM_MDIO_HOLD_3_REG_CLK 2 48296177Sjhibbits#define MIIMCOM_MDIO_HOLD_4_REG_CLK 3 49296177Sjhibbits 50296177Sjhibbits#define MIIMCOM_DIV_MASK 0x0000ff00 51296177Sjhibbits#define MIIMCOM_DIV_SHIFT 8 52296177Sjhibbits 53296177Sjhibbits/* MII Management Indicator Register */ 54296177Sjhibbits#define MIIMIND_BUSY 0x00000001 55296177Sjhibbits#define MIIMIND_READ_ERROR 0x00000002 56296177Sjhibbits 57296177Sjhibbits#define MIIDATA_BUSY 0x80000000 58296177Sjhibbits 59296177Sjhibbits#if defined(__MWERKS__) && !defined(__GNUC__) 60296177Sjhibbits#pragma pack(push,1) 61296177Sjhibbits#endif /* defined(__MWERKS__) && ... */ 62296177Sjhibbits#define MEM_MAP_START 63296177Sjhibbits 64296177Sjhibbits/*----------------------------------------------------*/ 65296177Sjhibbits/* MII Configuration Control Memory Map Registers */ 66296177Sjhibbits/*----------------------------------------------------*/ 67296177Sjhibbitstypedef _Packed struct t_TgecMiiAccessMemMap 68296177Sjhibbits{ 69296177Sjhibbits volatile uint32_t mdio_cfg_status; /* 0x030 */ 70296177Sjhibbits volatile uint32_t mdio_command; /* 0x034 */ 71296177Sjhibbits volatile uint32_t mdio_data; /* 0x038 */ 72296177Sjhibbits volatile uint32_t mdio_regaddr; /* 0x03c */ 73296177Sjhibbits} _PackedType t_TgecMiiAccessMemMap ; 74296177Sjhibbits 75296177Sjhibbits#define MEM_MAP_END 76296177Sjhibbits#if defined(__MWERKS__) && !defined(__GNUC__) 77296177Sjhibbits#pragma pack(pop) 78296177Sjhibbits#endif /* defined(__MWERKS__) && ... */ 79296177Sjhibbits 80296177Sjhibbits 81296177Sjhibbits#endif /* __TGEC_MII_ACC_H */ 82