dtrace_asm.S revision 246275
1242723Sjhibbits/*
2242723Sjhibbits * CDDL HEADER START
3242723Sjhibbits *
4242723Sjhibbits * The contents of this file are subject to the terms of the
5242723Sjhibbits * Common Development and Distribution License, Version 1.0 only
6242723Sjhibbits * (the "License").  You may not use this file except in compliance
7242723Sjhibbits * with the License.
8242723Sjhibbits *
9242723Sjhibbits * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10242723Sjhibbits * or http://www.opensolaris.org/os/licensing.
11242723Sjhibbits * See the License for the specific language governing permissions
12242723Sjhibbits * and limitations under the License.
13242723Sjhibbits *
14242723Sjhibbits * When distributing Covered Code, include this CDDL HEADER in each
15242723Sjhibbits * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16242723Sjhibbits * If applicable, add the following below this CDDL HEADER, with the
17242723Sjhibbits * fields enclosed by brackets "[]" replaced with your own identifying
18242723Sjhibbits * information: Portions Copyright [yyyy] [name of copyright owner]
19242723Sjhibbits *
20242723Sjhibbits * CDDL HEADER END
21242723Sjhibbits *
22246275Sjhibbits * Portions Copyright 2012,2013 Justin Hibbits <jhibbits@freebsd.org>
23246275Sjhibbits *
24242723Sjhibbits * $FreeBSD: head/sys/cddl/dev/dtrace/powerpc/dtrace_asm.S 246275 2013-02-03 00:19:34Z jhibbits $
25242723Sjhibbits */
26242723Sjhibbits/*
27242723Sjhibbits * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
28242723Sjhibbits * Use is subject to license terms.
29242723Sjhibbits */
30242723Sjhibbits
31242723Sjhibbits#include "assym.s"
32242723Sjhibbits
33242723Sjhibbits#define _ASM
34242723Sjhibbits
35242723Sjhibbits#include <sys/cpuvar_defs.h>
36242723Sjhibbits#include <sys/dtrace.h>
37242723Sjhibbits
38242723Sjhibbits#include <machine/asm.h>
39242723Sjhibbits/*
40242723Sjhibbits#include <machine/cpu.h>
41242723Sjhibbits*/
42242723Sjhibbits
43242723Sjhibbits/*
44242723Sjhibbits * Primitives
45242723Sjhibbits */
46242723Sjhibbits
47242723Sjhibbits        .text
48242723Sjhibbits
49242723Sjhibbits/*
50242723Sjhibbitsvoid dtrace_membar_producer(void)
51242723Sjhibbits*/
52242723SjhibbitsASENTRY_NOPROF(dtrace_membar_producer)
53242723Sjhibbits	blr
54242723SjhibbitsEND(dtrace_membar_producer)
55242723Sjhibbits
56242723Sjhibbits/*
57242723Sjhibbitsvoid dtrace_membar_consumer(void)
58242723Sjhibbits*/
59242723SjhibbitsASENTRY_NOPROF(dtrace_membar_consumer)
60242723Sjhibbits	blr
61242723SjhibbitsEND(dtrace_membar_consumer)
62242723Sjhibbits
63242723Sjhibbits/*
64242723Sjhibbitsdtrace_icookie_t dtrace_interrupt_disable(void)
65242723Sjhibbits*/
66242723SjhibbitsASENTRY_NOPROF(dtrace_interrupt_disable)
67242723Sjhibbits	mfmsr	%r3
68242723Sjhibbits	andi.	%r0,%r3,~PSL_EE@l
69242723Sjhibbits	mtmsr	%r0
70242723Sjhibbits	blr
71242723SjhibbitsEND(dtrace_interrupt_disable)
72242723Sjhibbits
73242723Sjhibbits/*
74242723Sjhibbitsvoid dtrace_interrupt_enable(dtrace_icookie_t cookie)
75242723Sjhibbits*/
76242723SjhibbitsASENTRY_NOPROF(dtrace_interrupt_enable)
77242723Sjhibbits	mtmsr	%r3
78242723Sjhibbits	blr
79242723SjhibbitsEND(dtrace_interrupt_enable)
80242723Sjhibbits
81242723Sjhibbits/*
82242723Sjhibbitsuint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
83242723Sjhibbits*/
84242723SjhibbitsASENTRY_NOPROF(dtrace_cas32)
85242723Sjhibbits1:
86242723Sjhibbits	lwarx	%r0,0,%r3
87242723Sjhibbits	cmpw	%r4,%r0
88242723Sjhibbits	bne		2f
89242723Sjhibbits	stwcx.	%r5,0,%r3
90242723Sjhibbits	bne		1b
91242723Sjhibbits2:	mr		%r3,%r0
92242723Sjhibbits	blr
93242723SjhibbitsEND(dtrace_cas32)
94242723Sjhibbits
95242723Sjhibbits/*
96242723Sjhibbitsvoid *
97242723Sjhibbitsdtrace_casptr(void *target, void *cmp, void *new)
98242723Sjhibbits*/
99242723SjhibbitsASENTRY_NOPROF(dtrace_casptr)
100242723Sjhibbits1:
101242723Sjhibbits	lwarx	%r0,0,%r3
102242723Sjhibbits	cmpw	%r4,%r0
103242723Sjhibbits	bne		2f
104242723Sjhibbits	stwcx.	%r5,0,%r3
105242723Sjhibbits	bne		1b
106242723Sjhibbits2:	mr		%r3,%r0
107242723Sjhibbits	blr
108242723SjhibbitsEND(dtrace_casptr)
109242723Sjhibbits
110242723Sjhibbits
111242723Sjhibbits/*
112242723Sjhibbitsuintptr_t
113242723Sjhibbitsdtrace_fulword(void *addr)
114242723Sjhibbits*/
115242723SjhibbitsASENTRY_NOPROF(dtrace_fulword)
116242723SjhibbitsEND(dtrace_fulword)
117242723Sjhibbits
118242723Sjhibbits/*
119242723SjhibbitsXXX: unoptimized
120242723Sjhibbitsvoid
121242723Sjhibbitsdtrace_copy(uintptr_t src, uintptr_t dest, size_t size)
122242723Sjhibbits*/
123242723SjhibbitsASENTRY_NOPROF(dtrace_copy)
124242723Sjhibbits	addme	%r7,%r3
125242723Sjhibbits	addme	%r8,%r4
126242723Sjhibbits1:
127242723Sjhibbits	lbzu	%r3,1(%r7)
128242723Sjhibbits	stbu	%r3,1(%r8)
129242723Sjhibbits	addme	%r5,%r5
130242723Sjhibbits	beq		2f
131242723Sjhibbits2:
132242723Sjhibbits	blr
133242723SjhibbitsEND(dtrace_copy)
134242723Sjhibbits
135242723Sjhibbits/*
136242723Sjhibbitsvoid
137242723Sjhibbitsdtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
138242723Sjhibbits    volatile uint16_t *flags)
139242723Sjhibbits*/
140242723SjhibbitsASENTRY_NOPROF(dtrace_copystr)
141242723Sjhibbits	addme	%r7,%r3
142242723Sjhibbits	addme	%r8,%r4
143242723Sjhibbits1:
144242723Sjhibbits	lbzu	%r3,1(%r7)
145242723Sjhibbits	stbu	%r3,1(%r8)
146242723Sjhibbits	addme	%r5,%r5
147242723Sjhibbits	beq		2f
148242723Sjhibbits	or		%r3,%r3,%r3
149242723Sjhibbits	beq		2f
150242723Sjhibbits	andi.	%r0,%r5,0x0fff
151242723Sjhibbits	beq		2f
152242723Sjhibbits	lwz		%r0,0(%r6)
153242723Sjhibbits	andi.	%r0,%r0,CPU_DTRACE_BADADDR
154242723Sjhibbits	beq		1b
155242723Sjhibbits2:
156242723Sjhibbits	blr
157242723SjhibbitsEND(dtrace_copystr)
158242723Sjhibbits
159242723Sjhibbits/*
160242723Sjhibbitsvoid dtrace_invop_init(void)
161242723Sjhibbits*/
162242723SjhibbitsASENTRY_NOPROF(dtrace_invop_init)
163242723Sjhibbits	/* XXX: impement it properly -- implement dtrace_invop_start */
164242723Sjhibbits	li		%r0,0
165242723Sjhibbits	li		%r3,dtrace_invop_jump_addr@l
166242723Sjhibbits	addis	%r3,%r3,dtrace_invop_jump_addr@ha
167242723Sjhibbits	stw		%r0,0(%r3)
168242723Sjhibbits	blr
169242723SjhibbitsEND(dtrace_invop_init)
170242723Sjhibbits
171242723Sjhibbits/*
172242723Sjhibbitsvoid dtrace_invop_uninit(void)
173242723Sjhibbits*/
174242723SjhibbitsASENTRY_NOPROF(dtrace_invop_uninit)
175242723Sjhibbits	li		%r0,0
176242723Sjhibbits	li		%r3,dtrace_invop_jump_addr@l
177242723Sjhibbits	addis	%r3,%r3,dtrace_invop_jump_addr@ha
178242723Sjhibbits	stw		%r0,0(%r3)
179242723Sjhibbits	blr
180242723SjhibbitsEND(dtrace_invop_uninit)
181242723Sjhibbits
182242723Sjhibbits/*
183242723Sjhibbits * The panic() and cmn_err() functions invoke vpanic() as a common entry point
184242723Sjhibbits * into the panic code implemented in panicsys().  vpanic() is responsible
185242723Sjhibbits * for passing through the format string and arguments, and constructing a
186242723Sjhibbits * regs structure on the stack into which it saves the current register
187242723Sjhibbits * values.  If we are not dying due to a fatal trap, these registers will
188242723Sjhibbits * then be preserved in panicbuf as the current processor state.  Before
189242723Sjhibbits * invoking panicsys(), vpanic() activates the first panic trigger (see
190242723Sjhibbits * common/os/panic.c) and switches to the panic_stack if successful.  Note that
191242723Sjhibbits * DTrace takes a slightly different panic path if it must panic from probe
192242723Sjhibbits * context.  Instead of calling panic, it calls into dtrace_vpanic(), which
193242723Sjhibbits * sets up the initial stack as vpanic does, calls dtrace_panic_trigger(), and
194242723Sjhibbits * branches back into vpanic().
195242723Sjhibbits */
196242723Sjhibbits
197242723Sjhibbits/*
198242723Sjhibbitsvoid
199242723Sjhibbitsvpanic(const char *format, va_list alist)
200242723Sjhibbits*/
201242723SjhibbitsASENTRY_NOPROF(vpanic)				/* Initial stack layout: */
202242723Sjhibbits
203242723Sjhibbitsvpanic_common:
204242723Sjhibbits	blr
205242723SjhibbitsEND(vpanic)
206242723Sjhibbits
207242723Sjhibbits
208242723Sjhibbits
209242723Sjhibbits/*
210242723Sjhibbitsvoid
211242723Sjhibbitsdtrace_vpanic(const char *format, va_list alist)
212242723Sjhibbits*/
213242723SjhibbitsASENTRY_NOPROF(dtrace_vpanic)			/* Initial stack layout: */
214242723Sjhibbits
215242723Sjhibbits#if 0
216242723Sjhibbits	bl	dtrace_panic_trigger	/* %eax = dtrace_panic_trigger() */
217242723Sjhibbits#endif
218242723Sjhibbits	b	vpanic_common
219242723SjhibbitsEND(dtrace_vpanic)
220242723Sjhibbits
221242723Sjhibbits/*
222242723Sjhibbitsuintptr_t
223242723Sjhibbitsdtrace_caller(int aframes)
224242723Sjhibbits*/
225242723SjhibbitsASENTRY_NOPROF(dtrace_caller)
226242723Sjhibbits	li	%r3, -1
227242723Sjhibbits	blr
228242723SjhibbitsEND(dtrace_caller)
229242723Sjhibbits
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