dtrace_subr.c revision 299746
1216828Syongari/* 2216828Syongari * CDDL HEADER START 3216828Syongari * 4216828Syongari * The contents of this file are subject to the terms of the 5216828Syongari * Common Development and Distribution License, Version 1.0 only 6216828Syongari * (the "License"). You may not use this file except in compliance 7216828Syongari * with the License. 8216828Syongari * 9216828Syongari * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10216828Syongari * or http://www.opensolaris.org/os/licensing. 11216828Syongari * See the License for the specific language governing permissions 12216828Syongari * and limitations under the License. 13216828Syongari * 14216828Syongari * When distributing Covered Code, include this CDDL HEADER in each 15216828Syongari * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16216828Syongari * If applicable, add the following below this CDDL HEADER, with the 17216828Syongari * fields enclosed by brackets "[]" replaced with your own identifying 18216828Syongari * information: Portions Copyright [yyyy] [name of copyright owner] 19216828Syongari * 20216828Syongari * CDDL HEADER END 21216828Syongari * 22216828Syongari * $FreeBSD: head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c 299746 2016-05-14 18:22:52Z jhb $ 23216828Syongari * 24216828Syongari */ 25216828Syongari/* 26216828Syongari * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 27216828Syongari * Use is subject to license terms. 28216828Syongari */ 29216828Syongari 30216828Syongari/* 31216828Syongari * Copyright (c) 2011, Joyent, Inc. All rights reserved. 32216828Syongari */ 33216828Syongari 34216828Syongari#include <sys/param.h> 35216828Syongari#include <sys/systm.h> 36216828Syongari#include <sys/types.h> 37216828Syongari#include <sys/kernel.h> 38216828Syongari#include <sys/malloc.h> 39216828Syongari#include <sys/kmem.h> 40216828Syongari#include <sys/smp.h> 41216828Syongari#include <sys/dtrace_impl.h> 42216828Syongari#include <sys/dtrace_bsd.h> 43216828Syongari#include <machine/clock.h> 44216828Syongari#include <machine/frame.h> 45216828Syongari#include <vm/pmap.h> 46216828Syongari 47216828Syongariextern void dtrace_getnanotime(struct timespec *tsp); 48216828Syongari 49216828Syongariint dtrace_invop(uintptr_t, struct trapframe *, uintptr_t); 50216828Syongari 51216828Syongaritypedef struct dtrace_invop_hdlr { 52216828Syongari int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); 53216828Syongari struct dtrace_invop_hdlr *dtih_next; 54216828Syongari} dtrace_invop_hdlr_t; 55216828Syongari 56216828Syongaridtrace_invop_hdlr_t *dtrace_invop_hdlr; 57216828Syongari 58216828Syongariint 59216828Syongaridtrace_invop(uintptr_t addr, struct trapframe *frame, uintptr_t eax) 60216828Syongari{ 61216828Syongari dtrace_invop_hdlr_t *hdlr; 62216828Syongari int rval; 63216828Syongari 64216828Syongari for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 65216828Syongari if ((rval = hdlr->dtih_func(addr, frame, eax)) != 0) 66216828Syongari return (rval); 67216828Syongari 68227848Smarius return (0); 69216828Syongari} 70216828Syongari 71216828Syongarivoid 72216828Syongaridtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 73216828Syongari{ 74216828Syongari dtrace_invop_hdlr_t *hdlr; 75216828Syongari 76216828Syongari hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 77216828Syongari hdlr->dtih_func = func; 78216828Syongari hdlr->dtih_next = dtrace_invop_hdlr; 79216828Syongari dtrace_invop_hdlr = hdlr; 80216828Syongari} 81216828Syongari 82216828Syongarivoid 83216828Syongaridtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 84216828Syongari{ 85216828Syongari dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 86216828Syongari 87216828Syongari for (;;) { 88216828Syongari if (hdlr == NULL) 89221407Smarius panic("attempt to remove non-existent invop handler"); 90221407Smarius 91221407Smarius if (hdlr->dtih_func == func) 92221407Smarius break; 93221407Smarius 94221407Smarius prev = hdlr; 95216828Syongari hdlr = hdlr->dtih_next; 96216828Syongari } 97216828Syongari 98216828Syongari if (prev == NULL) { 99216828Syongari ASSERT(dtrace_invop_hdlr == hdlr); 100216828Syongari dtrace_invop_hdlr = hdlr->dtih_next; 101216828Syongari } else { 102216828Syongari ASSERT(dtrace_invop_hdlr != hdlr); 103216828Syongari prev->dtih_next = hdlr->dtih_next; 104216828Syongari } 105216828Syongari 106221407Smarius kmem_free(hdlr, 0); 107216828Syongari} 108216828Syongari 109216828Syongari/*ARGSUSED*/ 110216828Syongarivoid 111216828Syongaridtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 112216828Syongari{ 113216828Syongari (*func)(0, (uintptr_t) addr_PTmap); 114216828Syongari} 115216828Syongari 116216828Syongarivoid 117216828Syongaridtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 118216828Syongari{ 119216828Syongari cpuset_t cpus; 120216828Syongari 121216828Syongari if (cpu == DTRACE_CPUALL) 122216828Syongari cpus = all_cpus; 123216828Syongari else 124216828Syongari CPU_SETOF(cpu, &cpus); 125216828Syongari 126216828Syongari smp_rendezvous_cpus(cpus, smp_no_rendevous_barrier, func, 127216828Syongari smp_no_rendevous_barrier, arg); 128216828Syongari} 129216828Syongari 130216828Syongaristatic void 131216828Syongaridtrace_sync_func(void) 132216828Syongari{ 133216828Syongari} 134216828Syongari 135216828Syongarivoid 136216828Syongaridtrace_sync(void) 137216828Syongari{ 138216828Syongari dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 139216828Syongari} 140216828Syongari 141216828Syongari#ifdef notyet 142216828Syongarivoid 143216828Syongaridtrace_safe_synchronous_signal(void) 144216828Syongari{ 145216828Syongari kthread_t *t = curthread; 146216828Syongari struct regs *rp = lwptoregs(ttolwp(t)); 147216828Syongari size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 148216828Syongari 149216828Syongari ASSERT(t->t_dtrace_on); 150216828Syongari 151216828Syongari /* 152216828Syongari * If we're not in the range of scratch addresses, we're not actually 153216828Syongari * tracing user instructions so turn off the flags. If the instruction 154216828Syongari * we copied out caused a synchonous trap, reset the pc back to its 155216828Syongari * original value and turn off the flags. 156216828Syongari */ 157216828Syongari if (rp->r_pc < t->t_dtrace_scrpc || 158216828Syongari rp->r_pc > t->t_dtrace_astpc + isz) { 159216828Syongari t->t_dtrace_ft = 0; 160216828Syongari } else if (rp->r_pc == t->t_dtrace_scrpc || 161216828Syongari rp->r_pc == t->t_dtrace_astpc) { 162216828Syongari rp->r_pc = t->t_dtrace_pc; 163216828Syongari t->t_dtrace_ft = 0; 164216828Syongari } 165216828Syongari} 166216828Syongari 167216828Syongariint 168216828Syongaridtrace_safe_defer_signal(void) 169216828Syongari{ 170216828Syongari kthread_t *t = curthread; 171216828Syongari struct regs *rp = lwptoregs(ttolwp(t)); 172216828Syongari size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 173216828Syongari 174216828Syongari ASSERT(t->t_dtrace_on); 175221407Smarius 176216828Syongari /* 177216828Syongari * If we're not in the range of scratch addresses, we're not actually 178216828Syongari * tracing user instructions so turn off the flags. 179216828Syongari */ 180216828Syongari if (rp->r_pc < t->t_dtrace_scrpc || 181216828Syongari rp->r_pc > t->t_dtrace_astpc + isz) { 182216828Syongari t->t_dtrace_ft = 0; 183216828Syongari return (0); 184216828Syongari } 185216828Syongari 186216828Syongari /* 187216828Syongari * If we have executed the original instruction, but we have performed 188216828Syongari * neither the jmp back to t->t_dtrace_npc nor the clean up of any 189216828Syongari * registers used to emulate %rip-relative instructions in 64-bit mode, 190216828Syongari * we'll save ourselves some effort by doing that here and taking the 191216828Syongari * signal right away. We detect this condition by seeing if the program 192216828Syongari * counter is the range [scrpc + isz, astpc). 193216828Syongari */ 194216828Syongari if (rp->r_pc >= t->t_dtrace_scrpc + isz && 195216828Syongari rp->r_pc < t->t_dtrace_astpc) { 196216828Syongari#ifdef __amd64 197216828Syongari /* 198216828Syongari * If there is a scratch register and we're on the 199216828Syongari * instruction immediately after the modified instruction, 200216828Syongari * restore the value of that scratch register. 201216828Syongari */ 202216828Syongari if (t->t_dtrace_reg != 0 && 203216828Syongari rp->r_pc == t->t_dtrace_scrpc + isz) { 204216828Syongari switch (t->t_dtrace_reg) { 205216828Syongari case REG_RAX: 206216828Syongari rp->r_rax = t->t_dtrace_regv; 207216828Syongari break; 208216828Syongari case REG_RCX: 209216828Syongari rp->r_rcx = t->t_dtrace_regv; 210216828Syongari break; 211216828Syongari case REG_R8: 212216828Syongari rp->r_r8 = t->t_dtrace_regv; 213216828Syongari break; 214216828Syongari case REG_R9: 215216828Syongari rp->r_r9 = t->t_dtrace_regv; 216216828Syongari break; 217216828Syongari } 218216828Syongari } 219216828Syongari#endif 220216828Syongari rp->r_pc = t->t_dtrace_npc; 221216828Syongari t->t_dtrace_ft = 0; 222216828Syongari return (0); 223216828Syongari } 224216828Syongari 225216828Syongari /* 226216828Syongari * Otherwise, make sure we'll return to the kernel after executing 227216828Syongari * the copied out instruction and defer the signal. 228216828Syongari */ 229216828Syongari if (!t->t_dtrace_step) { 230216828Syongari ASSERT(rp->r_pc < t->t_dtrace_astpc); 231216828Syongari rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 232216828Syongari t->t_dtrace_step = 1; 233216828Syongari } 234216828Syongari 235 t->t_dtrace_ast = 1; 236 237 return (1); 238} 239#endif 240 241static int64_t tgt_cpu_tsc; 242static int64_t hst_cpu_tsc; 243static int64_t tsc_skew[MAXCPU]; 244static uint64_t nsec_scale; 245 246/* See below for the explanation of this macro. */ 247#define SCALE_SHIFT 28 248 249static void 250dtrace_gethrtime_init_cpu(void *arg) 251{ 252 uintptr_t cpu = (uintptr_t) arg; 253 254 if (cpu == curcpu) 255 tgt_cpu_tsc = rdtsc(); 256 else 257 hst_cpu_tsc = rdtsc(); 258} 259 260#ifdef EARLY_AP_STARTUP 261static void 262dtrace_gethrtime_init(void *arg) 263{ 264 struct pcpu *pc; 265 uint64_t tsc_f; 266 cpuset_t map; 267 int i; 268#else 269/* 270 * Get the frequency and scale factor as early as possible so that they can be 271 * used for boot-time tracing. 272 */ 273static void 274dtrace_gethrtime_init_early(void *arg) 275{ 276 uint64_t tsc_f; 277#endif 278 279 /* 280 * Get TSC frequency known at this moment. 281 * This should be constant if TSC is invariant. 282 * Otherwise tick->time conversion will be inaccurate, but 283 * will preserve monotonic property of TSC. 284 */ 285 tsc_f = atomic_load_acq_64(&tsc_freq); 286 287 /* 288 * The following line checks that nsec_scale calculated below 289 * doesn't overflow 32-bit unsigned integer, so that it can multiply 290 * another 32-bit integer without overflowing 64-bit. 291 * Thus minimum supported TSC frequency is 62.5MHz. 292 */ 293 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), 294 ("TSC frequency is too low")); 295 296 /* 297 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 298 * as possible. 299 * 2^28 factor was chosen quite arbitrarily from practical 300 * considerations: 301 * - it supports TSC frequencies as low as 62.5MHz (see above); 302 * - it provides quite good precision (e < 0.01%) up to THz 303 * (terahertz) values; 304 */ 305 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 306#ifndef EARLY_AP_STARTUP 307} 308SYSINIT(dtrace_gethrtime_init_early, SI_SUB_CPU, SI_ORDER_ANY, 309 dtrace_gethrtime_init_early, NULL); 310 311static void 312dtrace_gethrtime_init(void *arg) 313{ 314 struct pcpu *pc; 315 cpuset_t map; 316 int i; 317#endif 318 319 /* The current CPU is the reference one. */ 320 sched_pin(); 321 tsc_skew[curcpu] = 0; 322 CPU_FOREACH(i) { 323 if (i == curcpu) 324 continue; 325 326 pc = pcpu_find(i); 327 CPU_SETOF(PCPU_GET(cpuid), &map); 328 CPU_SET(pc->pc_cpuid, &map); 329 330 smp_rendezvous_cpus(map, NULL, 331 dtrace_gethrtime_init_cpu, 332 smp_no_rendevous_barrier, (void *)(uintptr_t) i); 333 334 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 335 } 336 sched_unpin(); 337} 338#ifdef EARLY_AP_STARTUP 339SYSINIT(dtrace_gethrtime_init, SI_SUB_DTRACE, SI_ORDER_ANY, 340 dtrace_gethrtime_init, NULL); 341#else 342SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, 343 NULL); 344#endif 345 346/* 347 * DTrace needs a high resolution time function which can 348 * be called from a probe context and guaranteed not to have 349 * instrumented with probes itself. 350 * 351 * Returns nanoseconds since boot. 352 */ 353uint64_t 354dtrace_gethrtime() 355{ 356 uint64_t tsc; 357 uint32_t lo; 358 uint32_t hi; 359 360 /* 361 * We split TSC value into lower and higher 32-bit halves and separately 362 * scale them with nsec_scale, then we scale them down by 2^28 363 * (see nsec_scale calculations) taking into account 32-bit shift of 364 * the higher half and finally add. 365 */ 366 tsc = rdtsc() - tsc_skew[curcpu]; 367 lo = tsc; 368 hi = tsc >> 32; 369 return (((lo * nsec_scale) >> SCALE_SHIFT) + 370 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 371} 372 373uint64_t 374dtrace_gethrestime(void) 375{ 376 struct timespec current_time; 377 378 dtrace_getnanotime(¤t_time); 379 380 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 381} 382 383/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c. */ 384int 385dtrace_trap(struct trapframe *frame, u_int type) 386{ 387 /* 388 * A trap can occur while DTrace executes a probe. Before 389 * executing the probe, DTrace blocks re-scheduling and sets 390 * a flag in its per-cpu flags to indicate that it doesn't 391 * want to fault. On returning from the probe, the no-fault 392 * flag is cleared and finally re-scheduling is enabled. 393 * 394 * Check if DTrace has enabled 'no-fault' mode: 395 */ 396 if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) { 397 /* 398 * There are only a couple of trap types that are expected. 399 * All the rest will be handled in the usual way. 400 */ 401 switch (type) { 402 /* General protection fault. */ 403 case T_PROTFLT: 404 /* Flag an illegal operation. */ 405 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 406 407 /* 408 * Offset the instruction pointer to the instruction 409 * following the one causing the fault. 410 */ 411 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 412 return (1); 413 /* Page fault. */ 414 case T_PAGEFLT: 415 /* Flag a bad address. */ 416 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 417 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr; 418 419 /* 420 * Offset the instruction pointer to the instruction 421 * following the one causing the fault. 422 */ 423 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 424 return (1); 425 default: 426 /* Handle all other traps in the usual way. */ 427 break; 428 } 429 } 430 431 /* Handle the trap in the usual way. */ 432 return (0); 433} 434