1256912Sbrooks/*- 2256912Sbrooks * Copyright (c) 2012-2013 Robert N. M. Watson 3256912Sbrooks * Copyright (c) 2013 SRI International 4256912Sbrooks * All rights reserved. 5256912Sbrooks * 6256912Sbrooks * This software was developed by SRI International and the University of 7256912Sbrooks * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 8256912Sbrooks * ("CTSRD"), as part of the DARPA CRASH research programme. 9256912Sbrooks * 10256912Sbrooks * Redistribution and use in source and binary forms, with or without 11256912Sbrooks * modification, are permitted provided that the following conditions 12256912Sbrooks * are met: 13256912Sbrooks * 1. Redistributions of source code must retain the above copyright 14256912Sbrooks * notice, this list of conditions and the following disclaimer. 15256912Sbrooks * 2. Redistributions in binary form must reproduce the above copyright 16256912Sbrooks * notice, this list of conditions and the following disclaimer in the 17256912Sbrooks * documentation and/or other materials provided with the distribution. 18256912Sbrooks * 19256912Sbrooks * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20256912Sbrooks * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21256912Sbrooks * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22256912Sbrooks * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23256912Sbrooks * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24256912Sbrooks * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25256912Sbrooks * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26256912Sbrooks * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27256912Sbrooks * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28256912Sbrooks * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29256912Sbrooks * SUCH DAMAGE. 30256912Sbrooks * 31256912Sbrooks * $FreeBSD: releng/11.0/sys/boot/fdt/dts/mips/beripad-de4.dts 275860 2014-12-17 11:05:44Z br $ 32256912Sbrooks */ 33256912Sbrooks 34256912Sbrooks/dts-v1/; 35256912Sbrooks 36256912Sbrooks/* 37256912Sbrooks * Device names here have been largely made up on the spot, especially for the 38256912Sbrooks * "compatible" strings, and might want to be revised. 39256912Sbrooks * 40256912Sbrooks * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in 41256912Sbrooks * the future, we should likely change to 64-bit. 42256912Sbrooks */ 43256912Sbrooks 44256912Sbrooks/ { 45256912Sbrooks model = "SRI/Cambridge BeriPad (DE4)"; 46256912Sbrooks compatible = "sri-cambridge,beripad-de4"; 47256912Sbrooks #address-cells = <1>; 48256912Sbrooks #size-cells = <1>; 49256912Sbrooks 50256912Sbrooks cpus { 51256912Sbrooks #address-cells = <1>; 52256912Sbrooks #size-cells = <1>; 53256912Sbrooks 54256912Sbrooks /* 55256912Sbrooks * Secondary CPUs all start disabled and use the 56256912Sbrooks * spin-table enable method. cpu-release-addr must be 57256912Sbrooks * specified for each cpu other than cpu@0. Values of 58256912Sbrooks * cpu-release-addr grow down from 0x100000 (kernel). 59256912Sbrooks */ 60256912Sbrooks status = "disabled"; 61256912Sbrooks enable-method = "spin-table"; 62256912Sbrooks 63256912Sbrooks cpu@0 { 64256912Sbrooks device-type = "cpu"; 65256912Sbrooks compatible = "sri-cambridge,beri"; 66256912Sbrooks 67262725Simp reg = <0 1>; 68256912Sbrooks status = "okay"; 69256912Sbrooks }; 70256912Sbrooks 71256912Sbrooks/* 72256912Sbrooks cpu@1 { 73256912Sbrooks device-type = "cpu"; 74256912Sbrooks compatible = "sri-cambridge,beri"; 75256912Sbrooks 76262725Simp reg = <1 1>; 77256912Sbrooks // XXX: should we need cached prefix? 78256912Sbrooks cpu-release-addr = <0xffffffff 0x800fffe0>; 79256912Sbrooks }; 80256912Sbrooks*/ 81256912Sbrooks }; 82256912Sbrooks 83275860Sbr memory { 84275860Sbr device_type = "memory"; 85275860Sbr reg = <0x0 0x40000000>; // 1G at 0x0 86275860Sbr }; 87275860Sbr 88256912Sbrooks soc { 89256912Sbrooks #address-cells = <1>; 90256912Sbrooks #size-cells = <1>; 91256912Sbrooks #interrupt-cells = <1>; 92256912Sbrooks 93256912Sbrooks /* 94256912Sbrooks * Declare mips,mips4k since BERI doesn't (yet) have a PIC, so 95256912Sbrooks * we use mips4k coprocessor 0 interrupt management directly. 96256912Sbrooks */ 97256912Sbrooks compatible = "simple-bus", "mips,mips4k"; 98256912Sbrooks ranges = <>; 99256912Sbrooks 100274818Sbrooks beripic0: beripic@7f804000 { 101256912Sbrooks compatible = "sri-cambridge,beri-pic"; 102256912Sbrooks interrupt-controller; 103256912Sbrooks #address-cells = <0>; 104256912Sbrooks #interrupt-cells = <1>; 105256912Sbrooks reg = <0x7f804000 0x400 106256912Sbrooks 0x7f806000 0x10 107256912Sbrooks 0x7f806080 0x10 108256912Sbrooks 0x7f806100 0x10>; 109256912Sbrooks interrupts = <0 1 2 3 4>; 110256912Sbrooks hard-interrupt-sources = <64>; 111256912Sbrooks soft-interrupt-sources = <64>; 112256912Sbrooks }; 113256912Sbrooks 114256912Sbrooks serial@7f002100 { 115256912Sbrooks compatible = "ns16550"; 116256912Sbrooks reg = <0x7f002100 0x20>; 117256912Sbrooks reg-shift = <2>; 118256912Sbrooks clock-frequency = <50000000>; 119256912Sbrooks interrupts = <6>; 120274818Sbrooks interrupt-parent = <&beripic0>; 121256912Sbrooks }; 122256912Sbrooks 123256912Sbrooks serial@7f000000 { 124256912Sbrooks compatible = "altera,jtag_uart-11_0"; 125256912Sbrooks reg = <0x7f000000 0x40>; 126256912Sbrooks interrupts = <0>; 127274818Sbrooks interrupt-parent = <&beripic0>; 128256912Sbrooks }; 129256912Sbrooks 130256912Sbrooks serial@7f001000 { 131256912Sbrooks compatible = "altera,jtag_uart-11_0"; 132256912Sbrooks reg = <0x7f001000 0x40>; 133256912Sbrooks }; 134256912Sbrooks 135256912Sbrooks serial@7f002000 { 136256912Sbrooks compatible = "altera,jtag_uart-11_0"; 137256912Sbrooks reg = <0x7f002000 0x40>; 138256912Sbrooks }; 139256912Sbrooks 140256912Sbrooks sdcard@7f008000 { 141256912Sbrooks compatible = "altera,sdcard_11_2011"; 142256912Sbrooks reg = <0x7f008000 0x400>; 143256912Sbrooks }; 144256912Sbrooks 145256912Sbrooks led@7f006000 { 146256912Sbrooks compatible = "sri-cambridge,de4led"; 147256912Sbrooks reg = <0x7f006000 0x1>; 148256912Sbrooks }; 149256912Sbrooks 150256912Sbrooks /* 151256912Sbrooks * XXX-BZ keep flash before ethernet so that atse can read the 152256912Sbrooks * Ethernet addresses for now. 153256912Sbrooks */ 154256912Sbrooks flash@74000000 { 155256912Sbrooks #address-cells = <1>; 156256912Sbrooks #size-cells = <1>; 157256912Sbrooks compatible = "cfi-flash"; 158256912Sbrooks reg = <0x74000000 0x4000000>; 159256912Sbrooks 160256912Sbrooks /* Board configuration */ 161256912Sbrooks partition@0 { 162256912Sbrooks reg = <0x0 0x20000>; 163256912Sbrooks label = "config"; 164256912Sbrooks }; 165256912Sbrooks 166256912Sbrooks /* Power up FPGA image */ 167256912Sbrooks partition@20000 { 168256912Sbrooks reg = <0x20000 0xc00000>; 169256912Sbrooks label = "fpga0"; 170256912Sbrooks }; 171256912Sbrooks 172256912Sbrooks /* Secondary FPGA image (on RE_CONFIGn button) */ 173256912Sbrooks partition@C20000 { 174256912Sbrooks reg = <0xc20000 0xc00000>; 175256912Sbrooks label = "fpga1"; 176256912Sbrooks }; 177256912Sbrooks 178256912Sbrooks /* Space for operating system use */ 179256912Sbrooks partition@1820000 { 180256912Sbrooks reg = <0x1820000 0x027c0000>; 181256912Sbrooks label = "os"; 182256912Sbrooks }; 183256912Sbrooks 184256912Sbrooks /* Second stage bootloader */ 185256912Sbrooks parition@3fe0000 { 186256912Sbrooks reg = <0x3fe0000 0x20000>; 187256912Sbrooks label = "boot"; 188256912Sbrooks }; 189256912Sbrooks }; 190256912Sbrooks 191256912Sbrooks ethernet@7f007000 { 192256912Sbrooks compatible = "altera,atse"; 193256912Sbrooks // MAC, RX+RXC, TX+TXC. 194256912Sbrooks reg = <0x7f007000 0x400 195256912Sbrooks 0x7f007500 0x8 196256912Sbrooks 0x7f007520 0x20 197256912Sbrooks 0x7f007400 0x8 198256912Sbrooks 0x7f007420 0x20>; 199256912Sbrooks // RX, TX 200256912Sbrooks interrupts = <1 2>; 201274818Sbrooks interrupt-parent = <&beripic0>; 202256912Sbrooks }; 203256912Sbrooks 204256912Sbrooks ethernet@7f005000 { 205256912Sbrooks compatible = "altera,atse"; 206256912Sbrooks // MAC, RX+RXC, TX+TXC. 207256912Sbrooks reg = <0x7f005000 0x400 208256912Sbrooks 0x7f005500 0x8 209256912Sbrooks 0x7f005520 0x20 210256912Sbrooks 0x7f005400 0x8 211256912Sbrooks 0x7f005420 0x20>; 212256912Sbrooks // RX, TX 213256912Sbrooks interrupts = <11 12>; 214274818Sbrooks interrupt-parent = <&beripic0>; 215256912Sbrooks }; 216256912Sbrooks 217256912Sbrooks touchscreen@70400000 { 218256912Sbrooks compatible = "sri-cambridge,mtl"; 219274823Sbrooks panel-size = < 800 480 >; 220256912Sbrooks reg = <0x70400000 0x1000 221256912Sbrooks 0x70000000 0x177000 222256912Sbrooks 0x70177000 0x2000>; 223256912Sbrooks }; 224256912Sbrooks 225256912Sbrooks usb@0x7f100000 { 226266832Shselasky compatible = "nxp,usb-isp1761"; 227256912Sbrooks reg = <0x7f100000 0x40000 228256912Sbrooks 0x7f140000 0x4>; 229256912Sbrooks // IRQ 4 is DC, IRQ 5 is HC. 230256912Sbrooks interrupts = <4 5>; 231274818Sbrooks interrupt-parent = <&beripic0>; 232256912Sbrooks }; 233256912Sbrooks 234256912Sbrooks avgen@0x7f009000 { 235256912Sbrooks compatible = "sri-cambridge,avgen"; 236256912Sbrooks reg = <0x7f009000 0x2>; 237256912Sbrooks sri-cambridge,width = <1>; 238256912Sbrooks sri-cambridge,fileio = "r"; 239256912Sbrooks sri-cambridge,devname = "de4bsw"; 240256912Sbrooks }; 241256912Sbrooks 242256912Sbrooks avgen@0x7f00a000 { 243256912Sbrooks compatible = "sri-cambridge,avgen"; 244256912Sbrooks reg = <0x7f00a000 0x14>; 245256912Sbrooks sri-cambridge,width = <4>; 246256912Sbrooks sri-cambridge,fileio = "rw"; 247256912Sbrooks sri-cambridge,devname = "berirom"; 248256912Sbrooks }; 249256912Sbrooks 250256912Sbrooks avgen@0x7f00c000 { 251256912Sbrooks compatible = "sri-cambridge,avgen"; 252256912Sbrooks reg = <0x7f00c000 0x8>; 253256912Sbrooks sri-cambridge,width = <4>; 254256912Sbrooks sri-cambridge,fileio = "rw"; 255256912Sbrooks sri-cambridge,devname = "de4tempfan"; 256256912Sbrooks }; 257256912Sbrooks }; 258256912Sbrooks}; 259