1255130Srpaulo/* 2255130Srpaulo * Copyright (c) 2012 The FreeBSD Foundation 3255130Srpaulo * Copyright (c) 2013 Rui Paulo 4255130Srpaulo * All rights reserved. 5255130Srpaulo * 6255130Srpaulo * This software was developed by Semihalf under sponsorship from 7255130Srpaulo * the FreeBSD Foundation. 8255130Srpaulo * 9255130Srpaulo * Redistribution and use in source and binary forms, with or without 10255130Srpaulo * modification, are permitted provided that the following conditions 11255130Srpaulo * are met: 12255130Srpaulo * 1. Redistributions of source code must retain the above copyright 13255130Srpaulo * notice, this list of conditions and the following disclaimer. 14255130Srpaulo * 2. Redistributions in binary form must reproduce the above copyright 15255130Srpaulo * notice, this list of conditions and the following disclaimer in the 16255130Srpaulo * documentation and/or other materials provided with the distribution. 17255130Srpaulo * 18255130Srpaulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19255130Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20255130Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21255130Srpaulo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22255130Srpaulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23255130Srpaulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24255130Srpaulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25255130Srpaulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26255130Srpaulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27255130Srpaulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28255130Srpaulo * SUCH DAMAGE. 29255130Srpaulo * 30255130Srpaulo * Freescale i.MX535 Device Tree Source. 31255130Srpaulo * 32255130Srpaulo * $FreeBSD: releng/11.0/sys/boot/fdt/dts/arm/imx53x.dtsi 264428 2014-04-13 22:35:39Z rpaulo $ 33255130Srpaulo */ 34255130Srpaulo 35255130Srpaulo/ { 36255130Srpaulo #address-cells = <1>; 37255130Srpaulo #size-cells = <1>; 38255130Srpaulo 39255130Srpaulo aliases { 40255130Srpaulo soc = &SOC; 41255130Srpaulo }; 42255130Srpaulo 43255130Srpaulo 44255130Srpaulo cpus { 45255130Srpaulo #address-cells = <1>; 46255130Srpaulo #size-cells = <0>; 47255130Srpaulo 48255130Srpaulo cpu@0 { 49255130Srpaulo device_type = "cpu"; 50255130Srpaulo compatible = "ARM,MCIMX535"; 51255130Srpaulo reg = <0x0>; 52255130Srpaulo d-cache-line-size = <32>; 53255130Srpaulo i-cache-line-size = <32>; 54255130Srpaulo d-cache-size = <0x8000>; 55255130Srpaulo i-cache-size = <0x8000>; 56255130Srpaulo l2-cache-line-size = <32>; 57255130Srpaulo l2-cache-line = <0x40000>; 58255130Srpaulo timebase-frequency = <0>; 59255130Srpaulo bus-frequency = <0>; 60255130Srpaulo clock-frequency = <0>; 61255130Srpaulo }; 62255130Srpaulo }; 63255130Srpaulo 64255130Srpaulo localbus@0fffc000 { 65255130Srpaulo compatible = "simple-bus"; 66255130Srpaulo #address-cells = <1>; 67255130Srpaulo #size-cells = <1>; 68255130Srpaulo 69255130Srpaulo /* This reflects CPU decode windows setup. */ 70255130Srpaulo ranges; 71255130Srpaulo 72255130Srpaulo tzic: tz-interrupt-controller@0fffc000 { 73255130Srpaulo compatible = "fsl,imx53-tzic", "fsl,tzic"; 74255130Srpaulo interrupt-controller; 75255130Srpaulo #interrupt-cells = <1>; 76255130Srpaulo reg = <0x0fffc000 0x00004000>; 77255130Srpaulo }; 78255130Srpaulo /* 79255130Srpaulo * 40000000 40000FFF 4K Debug ROM 80255130Srpaulo * 40001000 40001FFF 4K ETB 81255130Srpaulo * 40002000 40002FFF 4K ETM 82255130Srpaulo * 40003000 40003FFF 4K TPIU 83255130Srpaulo * 40004000 40004FFF 4K CTI0 84255130Srpaulo * 40005000 40005FFF 4K CTI1 85255130Srpaulo * 40006000 40006FFF 4K CTI2 86255130Srpaulo * 40007000 40007FFF 4K CTI3 87255130Srpaulo * 40008000 40008FFF 4K ARM Debug Unit 88255130Srpaulo * 89255130Srpaulo * 0FFFC000 0FFFCFFF 0x4000 TZIC 90255130Srpaulo */ 91255130Srpaulo }; 92255130Srpaulo 93255130Srpaulo SOC: soc@50000000 { 94255130Srpaulo compatible = "simple-bus"; 95255130Srpaulo #address-cells = <1>; 96255130Srpaulo #size-cells = <1>; 97255130Srpaulo interrupt-parent = <&tzic>; 98262736Sian ranges; 99255130Srpaulo 100255130Srpaulo aips@50000000 { /* AIPS1 */ 101255130Srpaulo compatible = "fsl,aips-bus", "simple-bus"; 102255130Srpaulo #address-cells = <1>; 103255130Srpaulo #size-cells = <1>; 104255130Srpaulo interrupt-parent = <&tzic>; 105255130Srpaulo ranges; 106255130Srpaulo 107255130Srpaulo /* Required by many devices, so better to stay first */ 108255130Srpaulo /* 53FD4000 0x4000 CCM */ 109255130Srpaulo clock@53fd4000 { 110255130Srpaulo compatible = "fsl,imx53-ccm"; 111255130Srpaulo /* 63F80000 0x4000 DPLLIP1 */ 112255130Srpaulo /* 63F84000 0x4000 DPLLIP2 */ 113255130Srpaulo /* 63F88000 0x4000 DPLLIP3 */ 114255130Srpaulo reg = <0x53fd4000 0x4000 115255130Srpaulo 0x63F80000 0x4000 116255130Srpaulo 0x63F84000 0x4000 117255130Srpaulo 0x63F88000 0x4000>; 118255130Srpaulo interrupt-parent = <&tzic>; 119255130Srpaulo interrupts = <71 72>; 120255130Srpaulo status = "disabled"; 121255130Srpaulo }; 122255130Srpaulo 123255130Srpaulo /* 124255130Srpaulo * GPIO modules moved up - to have it attached for 125255130Srpaulo * drivers which rely on GPIO 126255130Srpaulo */ 127255130Srpaulo /* 53F84000 0x4000 GPIO1 */ 128255130Srpaulo gpio1: gpio@53f84000 { 129255130Srpaulo compatible = "fsl,imx53-gpio"; 130255130Srpaulo reg = <0x53f84000 0x4000>; 131255130Srpaulo interrupt-parent = <&tzic>; 132255130Srpaulo interrupts = <50 51 42 43 44 45 46 47 48 49>; 133255130Srpaulo /* TODO: use <> also */ 134255130Srpaulo gpio-controller; 135255130Srpaulo #gpio-cells = <2>; 136255130Srpaulo interrupt-controller; 137255130Srpaulo #interrupt-cells = <1>; 138255130Srpaulo }; 139255130Srpaulo 140255130Srpaulo /* 53F88000 0x4000 GPIO2 */ 141255130Srpaulo gpio2: gpio@53f88000 { 142255130Srpaulo compatible = "fsl,imx53-gpio"; 143255130Srpaulo reg = <0x53f88000 0x4000>; 144255130Srpaulo interrupt-parent = <&tzic>; 145255130Srpaulo interrupts = <52 53>; 146255130Srpaulo gpio-controller; 147255130Srpaulo #gpio-cells = <2>; 148255130Srpaulo interrupt-controller; 149255130Srpaulo #interrupt-cells = <1>; 150255130Srpaulo }; 151255130Srpaulo 152255130Srpaulo /* 53F8C000 0x4000 GPIO3 */ 153255130Srpaulo gpio3: gpio@53f8c000 { 154255130Srpaulo compatible = "fsl,imx53-gpio"; 155255130Srpaulo reg = <0x53f8c000 0x4000>; 156255130Srpaulo interrupt-parent = <&tzic>; 157255130Srpaulo interrupts = <54 55>; 158255130Srpaulo gpio-controller; 159255130Srpaulo #gpio-cells = <2>; 160255130Srpaulo interrupt-controller; 161255130Srpaulo #interrupt-cells = <1>; 162255130Srpaulo }; 163255130Srpaulo 164255130Srpaulo /* 53F90000 0x4000 GPIO4 */ 165255130Srpaulo gpio4: gpio@53f90000 { 166255130Srpaulo compatible = "fsl,imx53-gpio"; 167255130Srpaulo reg = <0x53f90000 0x4000>; 168255130Srpaulo interrupt-parent = <&tzic>; 169255130Srpaulo interrupts = <56 57>; 170255130Srpaulo gpio-controller; 171255130Srpaulo #gpio-cells = <2>; 172255130Srpaulo interrupt-controller; 173255130Srpaulo #interrupt-cells = <1>; 174255130Srpaulo }; 175255130Srpaulo 176255130Srpaulo /* 53FDC000 0x4000 GPIO5 */ 177255130Srpaulo gpio5: gpio@53fdc000 { 178255130Srpaulo compatible = "fsl,imx53-gpio"; 179255130Srpaulo reg = <0x53fdc000 0x4000>; 180255130Srpaulo interrupt-parent = <&tzic>; 181255130Srpaulo interrupts = <103 104>; 182255130Srpaulo gpio-controller; 183255130Srpaulo #gpio-cells = <2>; 184255130Srpaulo interrupt-controller; 185255130Srpaulo #interrupt-cells = <1>; 186255130Srpaulo }; 187255130Srpaulo 188255130Srpaulo /* 53FE0000 0x4000 GPIO6 */ 189255130Srpaulo gpio6: gpio@53fe0000 { 190255130Srpaulo compatible = "fsl,imx53-gpio"; 191255130Srpaulo reg = <0x53fe0000 0x4000>; 192255130Srpaulo interrupt-parent = <&tzic>; 193255130Srpaulo interrupts = <105 106>; 194255130Srpaulo gpio-controller; 195255130Srpaulo #gpio-cells = <2>; 196255130Srpaulo interrupt-controller; 197255130Srpaulo #interrupt-cells = <1>; 198255130Srpaulo }; 199255130Srpaulo 200255130Srpaulo /* 53FE4000 0x4000 GPIO5 */ 201255130Srpaulo gpio7: gpio@53fe4000 { 202255130Srpaulo compatible = "fsl,imx53-gpio"; 203255130Srpaulo reg = <0x53fe4000 0x4000>; 204255130Srpaulo interrupt-parent = <&tzic>; 205255130Srpaulo interrupts = <107 108>; 206255130Srpaulo gpio-controller; 207255130Srpaulo #gpio-cells = <2>; 208255130Srpaulo interrupt-controller; 209255130Srpaulo #interrupt-cells = <1>; 210255130Srpaulo }; 211255130Srpaulo 212255130Srpaulo spba@50000000 { 213255130Srpaulo compatible = "fsl,spba-bus", "simple-bus"; 214255130Srpaulo #address-cells = <1>; 215255130Srpaulo #size-cells = <1>; 216255130Srpaulo interrupt-parent = <&tzic>; 217255130Srpaulo ranges; 218255130Srpaulo 219255130Srpaulo /* 50004000 0x4000 ESDHC 1 */ 220255130Srpaulo esdhc@50004000 { 221255130Srpaulo compatible = "fsl,imx53-esdhc"; 222255130Srpaulo reg = <0x50004000 0x4000>; 223255130Srpaulo interrupt-parent = <&tzic>; interrupts = <1>; 224255130Srpaulo status = "disabled"; 225255130Srpaulo }; 226255130Srpaulo 227255130Srpaulo /* 50008000 0x4000 ESDHC 2 */ 228255130Srpaulo esdhc@50008000 { 229255130Srpaulo compatible = "fsl,imx53-esdhc"; 230255130Srpaulo reg = <0x50008000 0x4000>; 231255130Srpaulo interrupt-parent = <&tzic>; interrupts = <2>; 232255130Srpaulo status = "disabled"; 233255130Srpaulo }; 234255130Srpaulo 235255130Srpaulo /* 5000C000 0x4000 UART 3 */ 236255130Srpaulo uart3: serial@5000c000 { 237255130Srpaulo compatible = "fsl,imx53-uart", "fsl,imx-uart"; 238255130Srpaulo reg = <0x5000c000 0x4000>; 239255130Srpaulo interrupt-parent = <&tzic>; 240255130Srpaulo interrupts = <33>; 241255130Srpaulo status = "disabled"; 242255130Srpaulo }; 243255130Srpaulo 244255130Srpaulo /* 50010000 0x4000 eCSPI1 */ 245255130Srpaulo ecspi@50010000 { 246255130Srpaulo #address-cells = <1>; 247255130Srpaulo #size-cells = <0>; 248255130Srpaulo compatible = "fsl,imx53-ecspi"; 249255130Srpaulo reg = <0x50010000 0x4000>; 250255130Srpaulo interrupt-parent = <&tzic>; 251255130Srpaulo interrupts = <36>; 252255130Srpaulo status = "disabled"; 253255130Srpaulo }; 254255130Srpaulo 255255130Srpaulo /* 50014000 0x4000 SSI2 irq30 */ 256255130Srpaulo SSI2: ssi@50014000 { 257255130Srpaulo compatible = "fsl,imx53-ssi"; 258255130Srpaulo reg = <0x50014000 0x4000>; 259255130Srpaulo interrupt-parent = <&tzic>; 260255130Srpaulo interrupts = <30>; 261255130Srpaulo status = "disabled"; 262255130Srpaulo }; 263255130Srpaulo 264255130Srpaulo /* 50020000 0x4000 ESDHC 3 */ 265255130Srpaulo esdhc@50020000 { 266255130Srpaulo compatible = "fsl,imx53-esdhc"; 267255130Srpaulo reg = <0x50020000 0x4000>; 268255130Srpaulo interrupt-parent = <&tzic>; 269255130Srpaulo interrupts = <3>; 270255130Srpaulo status = "disabled"; 271255130Srpaulo }; 272255130Srpaulo 273255130Srpaulo /* 50024000 0x4000 ESDHC 4 */ 274255130Srpaulo esdhc@50024000 { 275255130Srpaulo compatible = "fsl,imx53-esdhc"; 276255130Srpaulo reg = <0x50024000 0x4000>; 277255130Srpaulo interrupt-parent = <&tzic>; 278255130Srpaulo interrupts = <4>; 279255130Srpaulo status = "disabled"; 280255130Srpaulo }; 281255130Srpaulo 282255130Srpaulo /* 50028000 0x4000 SPDIF */ 283255130Srpaulo /* 91 SPDIF */ 284255130Srpaulo 285264428Srpaulo pata@50030000 { 286264428Srpaulo compatible = "fsl,imx53-ata"; 287264428Srpaulo reg = <0x50030000 0x4000>; 288264428Srpaulo interrupt-parent = <&tzic>; 289264428Srpaulo interrupts = <70>; 290264428Srpaulo status = "disabled"; 291264428Srpaulo }; 292255130Srpaulo 293255130Srpaulo /* 50034000 0x4000 SLM */ 294255130Srpaulo /* 50038000 0x4000 HSI2C */ 295255130Srpaulo /* 64 HS-I2C */ 296255130Srpaulo /* 5003C000 0x4000 SPBA */ 297255130Srpaulo }; 298255130Srpaulo 299257393Sian usbphy0: usbphy@0 { 300257393Sian compatible = "usb-nop-xceiv"; 301257393Sian status = "okay"; 302255130Srpaulo }; 303255130Srpaulo 304257393Sian usbphy1: usbphy@1 { 305257393Sian compatible = "usb-nop-xceiv"; 306257393Sian status = "okay"; 307257393Sian }; 308257393Sian 309257393Sian usbotg: usb@53f80000 { 310257393Sian compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 311257393Sian reg = <0x53f80000 0x0200>; 312257393Sian interrupts = <18>; 313257393Sian fsl,usbphy = <&usbphy0>; 314257393Sian status = "disabled"; 315257393Sian }; 316257393Sian 317257393Sian usbh1: usb@53f80200 { 318257393Sian compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 319257393Sian reg = <0x53f80200 0x0200>; 320257393Sian interrupts = <14>; 321257393Sian fsl,usbphy = <&usbphy1>; 322257393Sian status = "disabled"; 323257393Sian }; 324257393Sian 325257393Sian usbh2: usb@53f80400 { 326257393Sian compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 327257393Sian reg = <0x53f80400 0x0200>; 328257393Sian interrupts = <16>; 329257393Sian status = "disabled"; 330257393Sian }; 331257393Sian 332257393Sian usbh3: usb@53f80600 { 333257393Sian compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 334257393Sian reg = <0x53f80600 0x0200>; 335257393Sian interrupts = <17>; 336257393Sian status = "disabled"; 337257393Sian }; 338257393Sian 339257393Sian usbmisc: usbmisc@53f80800 { 340257393Sian #index-cells = <1>; 341257393Sian compatible = "fsl,imx53-usbmisc"; 342257393Sian reg = <0x53f80800 0x200>; 343257393Sian }; 344257393Sian 345255130Srpaulo /* 53F98000 0x4000 WDOG1 */ 346255130Srpaulo wdog@53f98000 { 347255130Srpaulo compatible = "fsl,imx53-wdt"; 348255130Srpaulo reg = <0x53f98000 0x4000>; 349255130Srpaulo interrupt-parent = <&tzic>; 350255130Srpaulo interrupts = <58>; 351255130Srpaulo status = "disabled"; 352255130Srpaulo }; 353255130Srpaulo 354255130Srpaulo /* 53F9C000 0x4000 WDOG2 (TZ) */ 355255130Srpaulo wdog@53f9c000 { 356255130Srpaulo compatible = "fsl,imx53-wdt"; 357255130Srpaulo reg = <0x53f9c000 0x4000>; 358255130Srpaulo interrupt-parent = <&tzic>; 359255130Srpaulo interrupts = <59>; 360255130Srpaulo status = "disabled"; 361255130Srpaulo }; 362255130Srpaulo 363255130Srpaulo /* 53F94000 0x4000 KPP */ 364255130Srpaulo keyboard@53f94000 { 365255130Srpaulo compatible = "fsl,imx53-kpp"; 366255130Srpaulo reg = <0x53f94000 0x4000>; 367255130Srpaulo interrupt-parent = <&tzic>; 368255130Srpaulo interrupts = <60>; 369255130Srpaulo status = "disabled"; 370255130Srpaulo }; 371255130Srpaulo 372255130Srpaulo /* 53FA0000 0x4000 GPT */ 373255130Srpaulo timer@53fa0000 { 374255130Srpaulo compatible = "fsl,imx53-gpt"; 375255130Srpaulo reg = <0x53fa0000 0x4000>; 376255130Srpaulo interrupt-parent = <&tzic>; 377255130Srpaulo interrupts = <39>; 378255130Srpaulo status = "disabled"; 379255130Srpaulo }; 380255130Srpaulo 381255130Srpaulo /* 53FA4000 0x4000 SRTC */ 382255130Srpaulo 383255130Srpaulo rtc@53fa4000 { 384255130Srpaulo compatible = "fsl,imx53-srtc"; 385255130Srpaulo reg = <0x53fa4000 0x4000>; 386255130Srpaulo interrupt-parent = <&tzic>; 387255130Srpaulo interrupts = <24 25>; 388255130Srpaulo status = "disabled"; 389255130Srpaulo }; 390255130Srpaulo 391255130Srpaulo /* 53FA8000 0x4000 IOMUXC */ 392255130Srpaulo iomux@53fa8000 { 393255130Srpaulo compatible = "fsl,imx53-iomux"; 394255130Srpaulo reg = <0x53fa8000 0x4000>; 395255130Srpaulo interrupt-parent = <&tzic>; 396255130Srpaulo interrupts = <7>; 397255130Srpaulo }; 398255130Srpaulo 399255130Srpaulo /* 53FAC000 0x4000 EPIT1 */ 400255130Srpaulo epit1: timer@53fac000 { 401255130Srpaulo compatible = "fsl,imx53-epit"; 402255130Srpaulo reg = <0x53fac000 0x4000>; 403255130Srpaulo interrupt-parent = <&tzic>; 404255130Srpaulo interrupts = <40>; 405255130Srpaulo status = "disabled"; 406255130Srpaulo }; 407255130Srpaulo 408255130Srpaulo /* 53FB0000 0x4000 EPIT2 */ 409255130Srpaulo epit2: timer@53fb0000 { 410255130Srpaulo compatible = "fsl,imx53-epit"; 411255130Srpaulo reg = <0x53fb0000 0x4000>; 412255130Srpaulo interrupt-parent = <&tzic>; 413255130Srpaulo interrupts = <41>; 414255130Srpaulo status = "disabled"; 415255130Srpaulo }; 416255130Srpaulo 417255130Srpaulo /* 53FB4000 0x4000 PWM1 */ 418255130Srpaulo pwm@53fb4000 { 419255130Srpaulo compatible = "fsl,imx53-pwm"; 420255130Srpaulo reg = <0x53fb4000 0x4000>; 421255130Srpaulo interrupt-parent = <&tzic>; 422255130Srpaulo interrupts = <61>; 423255130Srpaulo status = "disabled"; 424255130Srpaulo }; 425255130Srpaulo 426255130Srpaulo /* 53FB8000 0x4000 PWM2 */ 427255130Srpaulo pwm@53fb8000 { 428255130Srpaulo compatible = "fsl,imx53-pwm"; 429255130Srpaulo reg = <0x53fb8000 0x4000>; 430255130Srpaulo interrupt-parent = <&tzic>; 431255130Srpaulo interrupts = <94>; 432255130Srpaulo status = "disabled"; 433255130Srpaulo }; 434255130Srpaulo 435255130Srpaulo /* 53FBC000 0x4000 UART 1 */ 436255130Srpaulo uart1: serial@53fbc000 { 437255130Srpaulo compatible = "fsl,imx53-uart", "fsl,imx-uart"; 438255130Srpaulo reg = <0x53fbc000 0x4000>; 439255130Srpaulo interrupt-parent = <&tzic>; 440255130Srpaulo interrupts = <31>; 441255130Srpaulo status = "disabled"; 442255130Srpaulo }; 443255130Srpaulo 444255130Srpaulo /* 53FC0000 0x4000 UART 2 */ 445255130Srpaulo uart2: serial@53fc0000 { 446255130Srpaulo compatible = "fsl,imx53-uart", "fsl,imx-uart"; 447255130Srpaulo reg = <0x53fc0000 0x4000>; 448255130Srpaulo interrupt-parent = <&tzic>; 449255130Srpaulo interrupts = <32>; 450255130Srpaulo status = "disabled"; 451255130Srpaulo }; 452255130Srpaulo 453264428Srpaulo /* 53FF0000 0x4000 UART 4 */ 454255130Srpaulo uart4: serial@53ff0000 { 455255130Srpaulo compatible = "fsl,imx53-uart", "fsl,imx-uart"; 456255130Srpaulo reg = <0x53ff0000 0x4000>; 457255130Srpaulo interrupt-parent = <&tzic>; 458255130Srpaulo interrupts = <13>; 459255130Srpaulo status = "disabled"; 460255130Srpaulo }; 461255130Srpaulo 462255130Srpaulo /* 53FD0000 0x4000 SRC */ 463255130Srpaulo reset@53fd0000 { 464255130Srpaulo compatible = "fsl,imx53-src"; 465255130Srpaulo reg = <0x53fd0000 0x4000>; 466255130Srpaulo interrupt-parent = <&tzic>; 467255130Srpaulo interrupts = <75>; 468255130Srpaulo status = "disabled"; 469255130Srpaulo }; 470255130Srpaulo /* 53FD8000 0x4000 GPC */ 471255130Srpaulo power@53fd8000 { 472255130Srpaulo compatible = "fsl,imx53-gpc"; 473255130Srpaulo reg = <0x53fd8000 0x4000>; 474255130Srpaulo interrupt-parent = <&tzic>; 475255130Srpaulo interrupts = <73 74>; 476255130Srpaulo status = "disabled"; 477255130Srpaulo }; 478264428Srpaulo i2c@53fec000 { 479264428Srpaulo #address-cells = <1>; 480264428Srpaulo #size-cells = <0>; 481264428Srpaulo compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", 482264428Srpaulo "fsl,imx-i2c"; 483264428Srpaulo reg = <0x53fec000 0x4000>; 484255130Srpaulo interrupt-parent = <&tzic>; 485264428Srpaulo interrupts = <64>; 486255130Srpaulo status = "disabled"; 487255130Srpaulo }; 488255130Srpaulo }; 489255130Srpaulo 490255130Srpaulo aips@60000000 { /* AIPS2 */ 491255130Srpaulo compatible = "fsl,aips-bus", "simple-bus"; 492255130Srpaulo #address-cells = <1>; 493255130Srpaulo #size-cells = <1>; 494255130Srpaulo interrupt-parent = <&tzic>; 495255130Srpaulo ranges; 496255130Srpaulo 497264428Srpaulo /* 63F90000 0x4000 UART 5 */ 498255130Srpaulo uart5: serial@63f90000 { 499255130Srpaulo compatible = "fsl,imx53-uart", "fsl,imx-uart"; 500255130Srpaulo reg = <0x63f90000 0x4000>; 501255130Srpaulo interrupt-parent = <&tzic>; 502255130Srpaulo interrupts = <32>; 503255130Srpaulo status = "disabled"; 504255130Srpaulo }; 505255130Srpaulo 506255130Srpaulo /* 63F94000 0x4000 AHBMAX */ 507255130Srpaulo /* 63F98000 0x4000 IIM */ 508255130Srpaulo /* 509255130Srpaulo * 69 IIM Interrupt request to the processor. 510255130Srpaulo * Indicates to the processor that program or 511255130Srpaulo * explicit. 512255130Srpaulo */ 513255130Srpaulo /* 63F9C000 0x4000 CSU */ 514255130Srpaulo /* 515255130Srpaulo * 27 CSU Interrupt Request 1. Indicates to the 516255130Srpaulo * processor that one or more alarm inputs were. 517255130Srpaulo */ 518255130Srpaulo 519255130Srpaulo /* 63FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ 520255130Srpaulo /* irq76 Neon Monitor Interrupt */ 521255130Srpaulo /* irq77 Performance Unit Interrupt */ 522255130Srpaulo /* irq78 CTI IRQ */ 523255130Srpaulo /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ 524255130Srpaulo /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ 525255130Srpaulo /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ 526255130Srpaulo /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ 527255130Srpaulo 528255130Srpaulo /* 63FA4000 0x4000 OWIRE irq88 */ 529255130Srpaulo /* 63FA8000 0x4000 FIRI irq93 */ 530255130Srpaulo /* 63FAC000 0x4000 eCSPI2 */ 531255130Srpaulo ecspi@63fac000 { 532255130Srpaulo #address-cells = <1>; 533255130Srpaulo #size-cells = <0>; 534255130Srpaulo compatible = "fsl,imx53-ecspi"; 535255130Srpaulo reg = <0x63fac000 0x4000>; 536255130Srpaulo interrupt-parent = <&tzic>; 537255130Srpaulo interrupts = <37>; 538255130Srpaulo status = "disabled"; 539255130Srpaulo }; 540255130Srpaulo 541255130Srpaulo /* 63FB0000 0x4000 SDMA */ 542255130Srpaulo sdma@63fb0000 { 543255130Srpaulo compatible = "fsl,imx53-sdma"; 544255130Srpaulo reg = <0x63fb0000 0x4000>; 545255130Srpaulo interrupt-parent = <&tzic>; 546255130Srpaulo interrupts = <6>; 547255130Srpaulo }; 548255130Srpaulo 549255130Srpaulo /* 63FB4000 0x4000 SCC */ 550255130Srpaulo /* 21 SCC Security Monitor High Priority Interrupt. */ 551255130Srpaulo /* 22 SCC Secure (TrustZone) Interrupt. */ 552255130Srpaulo /* 23 SCC Regular (Non-Secure) Interrupt. */ 553255130Srpaulo 554255130Srpaulo /* 63FB8000 0x4000 ROMCP */ 555255130Srpaulo /* 63FBC000 0x4000 RTIC */ 556255130Srpaulo /* 557255130Srpaulo * 26 RTIC RTIC (Trust Zone) Interrupt Request. 558255130Srpaulo * Indicates that the RTIC has completed hashing the 559255130Srpaulo */ 560255130Srpaulo 561255130Srpaulo /* 63FC0000 0x4000 CSPI */ 562255130Srpaulo cspi@63fc0000 { 563255130Srpaulo #address-cells = <1>; 564255130Srpaulo #size-cells = <0>; 565255130Srpaulo compatible = "fsl,imx53-cspi"; 566255130Srpaulo reg = <0x63fc0000 0x4000>; 567255130Srpaulo interrupt-parent = <&tzic>; 568255130Srpaulo interrupts = <38>; 569255130Srpaulo status = "disabled"; 570255130Srpaulo }; 571255130Srpaulo 572255130Srpaulo /* 63FC4000 0x4000 I2C2 */ 573255130Srpaulo i2c@63fc4000 { 574255130Srpaulo #address-cells = <1>; 575255130Srpaulo #size-cells = <0>; 576255130Srpaulo compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; 577255130Srpaulo reg = <0x63fc4000 0x4000>; 578255130Srpaulo interrupt-parent = <&tzic>; 579255130Srpaulo interrupts = <63>; 580255130Srpaulo status = "disabled"; 581255130Srpaulo }; 582255130Srpaulo 583255130Srpaulo /* 63FC8000 0x4000 I2C1 */ 584255130Srpaulo i2c@63fc8000 { 585255130Srpaulo #address-cells = <1>; 586255130Srpaulo #size-cells = <0>; 587255130Srpaulo compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; 588255130Srpaulo reg = <0x63fc8000 0x4000>; 589255130Srpaulo interrupt-parent = <&tzic>; 590255130Srpaulo interrupts = <62>; 591255130Srpaulo status = "disabled"; 592255130Srpaulo }; 593255130Srpaulo 594255130Srpaulo /* 63FCC000 0x4000 SSI1 */ 595255130Srpaulo /* 29 SSI1 SSI-1 Interrupt Request */ 596255130Srpaulo SSI1: ssi@63fcc000 { 597255130Srpaulo compatible = "fsl,imx53-ssi"; 598255130Srpaulo reg = <0x63fcc000 0x4000>; 599255130Srpaulo interrupt-parent = <&tzic>; 600255130Srpaulo interrupts = <29>; 601255130Srpaulo status = "disabled"; 602255130Srpaulo }; 603255130Srpaulo 604255130Srpaulo /* 63FD0000 0x4000 AUDMUX */ 605255130Srpaulo audmux@63fd4000 { 606255130Srpaulo compatible = "fsl,imx53-audmux"; 607255130Srpaulo reg = <0x63fd4000 0x4000>; 608255130Srpaulo status = "disabled"; 609255130Srpaulo }; 610255130Srpaulo 611255130Srpaulo /* 63FD8000 0x4000 EXTMC */ 612255130Srpaulo /* 8 EXTMC (NFC) */ 613255130Srpaulo /* 15 EXTMC */ 614255130Srpaulo /* 97 EXTMC Boot sequence completed interrupt */ 615255130Srpaulo /* 616255130Srpaulo * 101 EMI Indicates all pages have been transferred 617255130Srpaulo * to NFC during an auto program operation. 618255130Srpaulo */ 619255130Srpaulo 620255130Srpaulo /* 83FE4000 0x4000 SIM */ 621255130Srpaulo /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ 622255130Srpaulo /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ 623255130Srpaulo 624255130Srpaulo /* 63FD_C000 0x4000 apb2ip_pl301_2x2 */ 625255130Srpaulo /* 63FE_0000 0x4000 apb2ip_pl301_4x1 */ 626255130Srpaulo /* 63FE4000 0x4000 MLB */ 627255130Srpaulo /* 63FE8000 0x4000 SSI3 */ 628255130Srpaulo /* 96 SSI3 SSI-3 Interrupt Request */ 629255130Srpaulo SSI3: ssi@63fe8000 { 630255130Srpaulo compatible = "fsl,imx51-ssi"; 631255130Srpaulo reg = <0x63fe8000 0x4000>; 632255130Srpaulo interrupt-parent = <&tzic>; 633255130Srpaulo interrupts = <96>; 634255130Srpaulo status = "disabled"; 635255130Srpaulo }; 636255130Srpaulo 637255130Srpaulo /* 63FEC000 0x4000 FEC */ 638255130Srpaulo ethernet@63fec000 { 639255130Srpaulo compatible = "fsl,imx53-fec"; 640255130Srpaulo reg = <0x63fec000 0x4000>; 641255130Srpaulo interrupt-parent = <&tzic>; 642255130Srpaulo interrupts = <87>; 643255130Srpaulo status = "disabled"; 644255130Srpaulo }; 645255130Srpaulo 646255130Srpaulo /* 63FF0000 0x4000 TVE */ 647255130Srpaulo /* 92 TVE */ 648255130Srpaulo /* 63FF4000 0x4000 VPU */ 649255130Srpaulo /* 9 VPU */ 650255130Srpaulo /* 100 VPU Idle interrupt from VPU */ 651255130Srpaulo 652255130Srpaulo /* 63FF8000 0x4000 SAHARA */ 653255130Srpaulo /* 19 SAHARA SAHARA host 0 (TrustZone) Intr */ 654255130Srpaulo /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr */ 655255130Srpaulo }; 656255130Srpaulo }; 657255130Srpaulo 658264428Srpaulo localbus@10000000 { 659255130Srpaulo compatible = "simple-bus"; 660255130Srpaulo #address-cells = <1>; 661255130Srpaulo #size-cells = <1>; 662255130Srpaulo ranges; 663255130Srpaulo 664264428Srpaulo sata@10000000 { 665264428Srpaulo compatible = "fsl,imx53-ata"; 666264428Srpaulo reg = <0x10000000 0x4000>; 667264428Srpaulo interrupt-parent = <&tzic>; 668264428Srpaulo interrupts = <28>; 669264428Srpaulo status = "disabled"; 670264428Srpaulo }; 671264428Srpaulo 672264251Srpaulo vga: ipu3@1E000000 { 673255130Srpaulo compatible = "fsl,ipu3"; 674255130Srpaulo reg = < 675264251Srpaulo 0x1E000000 0x08000 /* CM */ 676264251Srpaulo 0x1E008000 0x08000 /* IDMAC */ 677264251Srpaulo 0x1E018000 0x08000 /* DP */ 678264251Srpaulo 0x1E020000 0x08000 /* IC */ 679264251Srpaulo 0x1E028000 0x08000 /* IRT */ 680264251Srpaulo 0x1E030000 0x08000 /* CSI0 */ 681264251Srpaulo 0x1E038000 0x08000 /* CSI1 */ 682264251Srpaulo 0x1E040000 0x08000 /* DI0 */ 683264251Srpaulo 0x1E048000 0x08000 /* DI1 */ 684264251Srpaulo 0x1E050000 0x08000 /* SMFC */ 685264251Srpaulo 0x1E058000 0x08000 /* DC */ 686264251Srpaulo 0x1E060000 0x08000 /* DMFC */ 687264251Srpaulo 0x1E068000 0x08000 /* VDI */ 688264251Srpaulo 0x1F000000 0x20000 /* CPMEM */ 689264251Srpaulo 0x1F020000 0x20000 /* LUT */ 690264251Srpaulo 0x1F040000 0x20000 /* SRM */ 691264251Srpaulo 0x1F060000 0x20000 /* TPM */ 692264251Srpaulo 0x1F080000 0x20000 /* DCTMPL */ 693255130Srpaulo >; 694255130Srpaulo interrupt-parent = <&tzic>; 695255130Srpaulo interrupts = < 696255130Srpaulo 10 /* IPUEX Error */ 697255130Srpaulo 11 /* IPUEX Sync */ 698255130Srpaulo >; 699255130Srpaulo status = "disabled"; 700255130Srpaulo }; 701255130Srpaulo }; 702255130Srpaulo}; 703255130Srpaulo 704255130Srpaulo/* 705255130Srpaulo 706255130SrpauloTODO: Not mapped interrupts 707255130Srpaulo 708255130Srpaulo5 DAP 709255130Srpaulo84 GPU2D (OpenVG) general interrupt 710255130Srpaulo85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) 711255130Srpaulo12 GPU3D 712255130Srpaulo102 GPU3D Idle interrupt from GPU3D (for S/W power gating) 713255130Srpaulo90 SJC 714255130Srpaulo*/ 715