bcm2836.dtsi revision 281890 
1/*
2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD: head/sys/boot/fdt/dts/arm/bcm2836.dtsi 281890 2015-04-23 14:58:39Z loos $
26 */
27
28/ {
29	#address-cells = <1>;
30	#size-cells = <1>;
31
32	timer {
33		compatible = "arm,armv7-timer";
34		clock-frequency = <19200000>;
35		interrupts = <72 73 75 74>;
36		interrupt-parent = <&intc>;
37	};
38
39	SOC: axi {
40		compatible = "simple-bus";
41		#address-cells = <1>;
42		#size-cells = <1>;
43		reg = <0x3f000000 0x01000000>;
44		ranges = <0 0x3f000000 0x01000000>;
45
46		intc: interrupt-controller {
47			compatible = "broadcom,bcm2835-armctrl-ic",
48				     "broadcom,bcm2708-armctrl-ic";
49			reg = <0xB200 0x200>;
50
51			interrupt-controller;
52			#interrupt-cells = <1>;
53
54			/* Bank 0
55			 * 0: ARM_TIMER
56			 * 1: ARM_MAILBOX
57			 * 2: ARM_DOORBELL_0
58			 * 3: ARM_DOORBELL_1
59			 * 4: VPU0_HALTED
60			 * 5: VPU1_HALTED
61			 * 6: ILLEGAL_TYPE0
62			 * 7: ILLEGAL_TYPE1
63			 */
64
65			/* Bank 1
66			 * 0: TIMER0		16: DMA0
67			 * 1: TIMER1		17: DMA1
68			 * 2: TIMER2		18: VC_DMA2
69			 * 3: TIMER3		19: VC_DMA3
70			 * 4: CODEC0		20: DMA4
71			 * 5: CODEC1		21: DMA5
72			 * 6: CODEC2		22: DMA6
73			 * 7: VC_JPEG		23: DMA7
74			 * 8: ISP		24: DMA8
75			 * 9: VC_USB		25: DMA9
76			 * 10: VC_3D		26: DMA10
77			 * 11: TRANSPOSER	27: DMA11
78			 * 12: MULTICORESYNC0	28: DMA12
79			 * 13: MULTICORESYNC1	29: AUX
80			 * 14: MULTICORESYNC2	30: ARM
81			 * 15: MULTICORESYNC3	31: VPUDMA
82			 */
83
84			/* Bank 2
85			 * 0: HOSTPORT		16: SMI
86			 * 1: VIDEOSCALER	17: GPIO0
87			 * 2: CCP2TX		18: GPIO1
88			 * 3: SDC		19: GPIO2
89			 * 4: DSI0		20: GPIO3
90			 * 5: AVE		21: VC_I2C
91			 * 6: CAM0		22: VC_SPI
92			 * 7: CAM1		23: VC_I2SPCM
93			 * 8: HDMI0		24: VC_SDIO
94			 * 9: HDMI1		25: VC_UART
95			 * 10: PIXELVALVE1	26: SLIMBUS
96			 * 11: I2CSPISLV	27: VEC
97			 * 12: DSI1		28: CPG
98			 * 13: PWA0		29: RNG
99			 * 14: PWA1		30: VC_ARASANSDIO
100			 * 15: CPR		31: AVSPMON
101			 */
102		};
103
104		watchdog0 {
105			compatible = "broadcom,bcm2835-wdt",
106				     "broadcom,bcm2708-wdt";
107			reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
108		};
109
110		gpio: gpio {
111			compatible = "broadcom,bcm2835-gpio",
112				     "broadcom,bcm2708-gpio";
113			reg = <0x200000 0xb0>;
114
115			/* Unusual arrangement of interrupts 
116			 * (determined by testing)
117			 * 17: Bank 0 (GPIOs  0-31)
118			 * 19: Bank 1 (GPIOs 32-53)
119			 * 18: Bank 2
120			 * 20: All banks (GPIOs 0-53)
121			 */
122			interrupts = <57 59 58 60>;
123			interrupt-parent = <&intc>;
124
125			gpio-controller;
126			#gpio-cells = <2>;
127
128			interrupt-controller;
129			#interrupt-cells = <1>;
130
131			pinctrl-names = "default";
132			pinctrl-0 = <&pins_reserved>;
133
134			/* Pins that can short 3.3V to GND in output mode: 46-47
135			 * Pins used by VideoCore: 48-53
136			 */
137			broadcom,read-only = <46>, <47>, <48>, <49>, <50>, 
138			                     <51>, <52>, <53>;
139
140			/* BSC0 */
141			pins_bsc0_a: bsc0_a {
142				broadcom,pins = <0>, <1>;
143			};
144
145			pins_bsc0_b: bsc0_b {
146				broadcom,pins = <28>, <29>;
147			};
148
149			pins_bsc0_c: bsc0_c {
150				broadcom,pins = <44>, <45>;
151			};
152
153			/* BSC1 */
154			pins_bsc1_a: bsc1_a {
155				broadcom,pins = <2>, <3>;
156			};
157
158			pins_bsc1_b: bsc1_b {
159				broadcom,pins = <44>, <45>;
160			};
161
162			/* GPCLK0 */
163			pins_gpclk0_a: gpclk0_a {
164				broadcom,pins = <4>;
165			};
166
167			pins_gpclk0_b: gpclk0_b {
168				broadcom,pins = <20>;
169			};
170
171			pins_gpclk0_c: gpclk0_c {
172				broadcom,pins = <32>;
173			};
174
175			pins_gpclk0_d: gpclk0_d {
176				broadcom,pins = <34>;
177			};
178
179			/* GPCLK1 */
180			pins_gpclk1_a: gpclk1_a {
181				broadcom,pins = <5>;
182			};
183
184			pins_gpclk1_b: gpclk1_b {
185				broadcom,pins = <21>;
186			};
187
188			pins_gpclk1_c: gpclk1_c {
189				broadcom,pins = <42>;
190			};
191
192			pins_gpclk1_d: gpclk1_d {
193				broadcom,pins = <44>;
194			};
195
196			/* GPCLK2 */
197			pins_gpclk2_a: gpclk2_a {
198				broadcom,pins = <6>;
199			};
200
201			pins_gpclk2_b: gpclk2_b {
202				broadcom,pins = <43>;
203			};
204
205			/* SPI0 */
206			pins_spi0_a: spi0_a {
207				broadcom,pins = <7>, <8>, <9>, <10>, <11>;
208			};
209
210			pins_spi0_b: spi0_b {
211				broadcom,pins = <35>, <36>, <37>, <38>, <39>;
212			};
213
214			/* PWM */
215			pins_pwm0_a: pwm0_a {
216				broadcom,pins = <12>;
217			};
218
219			pins_pwm0_b: pwm0_b {
220				broadcom,pins = <18>;
221			};
222
223			pins_pwm0_c: pwm0_c {
224				broadcom,pins = <40>;
225			};
226
227			pins_pwm1_a: pwm1_a {
228				broadcom,pins = <13>;
229			};
230
231			pins_pwm1_b: pwm1_b {
232				broadcom,pins = <19>;
233			};
234
235			pins_pwm1_c: pwm1_c {
236				broadcom,pins = <41>;
237			};
238
239			pins_pwm1_d: pwm1_d {
240				broadcom,pins = <45>;
241			};
242
243			/* UART0 */
244			pins_uart0_a: uart0_a {
245				broadcom,pins = <14>, <15>;
246			};
247
248			pins_uart0_b: uart0_b {
249				broadcom,pins = <32>, <33>;
250			};
251
252			pins_uart0_c: uart0_c {
253				broadcom,pins = <36>, <37>;
254			};
255
256			pins_uart0_fc_a: uart0_fc_a {
257				broadcom,pins = <16>, <17>;
258			};
259
260			pins_uart0_fc_b: uart0_fc_b {
261				broadcom,pins = <30>, <31>;
262			};
263
264			pins_uart0_fc_c: uart0_fc_c {
265				broadcom,pins = <39>, <38>;
266			};
267
268			/* PCM */
269			pins_pcm_a: pcm_a {
270				broadcom,pins = <18>, <19>, <20>, <21>;
271			};
272
273			pins_pcm_b: pcm_b {
274				broadcom,pins = <28>, <29>, <30>, <31>;
275			};
276
277			/* Secondary Address Bus */
278			pins_sm_addr_a: sm_addr_a {
279				broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
280			};
281
282			pins_sm_addr_b: sm_addr_b {
283				broadcom,pins = <33>, <32>, <31>, <30>, <29>,
284				                <28>;
285			};
286
287			pins_sm_ctl_a: sm_ctl_a {
288				broadcom,pins = <6>, <7>;
289			};
290
291			pins_sm_ctl_b: sm_ctl_b {
292				broadcom,pins = <34>, <35>;
293			};
294
295			pins_sm_data_8bit_a: sm_data_8bit_a {
296				broadcom,pins = <8>, <9>, <10>, <11>, <12>,
297				                <13>, <14>, <15>;
298			};
299
300			pins_sm_data_8bit_b: sm_data_8bit_b {
301				broadcom,pins = <36>, <37>, <38>, <39>, <40>,
302				                <41>, <42>, <43>;
303			};
304
305			pins_sm_data_16bit: sm_data_16bit {
306				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
307				                <21>, <22>, <23>;
308			};
309
310			pins_sm_data_18bit: sm_data_18bit {
311				broadcom,pins = <24>, <25>;
312			};
313
314			/* BSCSL */
315			pins_bscsl: bscsl {
316				broadcom,pins = <18>, <19>;
317			};
318
319			/* SPISL */
320			pins_spisl: spisl {
321				broadcom,pins = <18>, <19>, <20>, <21>;
322			};
323
324			/* SPI1 */
325			pins_spi1: spi1 {
326				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
327				                <21>;
328			};
329
330			/* UART1 */
331			pins_uart1_a: uart1_a {
332				broadcom,pins = <14>, <15>;
333			};
334
335			pins_uart1_b: uart1_b {
336				broadcom,pins = <32>, <33>;
337			};
338
339			pins_uart1_c: uart1_c {
340				broadcom,pins = <40>, <41>;
341			};
342
343			pins_uart1_fc_a: uart1_fc_a {
344				broadcom,pins = <16>, <17>;
345			};
346
347			pins_uart1_fc_b: uart1_fc_b {
348				broadcom,pins = <30>, <31>;
349			};
350
351			pins_uart1_fc_c: uart1_fc_c {
352				broadcom,pins = <43>, <42>;
353			};
354
355			/* SPI2 */
356			pins_spi2: spi2 {
357				broadcom,pins = <40>, <41>, <42>, <43>, <44>,
358				                <45>;
359			};
360
361			/* ARM JTAG */
362			pins_arm_jtag_trst: arm_jtag_trst {
363				broadcom,pins = <22>;
364			};
365
366			pins_arm_jtag_a: arm_jtag_a {
367				broadcom,pins = <4>, <5>, <6>, <12>, <13>;
368			};
369
370			pins_arm_jtag_b: arm_jtag_b {
371				broadcom,pins = <23>, <24>, <25>, <26>, <27>;
372			};
373
374			/* Reserved */
375			pins_reserved: reserved {
376				broadcom,pins = <48>, <49>, <50>, <51>, <52>,
377				                <53>;
378			};
379		};
380
381		bsc0 {
382			compatible = "broadcom,bcm2835-bsc",
383				     "broadcom,bcm2708-bsc";
384			reg = <0x205000 0x20>;
385			interrupts = <61>;
386			interrupt-parent = <&intc>;
387		};
388
389		bsc1 {
390			compatible = "broadcom,bcm2835-bsc",
391				     "broadcom,bcm2708-bsc";
392			reg = <0x804000 0x20>;
393			interrupts = <61>;
394			interrupt-parent = <&intc>;
395		};
396
397		spi0 {
398			compatible = "broadcom,bcm2835-spi",
399				     "broadcom,bcm2708-spi";
400			reg = <0x204000 0x20>;
401			interrupts = <62>;
402			interrupt-parent = <&intc>;
403		};
404
405		dma: dma {
406			compatible = "broadcom,bcm2835-dma", 
407				     "broadcom,bcm2708-dma";
408			reg = <0x7000 0x1000>, <0xE05000 0x1000>;
409			interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
410			interrupt-parent = <&intc>;
411
412			broadcom,channels = <0>;	/* Set by VideoCore */
413		};
414
415		vc_mbox: mbox {
416			compatible = "broadcom,bcm2835-mbox", 
417				     "broadcom,bcm2708-mbox";
418			reg = <0xB880 0x40>;
419			interrupts = <1>;
420			interrupt-parent = <&intc>;
421
422			/* Channels
423			 * 0: Power
424			 * 1: Frame buffer
425			 * 2: Virtual UART
426			 * 3: VCHIQ
427			 * 4: LEDs
428			 * 5: Buttons
429			 * 6: Touch screen
430			 */
431		};
432
433		sdhci {
434			compatible = "broadcom,bcm2835-sdhci", 
435				     "broadcom,bcm2708-sdhci";
436			reg = <0x300000 0x100>;
437			interrupts = <70>;
438			interrupt-parent = <&intc>;
439
440			clock-frequency = <250000000>;	/* Set by VideoCore */
441		};
442
443		uart0: uart0 {
444			compatible = "broadcom,bcm2835-uart", 
445				     "broadcom,bcm2708-uart", "arm,pl011", 
446				     "arm,primecell";
447			reg = <0x201000 0x1000>;
448			interrupts = <65>;
449			interrupt-parent = <&intc>;
450
451			clock-frequency = <3000000>;	/* Set by VideoCore */
452			reg-shift = <2>;
453		};
454
455		vchiq {
456			compatible = "broadcom,bcm2835-vchiq";
457			reg = <0xB800 0x50>;
458			interrupts = <2>;
459			interrupt-parent = <&intc>;
460		};
461
462		usb {
463			compatible = "broadcom,bcm2835-usb", 
464				     "broadcom,bcm2708-usb", 
465				     "synopsys,designware-hs-otg2";
466			reg = <0x980000 0x20000>;
467			interrupts = <17>;
468			interrupt-parent = <&intc>;
469			#address-cells = <1>;
470			#size-cells = <0>;
471		};
472
473	};
474};
475