bcm2836.dtsi revision 280520 
1/*
2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD: head/sys/boot/fdt/dts/arm/bcm2836.dtsi 280520 2015-03-25 10:26:07Z andrew $
26 */
27
28/ {
29	#address-cells = <1>;
30	#size-cells = <1>;
31
32	timer {
33		compatible = "arm,armv7-timer";
34		clock-frequency = <19200000>;
35		interrupts = <72 73 75 74>;
36		interrupt-parent = <&intc>;
37	};
38
39	SOC: axi {
40		compatible = "simple-bus";
41		#address-cells = <1>;
42		#size-cells = <1>;
43		reg = <0x3f000000 0x01000000>;
44		ranges = <0 0x3f000000 0x01000000>;
45
46		intc: interrupt-controller {
47			compatible = "broadcom,bcm2835-armctrl-ic",
48				     "broadcom,bcm2708-armctrl-ic";
49			reg = <0xB200 0x200>;
50
51			interrupt-controller;
52			#interrupt-cells = <1>;
53
54			/* Bank 0
55			 * 0: ARM_TIMER
56			 * 1: ARM_MAILBOX
57			 * 2: ARM_DOORBELL_0
58			 * 3: ARM_DOORBELL_1
59			 * 4: VPU0_HALTED
60			 * 5: VPU1_HALTED
61			 * 6: ILLEGAL_TYPE0
62			 * 7: ILLEGAL_TYPE1
63			 */
64
65			/* Bank 1
66			 * 0: TIMER0		16: DMA0
67			 * 1: TIMER1		17: DMA1
68			 * 2: TIMER2		18: VC_DMA2
69			 * 3: TIMER3		19: VC_DMA3
70			 * 4: CODEC0		20: DMA4
71			 * 5: CODEC1		21: DMA5
72			 * 6: CODEC2		22: DMA6
73			 * 7: VC_JPEG		23: DMA7
74			 * 8: ISP		24: DMA8
75			 * 9: VC_USB		25: DMA9
76			 * 10: VC_3D		26: DMA10
77			 * 11: TRANSPOSER	27: DMA11
78			 * 12: MULTICORESYNC0	28: DMA12
79			 * 13: MULTICORESYNC1	29: AUX
80			 * 14: MULTICORESYNC2	30: ARM
81			 * 15: MULTICORESYNC3	31: VPUDMA
82			 */
83
84			/* Bank 2
85			 * 0: HOSTPORT		16: SMI
86			 * 1: VIDEOSCALER	17: GPIO0
87			 * 2: CCP2TX		18: GPIO1
88			 * 3: SDC		19: GPIO2
89			 * 4: DSI0		20: GPIO3
90			 * 5: AVE		21: VC_I2C
91			 * 6: CAM0		22: VC_SPI
92			 * 7: CAM1		23: VC_I2SPCM
93			 * 8: HDMI0		24: VC_SDIO
94			 * 9: HDMI1		25: VC_UART
95			 * 10: PIXELVALVE1	26: SLIMBUS
96			 * 11: I2CSPISLV	27: VEC
97			 * 12: DSI1		28: CPG
98			 * 13: PWA0		29: RNG
99			 * 14: PWA1		30: VC_ARASANSDIO
100			 * 15: CPR		31: AVSPMON
101			 */
102		};
103
104		gpio: gpio {
105			compatible = "broadcom,bcm2835-gpio",
106				     "broadcom,bcm2708-gpio";
107			reg = <0x200000 0xb0>;
108
109			/* Unusual arrangement of interrupts 
110			 * (determined by testing)
111			 * 17: Bank 0 (GPIOs  0-31)
112			 * 19: Bank 1 (GPIOs 32-53)
113			 * 18: Bank 2
114			 * 20: All banks (GPIOs 0-53)
115			 */
116			interrupts = <57 59 58 60>;
117			interrupt-parent = <&intc>;
118
119			gpio-controller;
120			#gpio-cells = <2>;
121
122			interrupt-controller;
123			#interrupt-cells = <1>;
124
125			pinctrl-names = "default";
126			pinctrl-0 = <&pins_reserved>;
127
128			/* Pins that can short 3.3V to GND in output mode: 46-47
129			 * Pins used by VideoCore: 48-53
130			 */
131			broadcom,read-only = <46>, <47>, <48>, <49>, <50>, 
132			                     <51>, <52>, <53>;
133
134			/* BSC0 */
135			pins_bsc0_a: bsc0_a {
136				broadcom,pins = <0>, <1>;
137			};
138
139			pins_bsc0_b: bsc0_b {
140				broadcom,pins = <28>, <29>;
141			};
142
143			pins_bsc0_c: bsc0_c {
144				broadcom,pins = <44>, <45>;
145			};
146
147			/* BSC1 */
148			pins_bsc1_a: bsc1_a {
149				broadcom,pins = <2>, <3>;
150			};
151
152			pins_bsc1_b: bsc1_b {
153				broadcom,pins = <44>, <45>;
154			};
155
156			/* GPCLK0 */
157			pins_gpclk0_a: gpclk0_a {
158				broadcom,pins = <4>;
159			};
160
161			pins_gpclk0_b: gpclk0_b {
162				broadcom,pins = <20>;
163			};
164
165			pins_gpclk0_c: gpclk0_c {
166				broadcom,pins = <32>;
167			};
168
169			pins_gpclk0_d: gpclk0_d {
170				broadcom,pins = <34>;
171			};
172
173			/* GPCLK1 */
174			pins_gpclk1_a: gpclk1_a {
175				broadcom,pins = <5>;
176			};
177
178			pins_gpclk1_b: gpclk1_b {
179				broadcom,pins = <21>;
180			};
181
182			pins_gpclk1_c: gpclk1_c {
183				broadcom,pins = <42>;
184			};
185
186			pins_gpclk1_d: gpclk1_d {
187				broadcom,pins = <44>;
188			};
189
190			/* GPCLK2 */
191			pins_gpclk2_a: gpclk2_a {
192				broadcom,pins = <6>;
193			};
194
195			pins_gpclk2_b: gpclk2_b {
196				broadcom,pins = <43>;
197			};
198
199			/* SPI0 */
200			pins_spi0_a: spi0_a {
201				broadcom,pins = <7>, <8>, <9>, <10>, <11>;
202			};
203
204			pins_spi0_b: spi0_b {
205				broadcom,pins = <35>, <36>, <37>, <38>, <39>;
206			};
207
208			/* PWM */
209			pins_pwm0_a: pwm0_a {
210				broadcom,pins = <12>;
211			};
212
213			pins_pwm0_b: pwm0_b {
214				broadcom,pins = <18>;
215			};
216
217			pins_pwm0_c: pwm0_c {
218				broadcom,pins = <40>;
219			};
220
221			pins_pwm1_a: pwm1_a {
222				broadcom,pins = <13>;
223			};
224
225			pins_pwm1_b: pwm1_b {
226				broadcom,pins = <19>;
227			};
228
229			pins_pwm1_c: pwm1_c {
230				broadcom,pins = <41>;
231			};
232
233			pins_pwm1_d: pwm1_d {
234				broadcom,pins = <45>;
235			};
236
237			/* UART0 */
238			pins_uart0_a: uart0_a {
239				broadcom,pins = <14>, <15>;
240			};
241
242			pins_uart0_b: uart0_b {
243				broadcom,pins = <32>, <33>;
244			};
245
246			pins_uart0_c: uart0_c {
247				broadcom,pins = <36>, <37>;
248			};
249
250			pins_uart0_fc_a: uart0_fc_a {
251				broadcom,pins = <16>, <17>;
252			};
253
254			pins_uart0_fc_b: uart0_fc_b {
255				broadcom,pins = <30>, <31>;
256			};
257
258			pins_uart0_fc_c: uart0_fc_c {
259				broadcom,pins = <39>, <38>;
260			};
261
262			/* PCM */
263			pins_pcm_a: pcm_a {
264				broadcom,pins = <18>, <19>, <20>, <21>;
265			};
266
267			pins_pcm_b: pcm_b {
268				broadcom,pins = <28>, <29>, <30>, <31>;
269			};
270
271			/* Secondary Address Bus */
272			pins_sm_addr_a: sm_addr_a {
273				broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
274			};
275
276			pins_sm_addr_b: sm_addr_b {
277				broadcom,pins = <33>, <32>, <31>, <30>, <29>,
278				                <28>;
279			};
280
281			pins_sm_ctl_a: sm_ctl_a {
282				broadcom,pins = <6>, <7>;
283			};
284
285			pins_sm_ctl_b: sm_ctl_b {
286				broadcom,pins = <34>, <35>;
287			};
288
289			pins_sm_data_8bit_a: sm_data_8bit_a {
290				broadcom,pins = <8>, <9>, <10>, <11>, <12>,
291				                <13>, <14>, <15>;
292			};
293
294			pins_sm_data_8bit_b: sm_data_8bit_b {
295				broadcom,pins = <36>, <37>, <38>, <39>, <40>,
296				                <41>, <42>, <43>;
297			};
298
299			pins_sm_data_16bit: sm_data_16bit {
300				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
301				                <21>, <22>, <23>;
302			};
303
304			pins_sm_data_18bit: sm_data_18bit {
305				broadcom,pins = <24>, <25>;
306			};
307
308			/* BSCSL */
309			pins_bscsl: bscsl {
310				broadcom,pins = <18>, <19>;
311			};
312
313			/* SPISL */
314			pins_spisl: spisl {
315				broadcom,pins = <18>, <19>, <20>, <21>;
316			};
317
318			/* SPI1 */
319			pins_spi1: spi1 {
320				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
321				                <21>;
322			};
323
324			/* UART1 */
325			pins_uart1_a: uart1_a {
326				broadcom,pins = <14>, <15>;
327			};
328
329			pins_uart1_b: uart1_b {
330				broadcom,pins = <32>, <33>;
331			};
332
333			pins_uart1_c: uart1_c {
334				broadcom,pins = <40>, <41>;
335			};
336
337			pins_uart1_fc_a: uart1_fc_a {
338				broadcom,pins = <16>, <17>;
339			};
340
341			pins_uart1_fc_b: uart1_fc_b {
342				broadcom,pins = <30>, <31>;
343			};
344
345			pins_uart1_fc_c: uart1_fc_c {
346				broadcom,pins = <43>, <42>;
347			};
348
349			/* SPI2 */
350			pins_spi2: spi2 {
351				broadcom,pins = <40>, <41>, <42>, <43>, <44>,
352				                <45>;
353			};
354
355			/* ARM JTAG */
356			pins_arm_jtag_trst: arm_jtag_trst {
357				broadcom,pins = <22>;
358			};
359
360			pins_arm_jtag_a: arm_jtag_a {
361				broadcom,pins = <4>, <5>, <6>, <12>, <13>;
362			};
363
364			pins_arm_jtag_b: arm_jtag_b {
365				broadcom,pins = <23>, <24>, <25>, <26>, <27>;
366			};
367
368			/* Reserved */
369			pins_reserved: reserved {
370				broadcom,pins = <48>, <49>, <50>, <51>, <52>,
371				                <53>;
372			};
373		};
374
375		bsc0 {
376			compatible = "broadcom,bcm2835-bsc",
377				     "broadcom,bcm2708-bsc";
378			reg = <0x205000 0x20>;
379			interrupts = <61>;
380			interrupt-parent = <&intc>;
381		};
382
383		bsc1 {
384			compatible = "broadcom,bcm2835-bsc",
385				     "broadcom,bcm2708-bsc";
386			reg = <0x804000 0x20>;
387			interrupts = <61>;
388			interrupt-parent = <&intc>;
389		};
390
391		spi0 {
392			compatible = "broadcom,bcm2835-spi",
393				     "broadcom,bcm2708-spi";
394			reg = <0x204000 0x20>;
395			interrupts = <62>;
396			interrupt-parent = <&intc>;
397		};
398
399		dma: dma {
400			compatible = "broadcom,bcm2835-dma", 
401				     "broadcom,bcm2708-dma";
402			reg = <0x7000 0x1000>, <0xE05000 0x1000>;
403			interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
404			interrupt-parent = <&intc>;
405
406			broadcom,channels = <0>;	/* Set by VideoCore */
407		};
408
409		vc_mbox: mbox {
410			compatible = "broadcom,bcm2835-mbox", 
411				     "broadcom,bcm2708-mbox";
412			reg = <0xB880 0x40>;
413			interrupts = <1>;
414			interrupt-parent = <&intc>;
415
416			/* Channels
417			 * 0: Power
418			 * 1: Frame buffer
419			 * 2: Virtual UART
420			 * 3: VCHIQ
421			 * 4: LEDs
422			 * 5: Buttons
423			 * 6: Touch screen
424			 */
425		};
426
427		sdhci {
428			compatible = "broadcom,bcm2835-sdhci", 
429				     "broadcom,bcm2708-sdhci";
430			reg = <0x300000 0x100>;
431			interrupts = <70>;
432			interrupt-parent = <&intc>;
433
434			clock-frequency = <2500000000>;	/* Set by VideoCore */
435		};
436
437		uart0: uart0 {
438			compatible = "broadcom,bcm2835-uart", 
439				     "broadcom,bcm2708-uart", "arm,pl011", 
440				     "arm,primecell";
441			reg = <0x201000 0x1000>;
442			interrupts = <65>;
443			interrupt-parent = <&intc>;
444
445			clock-frequency = <3000000>;	/* Set by VideoCore */
446			reg-shift = <2>;
447		};
448
449		vchiq {
450			compatible = "broadcom,bcm2835-vchiq";
451			reg = <0xB800 0x50>;
452			interrupts = <2>;
453			interrupt-parent = <&intc>;
454		};
455
456		usb {
457			compatible = "broadcom,bcm2835-usb", 
458				     "broadcom,bcm2708-usb", 
459				     "synopsys,designware-hs-otg2";
460			reg = <0x980000 0x20000>;
461			interrupts = <17>;
462			interrupt-parent = <&intc>;
463			#address-cells = <1>;
464			#size-cells = <0>;
465		};
466
467	};
468};
469